1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // Copyright (c) 2019, Linaro Limited
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #include <linux/module.h>
5*4882a593Smuzhiyun #include <linux/gpio/driver.h>
6*4882a593Smuzhiyun #include <linux/regmap.h>
7*4882a593Smuzhiyun #include <linux/slab.h>
8*4882a593Smuzhiyun #include <linux/of_device.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #define WCD_PIN_MASK(p) BIT(p)
11*4882a593Smuzhiyun #define WCD_REG_DIR_CTL_OFFSET 0x42
12*4882a593Smuzhiyun #define WCD_REG_VAL_CTL_OFFSET 0x43
13*4882a593Smuzhiyun #define WCD934X_NPINS 5
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun struct wcd_gpio_data {
16*4882a593Smuzhiyun struct regmap *map;
17*4882a593Smuzhiyun struct gpio_chip chip;
18*4882a593Smuzhiyun };
19*4882a593Smuzhiyun
wcd_gpio_get_direction(struct gpio_chip * chip,unsigned int pin)20*4882a593Smuzhiyun static int wcd_gpio_get_direction(struct gpio_chip *chip, unsigned int pin)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun struct wcd_gpio_data *data = gpiochip_get_data(chip);
23*4882a593Smuzhiyun unsigned int value;
24*4882a593Smuzhiyun int ret;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun ret = regmap_read(data->map, WCD_REG_DIR_CTL_OFFSET, &value);
27*4882a593Smuzhiyun if (ret < 0)
28*4882a593Smuzhiyun return ret;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun if (value & WCD_PIN_MASK(pin))
31*4882a593Smuzhiyun return GPIO_LINE_DIRECTION_OUT;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return GPIO_LINE_DIRECTION_IN;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
wcd_gpio_direction_input(struct gpio_chip * chip,unsigned int pin)36*4882a593Smuzhiyun static int wcd_gpio_direction_input(struct gpio_chip *chip, unsigned int pin)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct wcd_gpio_data *data = gpiochip_get_data(chip);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun return regmap_update_bits(data->map, WCD_REG_DIR_CTL_OFFSET,
41*4882a593Smuzhiyun WCD_PIN_MASK(pin), 0);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
wcd_gpio_direction_output(struct gpio_chip * chip,unsigned int pin,int val)44*4882a593Smuzhiyun static int wcd_gpio_direction_output(struct gpio_chip *chip, unsigned int pin,
45*4882a593Smuzhiyun int val)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun struct wcd_gpio_data *data = gpiochip_get_data(chip);
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun regmap_update_bits(data->map, WCD_REG_DIR_CTL_OFFSET,
50*4882a593Smuzhiyun WCD_PIN_MASK(pin), WCD_PIN_MASK(pin));
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun return regmap_update_bits(data->map, WCD_REG_VAL_CTL_OFFSET,
53*4882a593Smuzhiyun WCD_PIN_MASK(pin),
54*4882a593Smuzhiyun val ? WCD_PIN_MASK(pin) : 0);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
wcd_gpio_get(struct gpio_chip * chip,unsigned int pin)57*4882a593Smuzhiyun static int wcd_gpio_get(struct gpio_chip *chip, unsigned int pin)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun struct wcd_gpio_data *data = gpiochip_get_data(chip);
60*4882a593Smuzhiyun unsigned int value;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun regmap_read(data->map, WCD_REG_VAL_CTL_OFFSET, &value);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return !!(value & WCD_PIN_MASK(pin));
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
wcd_gpio_set(struct gpio_chip * chip,unsigned int pin,int val)67*4882a593Smuzhiyun static void wcd_gpio_set(struct gpio_chip *chip, unsigned int pin, int val)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun struct wcd_gpio_data *data = gpiochip_get_data(chip);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun regmap_update_bits(data->map, WCD_REG_VAL_CTL_OFFSET,
72*4882a593Smuzhiyun WCD_PIN_MASK(pin), val ? WCD_PIN_MASK(pin) : 0);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
wcd_gpio_probe(struct platform_device * pdev)75*4882a593Smuzhiyun static int wcd_gpio_probe(struct platform_device *pdev)
76*4882a593Smuzhiyun {
77*4882a593Smuzhiyun struct device *dev = &pdev->dev;
78*4882a593Smuzhiyun struct wcd_gpio_data *data;
79*4882a593Smuzhiyun struct gpio_chip *chip;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
82*4882a593Smuzhiyun if (!data)
83*4882a593Smuzhiyun return -ENOMEM;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun data->map = dev_get_regmap(dev->parent, NULL);
86*4882a593Smuzhiyun if (!data->map) {
87*4882a593Smuzhiyun dev_err(dev, "%s: failed to get regmap\n", __func__);
88*4882a593Smuzhiyun return -EINVAL;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun chip = &data->chip;
92*4882a593Smuzhiyun chip->direction_input = wcd_gpio_direction_input;
93*4882a593Smuzhiyun chip->direction_output = wcd_gpio_direction_output;
94*4882a593Smuzhiyun chip->get_direction = wcd_gpio_get_direction;
95*4882a593Smuzhiyun chip->get = wcd_gpio_get;
96*4882a593Smuzhiyun chip->set = wcd_gpio_set;
97*4882a593Smuzhiyun chip->parent = dev;
98*4882a593Smuzhiyun chip->base = -1;
99*4882a593Smuzhiyun chip->ngpio = WCD934X_NPINS;
100*4882a593Smuzhiyun chip->label = dev_name(dev);
101*4882a593Smuzhiyun chip->of_gpio_n_cells = 2;
102*4882a593Smuzhiyun chip->can_sleep = false;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun return devm_gpiochip_add_data(dev, chip, data);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun static const struct of_device_id wcd_gpio_of_match[] = {
108*4882a593Smuzhiyun { .compatible = "qcom,wcd9340-gpio" },
109*4882a593Smuzhiyun { .compatible = "qcom,wcd9341-gpio" },
110*4882a593Smuzhiyun { }
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, wcd_gpio_of_match);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static struct platform_driver wcd_gpio_driver = {
115*4882a593Smuzhiyun .driver = {
116*4882a593Smuzhiyun .name = "wcd934x-gpio",
117*4882a593Smuzhiyun .of_match_table = wcd_gpio_of_match,
118*4882a593Smuzhiyun },
119*4882a593Smuzhiyun .probe = wcd_gpio_probe,
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun module_platform_driver(wcd_gpio_driver);
123*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm Technologies, Inc WCD GPIO control driver");
124*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
125