1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Digital I/O driver for Technologic Systems TS-5500
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2012 Savoir-faire Linux Inc.
6*4882a593Smuzhiyun * Vivien Didelot <vivien.didelot@savoirfairelinux.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Technologic Systems platforms have pin blocks, exposing several Digital
9*4882a593Smuzhiyun * Input/Output lines (DIO). This driver aims to support single pin blocks.
10*4882a593Smuzhiyun * In that sense, the support is not limited to the TS-5500 blocks.
11*4882a593Smuzhiyun * Actually, the following platforms have DIO support:
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * TS-5500:
14*4882a593Smuzhiyun * Documentation: http://wiki.embeddedarm.com/wiki/TS-5500
15*4882a593Smuzhiyun * Blocks: DIO1, DIO2 and LCD port.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun * TS-5600:
18*4882a593Smuzhiyun * Documentation: http://wiki.embeddedarm.com/wiki/TS-5600
19*4882a593Smuzhiyun * Blocks: LCD port (identical to TS-5500 LCD).
20*4882a593Smuzhiyun */
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <linux/bitops.h>
23*4882a593Smuzhiyun #include <linux/gpio/driver.h>
24*4882a593Smuzhiyun #include <linux/io.h>
25*4882a593Smuzhiyun #include <linux/module.h>
26*4882a593Smuzhiyun #include <linux/platform_device.h>
27*4882a593Smuzhiyun #include <linux/slab.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* List of supported Technologic Systems platforms DIO blocks */
30*4882a593Smuzhiyun enum ts5500_blocks { TS5500_DIO1, TS5500_DIO2, TS5500_LCD, TS5600_LCD };
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun struct ts5500_priv {
33*4882a593Smuzhiyun const struct ts5500_dio *pinout;
34*4882a593Smuzhiyun struct gpio_chip gpio_chip;
35*4882a593Smuzhiyun spinlock_t lock;
36*4882a593Smuzhiyun bool strap;
37*4882a593Smuzhiyun u8 hwirq;
38*4882a593Smuzhiyun };
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * Hex 7D is used to control several blocks (e.g. DIO2 and LCD port).
42*4882a593Smuzhiyun * This flag ensures that the region has been requested by this driver.
43*4882a593Smuzhiyun */
44*4882a593Smuzhiyun static bool hex7d_reserved;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun /*
47*4882a593Smuzhiyun * This structure is used to describe capabilities of DIO lines,
48*4882a593Smuzhiyun * such as available directions and connected interrupt (if any).
49*4882a593Smuzhiyun */
50*4882a593Smuzhiyun struct ts5500_dio {
51*4882a593Smuzhiyun const u8 value_addr;
52*4882a593Smuzhiyun const u8 value_mask;
53*4882a593Smuzhiyun const u8 control_addr;
54*4882a593Smuzhiyun const u8 control_mask;
55*4882a593Smuzhiyun const bool no_input;
56*4882a593Smuzhiyun const bool no_output;
57*4882a593Smuzhiyun const u8 irq;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define TS5500_DIO_IN_OUT(vaddr, vbit, caddr, cbit) \
61*4882a593Smuzhiyun { \
62*4882a593Smuzhiyun .value_addr = vaddr, \
63*4882a593Smuzhiyun .value_mask = BIT(vbit), \
64*4882a593Smuzhiyun .control_addr = caddr, \
65*4882a593Smuzhiyun .control_mask = BIT(cbit), \
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun #define TS5500_DIO_IN(addr, bit) \
69*4882a593Smuzhiyun { \
70*4882a593Smuzhiyun .value_addr = addr, \
71*4882a593Smuzhiyun .value_mask = BIT(bit), \
72*4882a593Smuzhiyun .no_output = true, \
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun #define TS5500_DIO_IN_IRQ(addr, bit, _irq) \
76*4882a593Smuzhiyun { \
77*4882a593Smuzhiyun .value_addr = addr, \
78*4882a593Smuzhiyun .value_mask = BIT(bit), \
79*4882a593Smuzhiyun .no_output = true, \
80*4882a593Smuzhiyun .irq = _irq, \
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #define TS5500_DIO_OUT(addr, bit) \
84*4882a593Smuzhiyun { \
85*4882a593Smuzhiyun .value_addr = addr, \
86*4882a593Smuzhiyun .value_mask = BIT(bit), \
87*4882a593Smuzhiyun .no_input = true, \
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /*
91*4882a593Smuzhiyun * Input/Output DIO lines are programmed in groups of 4. Their values are
92*4882a593Smuzhiyun * available through 4 consecutive bits in a value port, whereas the direction
93*4882a593Smuzhiyun * of these 4 lines is driven by only 1 bit in a control port.
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun #define TS5500_DIO_GROUP(vaddr, vbitfrom, caddr, cbit) \
96*4882a593Smuzhiyun TS5500_DIO_IN_OUT(vaddr, vbitfrom + 0, caddr, cbit), \
97*4882a593Smuzhiyun TS5500_DIO_IN_OUT(vaddr, vbitfrom + 1, caddr, cbit), \
98*4882a593Smuzhiyun TS5500_DIO_IN_OUT(vaddr, vbitfrom + 2, caddr, cbit), \
99*4882a593Smuzhiyun TS5500_DIO_IN_OUT(vaddr, vbitfrom + 3, caddr, cbit)
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /*
102*4882a593Smuzhiyun * TS-5500 DIO1 block
103*4882a593Smuzhiyun *
104*4882a593Smuzhiyun * value control dir hw
105*4882a593Smuzhiyun * addr bit addr bit in out irq name pin offset
106*4882a593Smuzhiyun *
107*4882a593Smuzhiyun * 0x7b 0 0x7a 0 x x DIO1_0 1 0
108*4882a593Smuzhiyun * 0x7b 1 0x7a 0 x x DIO1_1 3 1
109*4882a593Smuzhiyun * 0x7b 2 0x7a 0 x x DIO1_2 5 2
110*4882a593Smuzhiyun * 0x7b 3 0x7a 0 x x DIO1_3 7 3
111*4882a593Smuzhiyun * 0x7b 4 0x7a 1 x x DIO1_4 9 4
112*4882a593Smuzhiyun * 0x7b 5 0x7a 1 x x DIO1_5 11 5
113*4882a593Smuzhiyun * 0x7b 6 0x7a 1 x x DIO1_6 13 6
114*4882a593Smuzhiyun * 0x7b 7 0x7a 1 x x DIO1_7 15 7
115*4882a593Smuzhiyun * 0x7c 0 0x7a 5 x x DIO1_8 4 8
116*4882a593Smuzhiyun * 0x7c 1 0x7a 5 x x DIO1_9 6 9
117*4882a593Smuzhiyun * 0x7c 2 0x7a 5 x x DIO1_10 8 10
118*4882a593Smuzhiyun * 0x7c 3 0x7a 5 x x DIO1_11 10 11
119*4882a593Smuzhiyun * 0x7c 4 x DIO1_12 12 12
120*4882a593Smuzhiyun * 0x7c 5 x 7 DIO1_13 14 13
121*4882a593Smuzhiyun */
122*4882a593Smuzhiyun static const struct ts5500_dio ts5500_dio1[] = {
123*4882a593Smuzhiyun TS5500_DIO_GROUP(0x7b, 0, 0x7a, 0),
124*4882a593Smuzhiyun TS5500_DIO_GROUP(0x7b, 4, 0x7a, 1),
125*4882a593Smuzhiyun TS5500_DIO_GROUP(0x7c, 0, 0x7a, 5),
126*4882a593Smuzhiyun TS5500_DIO_IN(0x7c, 4),
127*4882a593Smuzhiyun TS5500_DIO_IN_IRQ(0x7c, 5, 7),
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /*
131*4882a593Smuzhiyun * TS-5500 DIO2 block
132*4882a593Smuzhiyun *
133*4882a593Smuzhiyun * value control dir hw
134*4882a593Smuzhiyun * addr bit addr bit in out irq name pin offset
135*4882a593Smuzhiyun *
136*4882a593Smuzhiyun * 0x7e 0 0x7d 0 x x DIO2_0 1 0
137*4882a593Smuzhiyun * 0x7e 1 0x7d 0 x x DIO2_1 3 1
138*4882a593Smuzhiyun * 0x7e 2 0x7d 0 x x DIO2_2 5 2
139*4882a593Smuzhiyun * 0x7e 3 0x7d 0 x x DIO2_3 7 3
140*4882a593Smuzhiyun * 0x7e 4 0x7d 1 x x DIO2_4 9 4
141*4882a593Smuzhiyun * 0x7e 5 0x7d 1 x x DIO2_5 11 5
142*4882a593Smuzhiyun * 0x7e 6 0x7d 1 x x DIO2_6 13 6
143*4882a593Smuzhiyun * 0x7e 7 0x7d 1 x x DIO2_7 15 7
144*4882a593Smuzhiyun * 0x7f 0 0x7d 5 x x DIO2_8 4 8
145*4882a593Smuzhiyun * 0x7f 1 0x7d 5 x x DIO2_9 6 9
146*4882a593Smuzhiyun * 0x7f 2 0x7d 5 x x DIO2_10 8 10
147*4882a593Smuzhiyun * 0x7f 3 0x7d 5 x x DIO2_11 10 11
148*4882a593Smuzhiyun * 0x7f 4 x 6 DIO2_13 14 12
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun static const struct ts5500_dio ts5500_dio2[] = {
151*4882a593Smuzhiyun TS5500_DIO_GROUP(0x7e, 0, 0x7d, 0),
152*4882a593Smuzhiyun TS5500_DIO_GROUP(0x7e, 4, 0x7d, 1),
153*4882a593Smuzhiyun TS5500_DIO_GROUP(0x7f, 0, 0x7d, 5),
154*4882a593Smuzhiyun TS5500_DIO_IN_IRQ(0x7f, 4, 6),
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun * TS-5500 LCD port used as DIO block
159*4882a593Smuzhiyun * TS-5600 LCD port is identical
160*4882a593Smuzhiyun *
161*4882a593Smuzhiyun * value control dir hw
162*4882a593Smuzhiyun * addr bit addr bit in out irq name pin offset
163*4882a593Smuzhiyun *
164*4882a593Smuzhiyun * 0x72 0 0x7d 2 x x LCD_0 8 0
165*4882a593Smuzhiyun * 0x72 1 0x7d 2 x x LCD_1 7 1
166*4882a593Smuzhiyun * 0x72 2 0x7d 2 x x LCD_2 10 2
167*4882a593Smuzhiyun * 0x72 3 0x7d 2 x x LCD_3 9 3
168*4882a593Smuzhiyun * 0x72 4 0x7d 3 x x LCD_4 12 4
169*4882a593Smuzhiyun * 0x72 5 0x7d 3 x x LCD_5 11 5
170*4882a593Smuzhiyun * 0x72 6 0x7d 3 x x LCD_6 14 6
171*4882a593Smuzhiyun * 0x72 7 0x7d 3 x x LCD_7 13 7
172*4882a593Smuzhiyun * 0x73 0 x LCD_EN 5 8
173*4882a593Smuzhiyun * 0x73 6 x LCD_WR 6 9
174*4882a593Smuzhiyun * 0x73 7 x 1 LCD_RS 3 10
175*4882a593Smuzhiyun */
176*4882a593Smuzhiyun static const struct ts5500_dio ts5500_lcd[] = {
177*4882a593Smuzhiyun TS5500_DIO_GROUP(0x72, 0, 0x7d, 2),
178*4882a593Smuzhiyun TS5500_DIO_GROUP(0x72, 4, 0x7d, 3),
179*4882a593Smuzhiyun TS5500_DIO_OUT(0x73, 0),
180*4882a593Smuzhiyun TS5500_DIO_IN(0x73, 6),
181*4882a593Smuzhiyun TS5500_DIO_IN_IRQ(0x73, 7, 1),
182*4882a593Smuzhiyun };
183*4882a593Smuzhiyun
ts5500_set_mask(u8 mask,u8 addr)184*4882a593Smuzhiyun static inline void ts5500_set_mask(u8 mask, u8 addr)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun u8 val = inb(addr);
187*4882a593Smuzhiyun val |= mask;
188*4882a593Smuzhiyun outb(val, addr);
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun
ts5500_clear_mask(u8 mask,u8 addr)191*4882a593Smuzhiyun static inline void ts5500_clear_mask(u8 mask, u8 addr)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun u8 val = inb(addr);
194*4882a593Smuzhiyun val &= ~mask;
195*4882a593Smuzhiyun outb(val, addr);
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
ts5500_gpio_input(struct gpio_chip * chip,unsigned offset)198*4882a593Smuzhiyun static int ts5500_gpio_input(struct gpio_chip *chip, unsigned offset)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun struct ts5500_priv *priv = gpiochip_get_data(chip);
201*4882a593Smuzhiyun const struct ts5500_dio line = priv->pinout[offset];
202*4882a593Smuzhiyun unsigned long flags;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun if (line.no_input)
205*4882a593Smuzhiyun return -ENXIO;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun if (line.no_output)
208*4882a593Smuzhiyun return 0;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
211*4882a593Smuzhiyun ts5500_clear_mask(line.control_mask, line.control_addr);
212*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun return 0;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
ts5500_gpio_get(struct gpio_chip * chip,unsigned offset)217*4882a593Smuzhiyun static int ts5500_gpio_get(struct gpio_chip *chip, unsigned offset)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun struct ts5500_priv *priv = gpiochip_get_data(chip);
220*4882a593Smuzhiyun const struct ts5500_dio line = priv->pinout[offset];
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun return !!(inb(line.value_addr) & line.value_mask);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
ts5500_gpio_output(struct gpio_chip * chip,unsigned offset,int val)225*4882a593Smuzhiyun static int ts5500_gpio_output(struct gpio_chip *chip, unsigned offset, int val)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun struct ts5500_priv *priv = gpiochip_get_data(chip);
228*4882a593Smuzhiyun const struct ts5500_dio line = priv->pinout[offset];
229*4882a593Smuzhiyun unsigned long flags;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun if (line.no_output)
232*4882a593Smuzhiyun return -ENXIO;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
235*4882a593Smuzhiyun if (!line.no_input)
236*4882a593Smuzhiyun ts5500_set_mask(line.control_mask, line.control_addr);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun if (val)
239*4882a593Smuzhiyun ts5500_set_mask(line.value_mask, line.value_addr);
240*4882a593Smuzhiyun else
241*4882a593Smuzhiyun ts5500_clear_mask(line.value_mask, line.value_addr);
242*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun return 0;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
ts5500_gpio_set(struct gpio_chip * chip,unsigned offset,int val)247*4882a593Smuzhiyun static void ts5500_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun struct ts5500_priv *priv = gpiochip_get_data(chip);
250*4882a593Smuzhiyun const struct ts5500_dio line = priv->pinout[offset];
251*4882a593Smuzhiyun unsigned long flags;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
254*4882a593Smuzhiyun if (val)
255*4882a593Smuzhiyun ts5500_set_mask(line.value_mask, line.value_addr);
256*4882a593Smuzhiyun else
257*4882a593Smuzhiyun ts5500_clear_mask(line.value_mask, line.value_addr);
258*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
ts5500_gpio_to_irq(struct gpio_chip * chip,unsigned offset)261*4882a593Smuzhiyun static int ts5500_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct ts5500_priv *priv = gpiochip_get_data(chip);
264*4882a593Smuzhiyun const struct ts5500_dio *block = priv->pinout;
265*4882a593Smuzhiyun const struct ts5500_dio line = block[offset];
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun /* Only one pin is connected to an interrupt */
268*4882a593Smuzhiyun if (line.irq)
269*4882a593Smuzhiyun return line.irq;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun /* As this pin is input-only, we may strap it to another in/out pin */
272*4882a593Smuzhiyun if (priv->strap)
273*4882a593Smuzhiyun return priv->hwirq;
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun return -ENXIO;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
ts5500_enable_irq(struct ts5500_priv * priv)278*4882a593Smuzhiyun static int ts5500_enable_irq(struct ts5500_priv *priv)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun int ret = 0;
281*4882a593Smuzhiyun unsigned long flags;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
284*4882a593Smuzhiyun if (priv->hwirq == 7)
285*4882a593Smuzhiyun ts5500_set_mask(BIT(7), 0x7a); /* DIO1_13 on IRQ7 */
286*4882a593Smuzhiyun else if (priv->hwirq == 6)
287*4882a593Smuzhiyun ts5500_set_mask(BIT(7), 0x7d); /* DIO2_13 on IRQ6 */
288*4882a593Smuzhiyun else if (priv->hwirq == 1)
289*4882a593Smuzhiyun ts5500_set_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */
290*4882a593Smuzhiyun else
291*4882a593Smuzhiyun ret = -EINVAL;
292*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return ret;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
ts5500_disable_irq(struct ts5500_priv * priv)297*4882a593Smuzhiyun static void ts5500_disable_irq(struct ts5500_priv *priv)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun unsigned long flags;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
302*4882a593Smuzhiyun if (priv->hwirq == 7)
303*4882a593Smuzhiyun ts5500_clear_mask(BIT(7), 0x7a); /* DIO1_13 on IRQ7 */
304*4882a593Smuzhiyun else if (priv->hwirq == 6)
305*4882a593Smuzhiyun ts5500_clear_mask(BIT(7), 0x7d); /* DIO2_13 on IRQ6 */
306*4882a593Smuzhiyun else if (priv->hwirq == 1)
307*4882a593Smuzhiyun ts5500_clear_mask(BIT(6), 0x7d); /* LCD_RS on IRQ1 */
308*4882a593Smuzhiyun else
309*4882a593Smuzhiyun dev_err(priv->gpio_chip.parent, "invalid hwirq %d\n",
310*4882a593Smuzhiyun priv->hwirq);
311*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
312*4882a593Smuzhiyun }
313*4882a593Smuzhiyun
ts5500_dio_probe(struct platform_device * pdev)314*4882a593Smuzhiyun static int ts5500_dio_probe(struct platform_device *pdev)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun enum ts5500_blocks block = platform_get_device_id(pdev)->driver_data;
317*4882a593Smuzhiyun struct device *dev = &pdev->dev;
318*4882a593Smuzhiyun const char *name = dev_name(dev);
319*4882a593Smuzhiyun struct ts5500_priv *priv;
320*4882a593Smuzhiyun struct resource *res;
321*4882a593Smuzhiyun unsigned long flags;
322*4882a593Smuzhiyun int ret;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
325*4882a593Smuzhiyun if (!res) {
326*4882a593Smuzhiyun dev_err(dev, "missing IRQ resource\n");
327*4882a593Smuzhiyun return -EINVAL;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun priv = devm_kzalloc(dev, sizeof(struct ts5500_priv), GFP_KERNEL);
331*4882a593Smuzhiyun if (!priv)
332*4882a593Smuzhiyun return -ENOMEM;
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun platform_set_drvdata(pdev, priv);
335*4882a593Smuzhiyun priv->hwirq = res->start;
336*4882a593Smuzhiyun spin_lock_init(&priv->lock);
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun priv->gpio_chip.owner = THIS_MODULE;
339*4882a593Smuzhiyun priv->gpio_chip.label = name;
340*4882a593Smuzhiyun priv->gpio_chip.parent = dev;
341*4882a593Smuzhiyun priv->gpio_chip.direction_input = ts5500_gpio_input;
342*4882a593Smuzhiyun priv->gpio_chip.direction_output = ts5500_gpio_output;
343*4882a593Smuzhiyun priv->gpio_chip.get = ts5500_gpio_get;
344*4882a593Smuzhiyun priv->gpio_chip.set = ts5500_gpio_set;
345*4882a593Smuzhiyun priv->gpio_chip.to_irq = ts5500_gpio_to_irq;
346*4882a593Smuzhiyun priv->gpio_chip.base = -1;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun switch (block) {
349*4882a593Smuzhiyun case TS5500_DIO1:
350*4882a593Smuzhiyun priv->pinout = ts5500_dio1;
351*4882a593Smuzhiyun priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_dio1);
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun if (!devm_request_region(dev, 0x7a, 3, name)) {
354*4882a593Smuzhiyun dev_err(dev, "failed to request %s ports\n", name);
355*4882a593Smuzhiyun return -EBUSY;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun break;
358*4882a593Smuzhiyun case TS5500_DIO2:
359*4882a593Smuzhiyun priv->pinout = ts5500_dio2;
360*4882a593Smuzhiyun priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_dio2);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun if (!devm_request_region(dev, 0x7e, 2, name)) {
363*4882a593Smuzhiyun dev_err(dev, "failed to request %s ports\n", name);
364*4882a593Smuzhiyun return -EBUSY;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun if (hex7d_reserved)
368*4882a593Smuzhiyun break;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun if (!devm_request_region(dev, 0x7d, 1, name)) {
371*4882a593Smuzhiyun dev_err(dev, "failed to request %s 7D\n", name);
372*4882a593Smuzhiyun return -EBUSY;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun hex7d_reserved = true;
376*4882a593Smuzhiyun break;
377*4882a593Smuzhiyun case TS5500_LCD:
378*4882a593Smuzhiyun case TS5600_LCD:
379*4882a593Smuzhiyun priv->pinout = ts5500_lcd;
380*4882a593Smuzhiyun priv->gpio_chip.ngpio = ARRAY_SIZE(ts5500_lcd);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun if (!devm_request_region(dev, 0x72, 2, name)) {
383*4882a593Smuzhiyun dev_err(dev, "failed to request %s ports\n", name);
384*4882a593Smuzhiyun return -EBUSY;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun if (!hex7d_reserved) {
388*4882a593Smuzhiyun if (!devm_request_region(dev, 0x7d, 1, name)) {
389*4882a593Smuzhiyun dev_err(dev, "failed to request %s 7D\n", name);
390*4882a593Smuzhiyun return -EBUSY;
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun hex7d_reserved = true;
394*4882a593Smuzhiyun }
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun /* Ensure usage of LCD port as DIO */
397*4882a593Smuzhiyun spin_lock_irqsave(&priv->lock, flags);
398*4882a593Smuzhiyun ts5500_clear_mask(BIT(4), 0x7d);
399*4882a593Smuzhiyun spin_unlock_irqrestore(&priv->lock, flags);
400*4882a593Smuzhiyun break;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun ret = devm_gpiochip_add_data(dev, &priv->gpio_chip, priv);
404*4882a593Smuzhiyun if (ret) {
405*4882a593Smuzhiyun dev_err(dev, "failed to register the gpio chip\n");
406*4882a593Smuzhiyun return ret;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun ret = ts5500_enable_irq(priv);
410*4882a593Smuzhiyun if (ret) {
411*4882a593Smuzhiyun dev_err(dev, "invalid interrupt %d\n", priv->hwirq);
412*4882a593Smuzhiyun return ret;
413*4882a593Smuzhiyun }
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun return 0;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun
ts5500_dio_remove(struct platform_device * pdev)418*4882a593Smuzhiyun static int ts5500_dio_remove(struct platform_device *pdev)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun struct ts5500_priv *priv = platform_get_drvdata(pdev);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun ts5500_disable_irq(priv);
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun return 0;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun static const struct platform_device_id ts5500_dio_ids[] = {
428*4882a593Smuzhiyun { "ts5500-dio1", TS5500_DIO1 },
429*4882a593Smuzhiyun { "ts5500-dio2", TS5500_DIO2 },
430*4882a593Smuzhiyun { "ts5500-dio-lcd", TS5500_LCD },
431*4882a593Smuzhiyun { "ts5600-dio-lcd", TS5600_LCD },
432*4882a593Smuzhiyun { }
433*4882a593Smuzhiyun };
434*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, ts5500_dio_ids);
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun static struct platform_driver ts5500_dio_driver = {
437*4882a593Smuzhiyun .driver = {
438*4882a593Smuzhiyun .name = "ts5500-dio",
439*4882a593Smuzhiyun },
440*4882a593Smuzhiyun .probe = ts5500_dio_probe,
441*4882a593Smuzhiyun .remove = ts5500_dio_remove,
442*4882a593Smuzhiyun .id_table = ts5500_dio_ids,
443*4882a593Smuzhiyun };
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun module_platform_driver(ts5500_dio_driver);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun MODULE_LICENSE("GPL");
448*4882a593Smuzhiyun MODULE_AUTHOR("Savoir-faire Linux Inc. <kernel@savoirfairelinux.com>");
449*4882a593Smuzhiyun MODULE_DESCRIPTION("Technologic Systems TS-5500 Digital I/O driver");
450