xref: /OK3568_Linux_fs/kernel/drivers/gpio/gpio-tps65218.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright 2015 Verifone Int.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Nicolas Saenz Julienne <nicolassaenzj@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This driver is based on the gpio-tps65912 implementation.
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/errno.h>
13*4882a593Smuzhiyun #include <linux/gpio/driver.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/mfd/tps65218.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun struct tps65218_gpio {
19*4882a593Smuzhiyun 	struct tps65218 *tps65218;
20*4882a593Smuzhiyun 	struct gpio_chip gpio_chip;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun 
tps65218_gpio_get(struct gpio_chip * gc,unsigned offset)23*4882a593Smuzhiyun static int tps65218_gpio_get(struct gpio_chip *gc, unsigned offset)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
26*4882a593Smuzhiyun 	struct tps65218 *tps65218 = tps65218_gpio->tps65218;
27*4882a593Smuzhiyun 	unsigned int val;
28*4882a593Smuzhiyun 	int ret;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	ret = regmap_read(tps65218->regmap, TPS65218_REG_ENABLE2, &val);
31*4882a593Smuzhiyun 	if (ret)
32*4882a593Smuzhiyun 		return ret;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	return !!(val & (TPS65218_ENABLE2_GPIO1 << offset));
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun 
tps65218_gpio_set(struct gpio_chip * gc,unsigned offset,int value)37*4882a593Smuzhiyun static void tps65218_gpio_set(struct gpio_chip *gc, unsigned offset,
38*4882a593Smuzhiyun 			      int value)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
41*4882a593Smuzhiyun 	struct tps65218 *tps65218 = tps65218_gpio->tps65218;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	if (value)
44*4882a593Smuzhiyun 		tps65218_set_bits(tps65218, TPS65218_REG_ENABLE2,
45*4882a593Smuzhiyun 				  TPS65218_ENABLE2_GPIO1 << offset,
46*4882a593Smuzhiyun 				  TPS65218_ENABLE2_GPIO1 << offset,
47*4882a593Smuzhiyun 				  TPS65218_PROTECT_L1);
48*4882a593Smuzhiyun 	else
49*4882a593Smuzhiyun 		tps65218_clear_bits(tps65218, TPS65218_REG_ENABLE2,
50*4882a593Smuzhiyun 				    TPS65218_ENABLE2_GPIO1 << offset,
51*4882a593Smuzhiyun 				    TPS65218_PROTECT_L1);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
tps65218_gpio_output(struct gpio_chip * gc,unsigned offset,int value)54*4882a593Smuzhiyun static int tps65218_gpio_output(struct gpio_chip *gc, unsigned offset,
55*4882a593Smuzhiyun 				int value)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	/* Only drives GPOs */
58*4882a593Smuzhiyun 	tps65218_gpio_set(gc, offset, value);
59*4882a593Smuzhiyun 	return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
tps65218_gpio_input(struct gpio_chip * gc,unsigned offset)62*4882a593Smuzhiyun static int tps65218_gpio_input(struct gpio_chip *gc, unsigned offset)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun 	return -EPERM;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
tps65218_gpio_request(struct gpio_chip * gc,unsigned offset)67*4882a593Smuzhiyun static int tps65218_gpio_request(struct gpio_chip *gc, unsigned offset)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
70*4882a593Smuzhiyun 	struct tps65218 *tps65218 = tps65218_gpio->tps65218;
71*4882a593Smuzhiyun 	int ret;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	if (gpiochip_line_is_open_source(gc, offset)) {
74*4882a593Smuzhiyun 		dev_err(gc->parent, "can't work as open source\n");
75*4882a593Smuzhiyun 		return -EINVAL;
76*4882a593Smuzhiyun 	}
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	switch (offset) {
79*4882a593Smuzhiyun 	case 0:
80*4882a593Smuzhiyun 		if (!gpiochip_line_is_open_drain(gc, offset)) {
81*4882a593Smuzhiyun 			dev_err(gc->parent, "GPO1 works only as open drain\n");
82*4882a593Smuzhiyun 			return -EINVAL;
83*4882a593Smuzhiyun 		}
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 		/* Disable sequencer for GPO1 */
86*4882a593Smuzhiyun 		ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7,
87*4882a593Smuzhiyun 					  TPS65218_SEQ7_GPO1_SEQ_MASK,
88*4882a593Smuzhiyun 					  TPS65218_PROTECT_L1);
89*4882a593Smuzhiyun 		if (ret)
90*4882a593Smuzhiyun 			return ret;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 		/* Setup GPO1 */
93*4882a593Smuzhiyun 		ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1,
94*4882a593Smuzhiyun 					  TPS65218_CONFIG1_IO1_SEL,
95*4882a593Smuzhiyun 					  TPS65218_PROTECT_L1);
96*4882a593Smuzhiyun 		if (ret)
97*4882a593Smuzhiyun 			return ret;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 		break;
100*4882a593Smuzhiyun 	case 1:
101*4882a593Smuzhiyun 		/* Setup GPO2 */
102*4882a593Smuzhiyun 		ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG1,
103*4882a593Smuzhiyun 					  TPS65218_CONFIG1_IO1_SEL,
104*4882a593Smuzhiyun 					  TPS65218_PROTECT_L1);
105*4882a593Smuzhiyun 		if (ret)
106*4882a593Smuzhiyun 			return ret;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 		break;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	case 2:
111*4882a593Smuzhiyun 		if (!gpiochip_line_is_open_drain(gc, offset)) {
112*4882a593Smuzhiyun 			dev_err(gc->parent, "GPO3 works only as open drain\n");
113*4882a593Smuzhiyun 			return -EINVAL;
114*4882a593Smuzhiyun 		}
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 		/* Disable sequencer for GPO3 */
117*4882a593Smuzhiyun 		ret = tps65218_clear_bits(tps65218, TPS65218_REG_SEQ7,
118*4882a593Smuzhiyun 					  TPS65218_SEQ7_GPO3_SEQ_MASK,
119*4882a593Smuzhiyun 					  TPS65218_PROTECT_L1);
120*4882a593Smuzhiyun 		if (ret)
121*4882a593Smuzhiyun 			return ret;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 		/* Setup GPO3 */
124*4882a593Smuzhiyun 		ret = tps65218_clear_bits(tps65218, TPS65218_REG_CONFIG2,
125*4882a593Smuzhiyun 					  TPS65218_CONFIG2_DC12_RST,
126*4882a593Smuzhiyun 					  TPS65218_PROTECT_L1);
127*4882a593Smuzhiyun 		if (ret)
128*4882a593Smuzhiyun 			return ret;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 		break;
131*4882a593Smuzhiyun 	default:
132*4882a593Smuzhiyun 		return -EINVAL;
133*4882a593Smuzhiyun 	}
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
tps65218_gpio_set_config(struct gpio_chip * gc,unsigned offset,unsigned long config)138*4882a593Smuzhiyun static int tps65218_gpio_set_config(struct gpio_chip *gc, unsigned offset,
139*4882a593Smuzhiyun 				    unsigned long config)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun 	struct tps65218_gpio *tps65218_gpio = gpiochip_get_data(gc);
142*4882a593Smuzhiyun 	struct tps65218 *tps65218 = tps65218_gpio->tps65218;
143*4882a593Smuzhiyun 	enum pin_config_param param = pinconf_to_config_param(config);
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	switch (offset) {
146*4882a593Smuzhiyun 	case 0:
147*4882a593Smuzhiyun 	case 2:
148*4882a593Smuzhiyun 		/* GPO1 is hardwired to be open drain */
149*4882a593Smuzhiyun 		if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
150*4882a593Smuzhiyun 			return 0;
151*4882a593Smuzhiyun 		return -ENOTSUPP;
152*4882a593Smuzhiyun 	case 1:
153*4882a593Smuzhiyun 		/* GPO2 is push-pull by default, can be set as open drain. */
154*4882a593Smuzhiyun 		if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
155*4882a593Smuzhiyun 			return tps65218_clear_bits(tps65218,
156*4882a593Smuzhiyun 						   TPS65218_REG_CONFIG1,
157*4882a593Smuzhiyun 						   TPS65218_CONFIG1_GPO2_BUF,
158*4882a593Smuzhiyun 						   TPS65218_PROTECT_L1);
159*4882a593Smuzhiyun 		if (param == PIN_CONFIG_DRIVE_PUSH_PULL)
160*4882a593Smuzhiyun 			return tps65218_set_bits(tps65218,
161*4882a593Smuzhiyun 						 TPS65218_REG_CONFIG1,
162*4882a593Smuzhiyun 						 TPS65218_CONFIG1_GPO2_BUF,
163*4882a593Smuzhiyun 						 TPS65218_CONFIG1_GPO2_BUF,
164*4882a593Smuzhiyun 						 TPS65218_PROTECT_L1);
165*4882a593Smuzhiyun 		return -ENOTSUPP;
166*4882a593Smuzhiyun 	default:
167*4882a593Smuzhiyun 		break;
168*4882a593Smuzhiyun 	}
169*4882a593Smuzhiyun 	return -ENOTSUPP;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun static const struct gpio_chip template_chip = {
173*4882a593Smuzhiyun 	.label			= "gpio-tps65218",
174*4882a593Smuzhiyun 	.owner			= THIS_MODULE,
175*4882a593Smuzhiyun 	.request		= tps65218_gpio_request,
176*4882a593Smuzhiyun 	.direction_output	= tps65218_gpio_output,
177*4882a593Smuzhiyun 	.direction_input	= tps65218_gpio_input,
178*4882a593Smuzhiyun 	.get			= tps65218_gpio_get,
179*4882a593Smuzhiyun 	.set			= tps65218_gpio_set,
180*4882a593Smuzhiyun 	.set_config		= tps65218_gpio_set_config,
181*4882a593Smuzhiyun 	.can_sleep		= true,
182*4882a593Smuzhiyun 	.ngpio			= 3,
183*4882a593Smuzhiyun 	.base			= -1,
184*4882a593Smuzhiyun };
185*4882a593Smuzhiyun 
tps65218_gpio_probe(struct platform_device * pdev)186*4882a593Smuzhiyun static int tps65218_gpio_probe(struct platform_device *pdev)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	struct tps65218 *tps65218 = dev_get_drvdata(pdev->dev.parent);
189*4882a593Smuzhiyun 	struct tps65218_gpio *tps65218_gpio;
190*4882a593Smuzhiyun 	int ret;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	tps65218_gpio = devm_kzalloc(&pdev->dev, sizeof(*tps65218_gpio),
193*4882a593Smuzhiyun 				     GFP_KERNEL);
194*4882a593Smuzhiyun 	if (!tps65218_gpio)
195*4882a593Smuzhiyun 		return -ENOMEM;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	tps65218_gpio->tps65218 = tps65218;
198*4882a593Smuzhiyun 	tps65218_gpio->gpio_chip = template_chip;
199*4882a593Smuzhiyun 	tps65218_gpio->gpio_chip.parent = &pdev->dev;
200*4882a593Smuzhiyun #ifdef CONFIG_OF_GPIO
201*4882a593Smuzhiyun 	tps65218_gpio->gpio_chip.of_node = pdev->dev.of_node;
202*4882a593Smuzhiyun #endif
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	ret = devm_gpiochip_add_data(&pdev->dev, &tps65218_gpio->gpio_chip,
205*4882a593Smuzhiyun 				     tps65218_gpio);
206*4882a593Smuzhiyun 	if (ret < 0) {
207*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Failed to register gpiochip, %d\n", ret);
208*4882a593Smuzhiyun 		return ret;
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	platform_set_drvdata(pdev, tps65218_gpio);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	return ret;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun static const struct of_device_id tps65218_dt_match[] = {
217*4882a593Smuzhiyun 	{ .compatible = "ti,tps65218-gpio" },
218*4882a593Smuzhiyun 	{  }
219*4882a593Smuzhiyun };
220*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, tps65218_dt_match);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun static const struct platform_device_id tps65218_gpio_id_table[] = {
223*4882a593Smuzhiyun 	{ "tps65218-gpio", },
224*4882a593Smuzhiyun 	{ /* sentinel */ }
225*4882a593Smuzhiyun };
226*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, tps65218_gpio_id_table);
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun static struct platform_driver tps65218_gpio_driver = {
229*4882a593Smuzhiyun 	.driver = {
230*4882a593Smuzhiyun 		.name = "tps65218-gpio",
231*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(tps65218_dt_match)
232*4882a593Smuzhiyun 	},
233*4882a593Smuzhiyun 	.probe = tps65218_gpio_probe,
234*4882a593Smuzhiyun 	.id_table = tps65218_gpio_id_table,
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun module_platform_driver(tps65218_gpio_driver);
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun MODULE_AUTHOR("Nicolas Saenz Julienne <nicolassaenzj@gmail.com>");
240*4882a593Smuzhiyun MODULE_DESCRIPTION("GPO interface for TPS65218 PMICs");
241*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
242*4882a593Smuzhiyun MODULE_ALIAS("platform:tps65218-gpio");
243