1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * MPC52xx gpio driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/of.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/of_gpio.h>
12*4882a593Smuzhiyun #include <linux/io.h>
13*4882a593Smuzhiyun #include <linux/of_platform.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <asm/mpc52xx.h>
17*4882a593Smuzhiyun #include <sysdev/fsl_soc.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static DEFINE_SPINLOCK(gpio_lock);
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun struct mpc52xx_gpiochip {
22*4882a593Smuzhiyun struct of_mm_gpio_chip mmchip;
23*4882a593Smuzhiyun unsigned int shadow_dvo;
24*4882a593Smuzhiyun unsigned int shadow_gpioe;
25*4882a593Smuzhiyun unsigned int shadow_ddr;
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun * GPIO LIB API implementation for wakeup GPIOs.
30*4882a593Smuzhiyun *
31*4882a593Smuzhiyun * There's a maximum of 8 wakeup GPIOs. Which of these are available
32*4882a593Smuzhiyun * for use depends on your board setup.
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * 0 -> GPIO_WKUP_7
35*4882a593Smuzhiyun * 1 -> GPIO_WKUP_6
36*4882a593Smuzhiyun * 2 -> PSC6_1
37*4882a593Smuzhiyun * 3 -> PSC6_0
38*4882a593Smuzhiyun * 4 -> ETH_17
39*4882a593Smuzhiyun * 5 -> PSC3_9
40*4882a593Smuzhiyun * 6 -> PSC2_4
41*4882a593Smuzhiyun * 7 -> PSC1_4
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun */
mpc52xx_wkup_gpio_get(struct gpio_chip * gc,unsigned int gpio)44*4882a593Smuzhiyun static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
47*4882a593Smuzhiyun struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
48*4882a593Smuzhiyun unsigned int ret;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun ret = (in_8(®s->wkup_ival) >> (7 - gpio)) & 1;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun return ret;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static inline void
__mpc52xx_wkup_gpio_set(struct gpio_chip * gc,unsigned int gpio,int val)58*4882a593Smuzhiyun __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
61*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
62*4882a593Smuzhiyun struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun if (val)
65*4882a593Smuzhiyun chip->shadow_dvo |= 1 << (7 - gpio);
66*4882a593Smuzhiyun else
67*4882a593Smuzhiyun chip->shadow_dvo &= ~(1 << (7 - gpio));
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun out_8(®s->wkup_dvo, chip->shadow_dvo);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static void
mpc52xx_wkup_gpio_set(struct gpio_chip * gc,unsigned int gpio,int val)73*4882a593Smuzhiyun mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun unsigned long flags;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun spin_lock_irqsave(&gpio_lock, flags);
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun __mpc52xx_wkup_gpio_set(gc, gpio, val);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun spin_unlock_irqrestore(&gpio_lock, flags);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
mpc52xx_wkup_gpio_dir_in(struct gpio_chip * gc,unsigned int gpio)86*4882a593Smuzhiyun static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
89*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
90*4882a593Smuzhiyun struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
91*4882a593Smuzhiyun unsigned long flags;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun spin_lock_irqsave(&gpio_lock, flags);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /* set the direction */
96*4882a593Smuzhiyun chip->shadow_ddr &= ~(1 << (7 - gpio));
97*4882a593Smuzhiyun out_8(®s->wkup_ddr, chip->shadow_ddr);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* and enable the pin */
100*4882a593Smuzhiyun chip->shadow_gpioe |= 1 << (7 - gpio);
101*4882a593Smuzhiyun out_8(®s->wkup_gpioe, chip->shadow_gpioe);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun spin_unlock_irqrestore(&gpio_lock, flags);
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun static int
mpc52xx_wkup_gpio_dir_out(struct gpio_chip * gc,unsigned int gpio,int val)109*4882a593Smuzhiyun mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
112*4882a593Smuzhiyun struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
113*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
114*4882a593Smuzhiyun unsigned long flags;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun spin_lock_irqsave(&gpio_lock, flags);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun __mpc52xx_wkup_gpio_set(gc, gpio, val);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* Then set direction */
121*4882a593Smuzhiyun chip->shadow_ddr |= 1 << (7 - gpio);
122*4882a593Smuzhiyun out_8(®s->wkup_ddr, chip->shadow_ddr);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* Finally enable the pin */
125*4882a593Smuzhiyun chip->shadow_gpioe |= 1 << (7 - gpio);
126*4882a593Smuzhiyun out_8(®s->wkup_gpioe, chip->shadow_gpioe);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun spin_unlock_irqrestore(&gpio_lock, flags);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun return 0;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
mpc52xx_wkup_gpiochip_probe(struct platform_device * ofdev)135*4882a593Smuzhiyun static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip;
138*4882a593Smuzhiyun struct mpc52xx_gpio_wkup __iomem *regs;
139*4882a593Smuzhiyun struct gpio_chip *gc;
140*4882a593Smuzhiyun int ret;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
143*4882a593Smuzhiyun if (!chip)
144*4882a593Smuzhiyun return -ENOMEM;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun platform_set_drvdata(ofdev, chip);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun gc = &chip->mmchip.gc;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun gc->ngpio = 8;
151*4882a593Smuzhiyun gc->direction_input = mpc52xx_wkup_gpio_dir_in;
152*4882a593Smuzhiyun gc->direction_output = mpc52xx_wkup_gpio_dir_out;
153*4882a593Smuzhiyun gc->get = mpc52xx_wkup_gpio_get;
154*4882a593Smuzhiyun gc->set = mpc52xx_wkup_gpio_set;
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
157*4882a593Smuzhiyun if (ret)
158*4882a593Smuzhiyun return ret;
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun regs = chip->mmchip.regs;
161*4882a593Smuzhiyun chip->shadow_gpioe = in_8(®s->wkup_gpioe);
162*4882a593Smuzhiyun chip->shadow_ddr = in_8(®s->wkup_ddr);
163*4882a593Smuzhiyun chip->shadow_dvo = in_8(®s->wkup_dvo);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
mpc52xx_gpiochip_remove(struct platform_device * ofdev)168*4882a593Smuzhiyun static int mpc52xx_gpiochip_remove(struct platform_device *ofdev)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun of_mm_gpiochip_remove(&chip->mmchip);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun return 0;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
178*4882a593Smuzhiyun { .compatible = "fsl,mpc5200-gpio-wkup", },
179*4882a593Smuzhiyun {}
180*4882a593Smuzhiyun };
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
183*4882a593Smuzhiyun .driver = {
184*4882a593Smuzhiyun .name = "mpc5200-gpio-wkup",
185*4882a593Smuzhiyun .of_match_table = mpc52xx_wkup_gpiochip_match,
186*4882a593Smuzhiyun },
187*4882a593Smuzhiyun .probe = mpc52xx_wkup_gpiochip_probe,
188*4882a593Smuzhiyun .remove = mpc52xx_gpiochip_remove,
189*4882a593Smuzhiyun };
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /*
192*4882a593Smuzhiyun * GPIO LIB API implementation for simple GPIOs
193*4882a593Smuzhiyun *
194*4882a593Smuzhiyun * There's a maximum of 32 simple GPIOs. Which of these are available
195*4882a593Smuzhiyun * for use depends on your board setup.
196*4882a593Smuzhiyun * The numbering reflects the bit numbering in the port registers:
197*4882a593Smuzhiyun *
198*4882a593Smuzhiyun * 0..1 > reserved
199*4882a593Smuzhiyun * 2..3 > IRDA
200*4882a593Smuzhiyun * 4..7 > ETHR
201*4882a593Smuzhiyun * 8..11 > reserved
202*4882a593Smuzhiyun * 12..15 > USB
203*4882a593Smuzhiyun * 16..17 > reserved
204*4882a593Smuzhiyun * 18..23 > PSC3
205*4882a593Smuzhiyun * 24..27 > PSC2
206*4882a593Smuzhiyun * 28..31 > PSC1
207*4882a593Smuzhiyun */
mpc52xx_simple_gpio_get(struct gpio_chip * gc,unsigned int gpio)208*4882a593Smuzhiyun static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
211*4882a593Smuzhiyun struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
212*4882a593Smuzhiyun unsigned int ret;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun ret = (in_be32(®s->simple_ival) >> (31 - gpio)) & 1;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun return ret;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun static inline void
__mpc52xx_simple_gpio_set(struct gpio_chip * gc,unsigned int gpio,int val)220*4882a593Smuzhiyun __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
223*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
224*4882a593Smuzhiyun struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun if (val)
227*4882a593Smuzhiyun chip->shadow_dvo |= 1 << (31 - gpio);
228*4882a593Smuzhiyun else
229*4882a593Smuzhiyun chip->shadow_dvo &= ~(1 << (31 - gpio));
230*4882a593Smuzhiyun out_be32(®s->simple_dvo, chip->shadow_dvo);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun static void
mpc52xx_simple_gpio_set(struct gpio_chip * gc,unsigned int gpio,int val)234*4882a593Smuzhiyun mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun unsigned long flags;
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun spin_lock_irqsave(&gpio_lock, flags);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun __mpc52xx_simple_gpio_set(gc, gpio, val);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun spin_unlock_irqrestore(&gpio_lock, flags);
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
mpc52xx_simple_gpio_dir_in(struct gpio_chip * gc,unsigned int gpio)247*4882a593Smuzhiyun static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
250*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
251*4882a593Smuzhiyun struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
252*4882a593Smuzhiyun unsigned long flags;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun spin_lock_irqsave(&gpio_lock, flags);
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /* set the direction */
257*4882a593Smuzhiyun chip->shadow_ddr &= ~(1 << (31 - gpio));
258*4882a593Smuzhiyun out_be32(®s->simple_ddr, chip->shadow_ddr);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /* and enable the pin */
261*4882a593Smuzhiyun chip->shadow_gpioe |= 1 << (31 - gpio);
262*4882a593Smuzhiyun out_be32(®s->simple_gpioe, chip->shadow_gpioe);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun spin_unlock_irqrestore(&gpio_lock, flags);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun return 0;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun static int
mpc52xx_simple_gpio_dir_out(struct gpio_chip * gc,unsigned int gpio,int val)270*4882a593Smuzhiyun mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
271*4882a593Smuzhiyun {
272*4882a593Smuzhiyun struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
273*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip = gpiochip_get_data(gc);
274*4882a593Smuzhiyun struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
275*4882a593Smuzhiyun unsigned long flags;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun spin_lock_irqsave(&gpio_lock, flags);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun /* First set initial value */
280*4882a593Smuzhiyun __mpc52xx_simple_gpio_set(gc, gpio, val);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* Then set direction */
283*4882a593Smuzhiyun chip->shadow_ddr |= 1 << (31 - gpio);
284*4882a593Smuzhiyun out_be32(®s->simple_ddr, chip->shadow_ddr);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun /* Finally enable the pin */
287*4882a593Smuzhiyun chip->shadow_gpioe |= 1 << (31 - gpio);
288*4882a593Smuzhiyun out_be32(®s->simple_gpioe, chip->shadow_gpioe);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun spin_unlock_irqrestore(&gpio_lock, flags);
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun return 0;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
mpc52xx_simple_gpiochip_probe(struct platform_device * ofdev)297*4882a593Smuzhiyun static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun struct mpc52xx_gpiochip *chip;
300*4882a593Smuzhiyun struct gpio_chip *gc;
301*4882a593Smuzhiyun struct mpc52xx_gpio __iomem *regs;
302*4882a593Smuzhiyun int ret;
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
305*4882a593Smuzhiyun if (!chip)
306*4882a593Smuzhiyun return -ENOMEM;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun platform_set_drvdata(ofdev, chip);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun gc = &chip->mmchip.gc;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun gc->ngpio = 32;
313*4882a593Smuzhiyun gc->direction_input = mpc52xx_simple_gpio_dir_in;
314*4882a593Smuzhiyun gc->direction_output = mpc52xx_simple_gpio_dir_out;
315*4882a593Smuzhiyun gc->get = mpc52xx_simple_gpio_get;
316*4882a593Smuzhiyun gc->set = mpc52xx_simple_gpio_set;
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun ret = of_mm_gpiochip_add_data(ofdev->dev.of_node, &chip->mmchip, chip);
319*4882a593Smuzhiyun if (ret)
320*4882a593Smuzhiyun return ret;
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun regs = chip->mmchip.regs;
323*4882a593Smuzhiyun chip->shadow_gpioe = in_be32(®s->simple_gpioe);
324*4882a593Smuzhiyun chip->shadow_ddr = in_be32(®s->simple_ddr);
325*4882a593Smuzhiyun chip->shadow_dvo = in_be32(®s->simple_dvo);
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun return 0;
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
331*4882a593Smuzhiyun { .compatible = "fsl,mpc5200-gpio", },
332*4882a593Smuzhiyun {}
333*4882a593Smuzhiyun };
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun static struct platform_driver mpc52xx_simple_gpiochip_driver = {
336*4882a593Smuzhiyun .driver = {
337*4882a593Smuzhiyun .name = "mpc5200-gpio",
338*4882a593Smuzhiyun .of_match_table = mpc52xx_simple_gpiochip_match,
339*4882a593Smuzhiyun },
340*4882a593Smuzhiyun .probe = mpc52xx_simple_gpiochip_probe,
341*4882a593Smuzhiyun .remove = mpc52xx_gpiochip_remove,
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun static struct platform_driver * const drivers[] = {
345*4882a593Smuzhiyun &mpc52xx_wkup_gpiochip_driver,
346*4882a593Smuzhiyun &mpc52xx_simple_gpiochip_driver,
347*4882a593Smuzhiyun };
348*4882a593Smuzhiyun
mpc52xx_gpio_init(void)349*4882a593Smuzhiyun static int __init mpc52xx_gpio_init(void)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun /* Make sure we get initialised before anyone else tries to use us */
355*4882a593Smuzhiyun subsys_initcall(mpc52xx_gpio_init);
356*4882a593Smuzhiyun
mpc52xx_gpio_exit(void)357*4882a593Smuzhiyun static void __exit mpc52xx_gpio_exit(void)
358*4882a593Smuzhiyun {
359*4882a593Smuzhiyun platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun module_exit(mpc52xx_gpio_exit);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
364*4882a593Smuzhiyun MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
365*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
366*4882a593Smuzhiyun
367