1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2009-2012 Freescale Semiconductor, Inc. All Rights Reserved.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Wu Guoxing <b39297@freescale.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/slab.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/gpio/driver.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define GPIO_GROUP_NUM 2
15*4882a593Smuzhiyun #define GPIO_NUM_PER_GROUP 8
16*4882a593Smuzhiyun #define GPIO_NUM (GPIO_GROUP_NUM*GPIO_NUM_PER_GROUP)
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun struct mc9s08dz60 {
19*4882a593Smuzhiyun struct i2c_client *client;
20*4882a593Smuzhiyun struct gpio_chip chip;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
mc9s_gpio_to_reg_and_bit(int offset,u8 * reg,u8 * bit)23*4882a593Smuzhiyun static void mc9s_gpio_to_reg_and_bit(int offset, u8 *reg, u8 *bit)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun *reg = 0x20 + offset / GPIO_NUM_PER_GROUP;
26*4882a593Smuzhiyun *bit = offset % GPIO_NUM_PER_GROUP;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
mc9s08dz60_get_value(struct gpio_chip * gc,unsigned offset)29*4882a593Smuzhiyun static int mc9s08dz60_get_value(struct gpio_chip *gc, unsigned offset)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun u8 reg, bit;
32*4882a593Smuzhiyun s32 value;
33*4882a593Smuzhiyun struct mc9s08dz60 *mc9s = gpiochip_get_data(gc);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun mc9s_gpio_to_reg_and_bit(offset, ®, &bit);
36*4882a593Smuzhiyun value = i2c_smbus_read_byte_data(mc9s->client, reg);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return (value >= 0) ? (value >> bit) & 0x1 : 0;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
mc9s08dz60_set(struct mc9s08dz60 * mc9s,unsigned offset,int val)41*4882a593Smuzhiyun static int mc9s08dz60_set(struct mc9s08dz60 *mc9s, unsigned offset, int val)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun u8 reg, bit;
44*4882a593Smuzhiyun s32 value;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun mc9s_gpio_to_reg_and_bit(offset, ®, &bit);
47*4882a593Smuzhiyun value = i2c_smbus_read_byte_data(mc9s->client, reg);
48*4882a593Smuzhiyun if (value >= 0) {
49*4882a593Smuzhiyun if (val)
50*4882a593Smuzhiyun value |= 1 << bit;
51*4882a593Smuzhiyun else
52*4882a593Smuzhiyun value &= ~(1 << bit);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun return i2c_smbus_write_byte_data(mc9s->client, reg, value);
55*4882a593Smuzhiyun } else
56*4882a593Smuzhiyun return value;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun
mc9s08dz60_set_value(struct gpio_chip * gc,unsigned offset,int val)61*4882a593Smuzhiyun static void mc9s08dz60_set_value(struct gpio_chip *gc, unsigned offset, int val)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct mc9s08dz60 *mc9s = gpiochip_get_data(gc);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun mc9s08dz60_set(mc9s, offset, val);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
mc9s08dz60_direction_output(struct gpio_chip * gc,unsigned offset,int val)68*4882a593Smuzhiyun static int mc9s08dz60_direction_output(struct gpio_chip *gc,
69*4882a593Smuzhiyun unsigned offset, int val)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct mc9s08dz60 *mc9s = gpiochip_get_data(gc);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun return mc9s08dz60_set(mc9s, offset, val);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
mc9s08dz60_probe(struct i2c_client * client,const struct i2c_device_id * id)76*4882a593Smuzhiyun static int mc9s08dz60_probe(struct i2c_client *client,
77*4882a593Smuzhiyun const struct i2c_device_id *id)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun struct mc9s08dz60 *mc9s;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun mc9s = devm_kzalloc(&client->dev, sizeof(*mc9s), GFP_KERNEL);
82*4882a593Smuzhiyun if (!mc9s)
83*4882a593Smuzhiyun return -ENOMEM;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun mc9s->chip.label = client->name;
86*4882a593Smuzhiyun mc9s->chip.base = -1;
87*4882a593Smuzhiyun mc9s->chip.parent = &client->dev;
88*4882a593Smuzhiyun mc9s->chip.owner = THIS_MODULE;
89*4882a593Smuzhiyun mc9s->chip.ngpio = GPIO_NUM;
90*4882a593Smuzhiyun mc9s->chip.can_sleep = true;
91*4882a593Smuzhiyun mc9s->chip.get = mc9s08dz60_get_value;
92*4882a593Smuzhiyun mc9s->chip.set = mc9s08dz60_set_value;
93*4882a593Smuzhiyun mc9s->chip.direction_output = mc9s08dz60_direction_output;
94*4882a593Smuzhiyun mc9s->client = client;
95*4882a593Smuzhiyun i2c_set_clientdata(client, mc9s);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun return devm_gpiochip_add_data(&client->dev, &mc9s->chip, mc9s);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static const struct i2c_device_id mc9s08dz60_id[] = {
101*4882a593Smuzhiyun {"mc9s08dz60", 0},
102*4882a593Smuzhiyun {},
103*4882a593Smuzhiyun };
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static struct i2c_driver mc9s08dz60_i2c_driver = {
106*4882a593Smuzhiyun .driver = {
107*4882a593Smuzhiyun .name = "mc9s08dz60",
108*4882a593Smuzhiyun },
109*4882a593Smuzhiyun .probe = mc9s08dz60_probe,
110*4882a593Smuzhiyun .id_table = mc9s08dz60_id,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun builtin_i2c_driver(mc9s08dz60_i2c_driver);
113