xref: /OK3568_Linux_fs/kernel/drivers/gpio/gpio-mc33880.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * MC33880 high-side/low-side switch GPIO driver
4*4882a593Smuzhiyun  * Copyright (c) 2009 Intel Corporation
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun /* Supports:
8*4882a593Smuzhiyun  * Freescale MC33880 high-side/low-side switch
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/mutex.h>
13*4882a593Smuzhiyun #include <linux/spi/spi.h>
14*4882a593Smuzhiyun #include <linux/spi/mc33880.h>
15*4882a593Smuzhiyun #include <linux/gpio/driver.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define DRIVER_NAME "mc33880"
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun  * Pin configurations, see MAX7301 datasheet page 6
23*4882a593Smuzhiyun  */
24*4882a593Smuzhiyun #define PIN_CONFIG_MASK 0x03
25*4882a593Smuzhiyun #define PIN_CONFIG_IN_PULLUP 0x03
26*4882a593Smuzhiyun #define PIN_CONFIG_IN_WO_PULLUP 0x02
27*4882a593Smuzhiyun #define PIN_CONFIG_OUT 0x01
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define PIN_NUMBER 8
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /*
33*4882a593Smuzhiyun  * Some registers must be read back to modify.
34*4882a593Smuzhiyun  * To save time we cache them here in memory
35*4882a593Smuzhiyun  */
36*4882a593Smuzhiyun struct mc33880 {
37*4882a593Smuzhiyun 	struct mutex	lock;	/* protect from simultaneous accesses */
38*4882a593Smuzhiyun 	u8		port_config;
39*4882a593Smuzhiyun 	struct gpio_chip chip;
40*4882a593Smuzhiyun 	struct spi_device *spi;
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun 
mc33880_write_config(struct mc33880 * mc)43*4882a593Smuzhiyun static int mc33880_write_config(struct mc33880 *mc)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	return spi_write(mc->spi, &mc->port_config, sizeof(mc->port_config));
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 
__mc33880_set(struct mc33880 * mc,unsigned offset,int value)49*4882a593Smuzhiyun static int __mc33880_set(struct mc33880 *mc, unsigned offset, int value)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	if (value)
52*4882a593Smuzhiyun 		mc->port_config |= 1 << offset;
53*4882a593Smuzhiyun 	else
54*4882a593Smuzhiyun 		mc->port_config &= ~(1 << offset);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	return mc33880_write_config(mc);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 
mc33880_set(struct gpio_chip * chip,unsigned offset,int value)60*4882a593Smuzhiyun static void mc33880_set(struct gpio_chip *chip, unsigned offset, int value)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun 	struct mc33880 *mc = gpiochip_get_data(chip);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	mutex_lock(&mc->lock);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	__mc33880_set(mc, offset, value);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	mutex_unlock(&mc->lock);
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun 
mc33880_probe(struct spi_device * spi)71*4882a593Smuzhiyun static int mc33880_probe(struct spi_device *spi)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	struct mc33880 *mc;
74*4882a593Smuzhiyun 	struct mc33880_platform_data *pdata;
75*4882a593Smuzhiyun 	int ret;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	pdata = dev_get_platdata(&spi->dev);
78*4882a593Smuzhiyun 	if (!pdata || !pdata->base) {
79*4882a593Smuzhiyun 		dev_dbg(&spi->dev, "incorrect or missing platform data\n");
80*4882a593Smuzhiyun 		return -EINVAL;
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	/*
84*4882a593Smuzhiyun 	 * bits_per_word cannot be configured in platform data
85*4882a593Smuzhiyun 	 */
86*4882a593Smuzhiyun 	spi->bits_per_word = 8;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	ret = spi_setup(spi);
89*4882a593Smuzhiyun 	if (ret < 0)
90*4882a593Smuzhiyun 		return ret;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	mc = devm_kzalloc(&spi->dev, sizeof(struct mc33880), GFP_KERNEL);
93*4882a593Smuzhiyun 	if (!mc)
94*4882a593Smuzhiyun 		return -ENOMEM;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	mutex_init(&mc->lock);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	spi_set_drvdata(spi, mc);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	mc->spi = spi;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	mc->chip.label = DRIVER_NAME,
103*4882a593Smuzhiyun 	mc->chip.set = mc33880_set;
104*4882a593Smuzhiyun 	mc->chip.base = pdata->base;
105*4882a593Smuzhiyun 	mc->chip.ngpio = PIN_NUMBER;
106*4882a593Smuzhiyun 	mc->chip.can_sleep = true;
107*4882a593Smuzhiyun 	mc->chip.parent = &spi->dev;
108*4882a593Smuzhiyun 	mc->chip.owner = THIS_MODULE;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	mc->port_config = 0x00;
111*4882a593Smuzhiyun 	/* write twice, because during initialisation the first setting
112*4882a593Smuzhiyun 	 * is just for testing SPI communication, and the second is the
113*4882a593Smuzhiyun 	 * "real" configuration
114*4882a593Smuzhiyun 	 */
115*4882a593Smuzhiyun 	ret = mc33880_write_config(mc);
116*4882a593Smuzhiyun 	mc->port_config = 0x00;
117*4882a593Smuzhiyun 	if (!ret)
118*4882a593Smuzhiyun 		ret = mc33880_write_config(mc);
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	if (ret) {
121*4882a593Smuzhiyun 		dev_err(&spi->dev, "Failed writing to " DRIVER_NAME ": %d\n",
122*4882a593Smuzhiyun 			ret);
123*4882a593Smuzhiyun 		goto exit_destroy;
124*4882a593Smuzhiyun 	}
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ret = gpiochip_add_data(&mc->chip, mc);
127*4882a593Smuzhiyun 	if (ret)
128*4882a593Smuzhiyun 		goto exit_destroy;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	return ret;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun exit_destroy:
133*4882a593Smuzhiyun 	mutex_destroy(&mc->lock);
134*4882a593Smuzhiyun 	return ret;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
mc33880_remove(struct spi_device * spi)137*4882a593Smuzhiyun static int mc33880_remove(struct spi_device *spi)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	struct mc33880 *mc;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	mc = spi_get_drvdata(spi);
142*4882a593Smuzhiyun 	if (!mc)
143*4882a593Smuzhiyun 		return -ENODEV;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	gpiochip_remove(&mc->chip);
146*4882a593Smuzhiyun 	mutex_destroy(&mc->lock);
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	return 0;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun static struct spi_driver mc33880_driver = {
152*4882a593Smuzhiyun 	.driver = {
153*4882a593Smuzhiyun 		.name		= DRIVER_NAME,
154*4882a593Smuzhiyun 	},
155*4882a593Smuzhiyun 	.probe		= mc33880_probe,
156*4882a593Smuzhiyun 	.remove		= mc33880_remove,
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
mc33880_init(void)159*4882a593Smuzhiyun static int __init mc33880_init(void)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	return spi_register_driver(&mc33880_driver);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun /* register after spi postcore initcall and before
164*4882a593Smuzhiyun  * subsys initcalls that may rely on these GPIOs
165*4882a593Smuzhiyun  */
166*4882a593Smuzhiyun subsys_initcall(mc33880_init);
167*4882a593Smuzhiyun 
mc33880_exit(void)168*4882a593Smuzhiyun static void __exit mc33880_exit(void)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	spi_unregister_driver(&mc33880_driver);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun module_exit(mc33880_exit);
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>");
175*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
176*4882a593Smuzhiyun 
177