xref: /OK3568_Linux_fs/kernel/drivers/gpio/gpio-lp873x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
3*4882a593Smuzhiyun  *	Keerthy <j-keerthy@ti.com>
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
6*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License version 2 as
7*4882a593Smuzhiyun  * published by the Free Software Foundation.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
10*4882a593Smuzhiyun  * kind, whether expressed or implied; without even the implied warranty
11*4882a593Smuzhiyun  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12*4882a593Smuzhiyun  * GNU General Public License version 2 for more details.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * Based on the TPS65218 driver
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/gpio/driver.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/regmap.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <linux/mfd/lp873x.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define BITS_PER_GPO		0x4
25*4882a593Smuzhiyun #define LP873X_GPO_CTRL_OD	0x2
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun struct lp873x_gpio {
28*4882a593Smuzhiyun 	struct gpio_chip chip;
29*4882a593Smuzhiyun 	struct lp873x *lp873;
30*4882a593Smuzhiyun };
31*4882a593Smuzhiyun 
lp873x_gpio_get_direction(struct gpio_chip * chip,unsigned int offset)32*4882a593Smuzhiyun static int lp873x_gpio_get_direction(struct gpio_chip *chip,
33*4882a593Smuzhiyun 				     unsigned int offset)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	/* This device is output only */
36*4882a593Smuzhiyun 	return GPIO_LINE_DIRECTION_OUT;
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun 
lp873x_gpio_direction_input(struct gpio_chip * chip,unsigned int offset)39*4882a593Smuzhiyun static int lp873x_gpio_direction_input(struct gpio_chip *chip,
40*4882a593Smuzhiyun 				       unsigned int offset)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun 	/* This device is output only */
43*4882a593Smuzhiyun 	return -EINVAL;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun 
lp873x_gpio_direction_output(struct gpio_chip * chip,unsigned int offset,int value)46*4882a593Smuzhiyun static int lp873x_gpio_direction_output(struct gpio_chip *chip,
47*4882a593Smuzhiyun 					unsigned int offset, int value)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	struct lp873x_gpio *gpio = gpiochip_get_data(chip);
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	/* Set the initial value */
52*4882a593Smuzhiyun 	return regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL,
53*4882a593Smuzhiyun 				  BIT(offset * BITS_PER_GPO),
54*4882a593Smuzhiyun 				  value ? BIT(offset * BITS_PER_GPO) : 0);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
lp873x_gpio_get(struct gpio_chip * chip,unsigned int offset)57*4882a593Smuzhiyun static int lp873x_gpio_get(struct gpio_chip *chip, unsigned int offset)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	struct lp873x_gpio *gpio = gpiochip_get_data(chip);
60*4882a593Smuzhiyun 	int ret, val;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	ret = regmap_read(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, &val);
63*4882a593Smuzhiyun 	if (ret < 0)
64*4882a593Smuzhiyun 		return ret;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	return val & BIT(offset * BITS_PER_GPO);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun 
lp873x_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)69*4882a593Smuzhiyun static void lp873x_gpio_set(struct gpio_chip *chip, unsigned int offset,
70*4882a593Smuzhiyun 			    int value)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	struct lp873x_gpio *gpio = gpiochip_get_data(chip);
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL,
75*4882a593Smuzhiyun 			   BIT(offset * BITS_PER_GPO),
76*4882a593Smuzhiyun 			   value ? BIT(offset * BITS_PER_GPO) : 0);
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun 
lp873x_gpio_request(struct gpio_chip * gc,unsigned int offset)79*4882a593Smuzhiyun static int lp873x_gpio_request(struct gpio_chip *gc, unsigned int offset)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	struct lp873x_gpio *gpio = gpiochip_get_data(gc);
82*4882a593Smuzhiyun 	int ret;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	switch (offset) {
85*4882a593Smuzhiyun 	case 0:
86*4882a593Smuzhiyun 		/* No MUX Set up Needed for GPO */
87*4882a593Smuzhiyun 		break;
88*4882a593Smuzhiyun 	case 1:
89*4882a593Smuzhiyun 		/* Setup the CLKIN_PIN_SEL MUX to GPO2 */
90*4882a593Smuzhiyun 		ret = regmap_update_bits(gpio->lp873->regmap, LP873X_REG_CONFIG,
91*4882a593Smuzhiyun 					 LP873X_CONFIG_CLKIN_PIN_SEL, 0);
92*4882a593Smuzhiyun 		if (ret)
93*4882a593Smuzhiyun 			return ret;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 		break;
96*4882a593Smuzhiyun 	default:
97*4882a593Smuzhiyun 		return -EINVAL;
98*4882a593Smuzhiyun 	}
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	return 0;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
lp873x_gpio_set_config(struct gpio_chip * gc,unsigned offset,unsigned long config)103*4882a593Smuzhiyun static int lp873x_gpio_set_config(struct gpio_chip *gc, unsigned offset,
104*4882a593Smuzhiyun 				  unsigned long config)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	struct lp873x_gpio *gpio = gpiochip_get_data(gc);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	switch (pinconf_to_config_param(config)) {
109*4882a593Smuzhiyun 	case PIN_CONFIG_DRIVE_OPEN_DRAIN:
110*4882a593Smuzhiyun 		return regmap_update_bits(gpio->lp873->regmap,
111*4882a593Smuzhiyun 					  LP873X_REG_GPO_CTRL,
112*4882a593Smuzhiyun 					  BIT(offset * BITS_PER_GPO +
113*4882a593Smuzhiyun 					  LP873X_GPO_CTRL_OD),
114*4882a593Smuzhiyun 					  BIT(offset * BITS_PER_GPO +
115*4882a593Smuzhiyun 					  LP873X_GPO_CTRL_OD));
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	case PIN_CONFIG_DRIVE_PUSH_PULL:
118*4882a593Smuzhiyun 		return regmap_update_bits(gpio->lp873->regmap,
119*4882a593Smuzhiyun 					  LP873X_REG_GPO_CTRL,
120*4882a593Smuzhiyun 					  BIT(offset * BITS_PER_GPO +
121*4882a593Smuzhiyun 					  LP873X_GPO_CTRL_OD), 0);
122*4882a593Smuzhiyun 	default:
123*4882a593Smuzhiyun 		return -ENOTSUPP;
124*4882a593Smuzhiyun 	}
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun static const struct gpio_chip template_chip = {
128*4882a593Smuzhiyun 	.label			= "lp873x-gpio",
129*4882a593Smuzhiyun 	.owner			= THIS_MODULE,
130*4882a593Smuzhiyun 	.request		= lp873x_gpio_request,
131*4882a593Smuzhiyun 	.get_direction		= lp873x_gpio_get_direction,
132*4882a593Smuzhiyun 	.direction_input	= lp873x_gpio_direction_input,
133*4882a593Smuzhiyun 	.direction_output	= lp873x_gpio_direction_output,
134*4882a593Smuzhiyun 	.get			= lp873x_gpio_get,
135*4882a593Smuzhiyun 	.set			= lp873x_gpio_set,
136*4882a593Smuzhiyun 	.set_config		= lp873x_gpio_set_config,
137*4882a593Smuzhiyun 	.base			= -1,
138*4882a593Smuzhiyun 	.ngpio			= 2,
139*4882a593Smuzhiyun 	.can_sleep		= true,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
lp873x_gpio_probe(struct platform_device * pdev)142*4882a593Smuzhiyun static int lp873x_gpio_probe(struct platform_device *pdev)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	struct lp873x_gpio *gpio;
145*4882a593Smuzhiyun 	int ret;
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
148*4882a593Smuzhiyun 	if (!gpio)
149*4882a593Smuzhiyun 		return -ENOMEM;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	platform_set_drvdata(pdev, gpio);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	gpio->lp873 = dev_get_drvdata(pdev->dev.parent);
154*4882a593Smuzhiyun 	gpio->chip = template_chip;
155*4882a593Smuzhiyun 	gpio->chip.parent = gpio->lp873->dev;
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	ret = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio);
158*4882a593Smuzhiyun 	if (ret < 0) {
159*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
160*4882a593Smuzhiyun 		return ret;
161*4882a593Smuzhiyun 	}
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	return 0;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun static const struct platform_device_id lp873x_gpio_id_table[] = {
167*4882a593Smuzhiyun 	{ "lp873x-gpio", },
168*4882a593Smuzhiyun 	{ /* sentinel */ }
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun MODULE_DEVICE_TABLE(platform, lp873x_gpio_id_table);
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun static struct platform_driver lp873x_gpio_driver = {
173*4882a593Smuzhiyun 	.driver = {
174*4882a593Smuzhiyun 		.name = "lp873x-gpio",
175*4882a593Smuzhiyun 	},
176*4882a593Smuzhiyun 	.probe = lp873x_gpio_probe,
177*4882a593Smuzhiyun 	.id_table = lp873x_gpio_id_table,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun module_platform_driver(lp873x_gpio_driver);
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun MODULE_AUTHOR("Keerthy <j-keerthy@ti.com>");
182*4882a593Smuzhiyun MODULE_DESCRIPTION("LP873X GPIO driver");
183*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
184