1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Loongson-2F/3A/3B GPIO Support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com>
6*4882a593Smuzhiyun * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com>
7*4882a593Smuzhiyun * Copyright (c) 2013 Hongbing Hu <huhb@lemote.com>
8*4882a593Smuzhiyun * Copyright (c) 2014 Huacai Chen <chenhc@lemote.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/init.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/spinlock.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include <linux/gpio/driver.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/bitops.h>
19*4882a593Smuzhiyun #include <asm/types.h>
20*4882a593Smuzhiyun #include <loongson.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define STLS2F_N_GPIO 4
23*4882a593Smuzhiyun #define STLS3A_N_GPIO 16
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #ifdef CONFIG_CPU_LOONGSON64
26*4882a593Smuzhiyun #define LOONGSON_N_GPIO STLS3A_N_GPIO
27*4882a593Smuzhiyun #else
28*4882a593Smuzhiyun #define LOONGSON_N_GPIO STLS2F_N_GPIO
29*4882a593Smuzhiyun #endif
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /*
32*4882a593Smuzhiyun * Offset into the register where we read lines, we write them from offset 0.
33*4882a593Smuzhiyun * This offset is the only thing that stand between us and using
34*4882a593Smuzhiyun * GPIO_GENERIC.
35*4882a593Smuzhiyun */
36*4882a593Smuzhiyun #define LOONGSON_GPIO_IN_OFFSET 16
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static DEFINE_SPINLOCK(gpio_lock);
39*4882a593Smuzhiyun
loongson_gpio_get_value(struct gpio_chip * chip,unsigned gpio)40*4882a593Smuzhiyun static int loongson_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun u32 val;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun spin_lock(&gpio_lock);
45*4882a593Smuzhiyun val = LOONGSON_GPIODATA;
46*4882a593Smuzhiyun spin_unlock(&gpio_lock);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun return !!(val & BIT(gpio + LOONGSON_GPIO_IN_OFFSET));
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
loongson_gpio_set_value(struct gpio_chip * chip,unsigned gpio,int value)51*4882a593Smuzhiyun static void loongson_gpio_set_value(struct gpio_chip *chip,
52*4882a593Smuzhiyun unsigned gpio, int value)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun u32 val;
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun spin_lock(&gpio_lock);
57*4882a593Smuzhiyun val = LOONGSON_GPIODATA;
58*4882a593Smuzhiyun if (value)
59*4882a593Smuzhiyun val |= BIT(gpio);
60*4882a593Smuzhiyun else
61*4882a593Smuzhiyun val &= ~BIT(gpio);
62*4882a593Smuzhiyun LOONGSON_GPIODATA = val;
63*4882a593Smuzhiyun spin_unlock(&gpio_lock);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
loongson_gpio_direction_input(struct gpio_chip * chip,unsigned gpio)66*4882a593Smuzhiyun static int loongson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun u32 temp;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun spin_lock(&gpio_lock);
71*4882a593Smuzhiyun temp = LOONGSON_GPIOIE;
72*4882a593Smuzhiyun temp |= BIT(gpio);
73*4882a593Smuzhiyun LOONGSON_GPIOIE = temp;
74*4882a593Smuzhiyun spin_unlock(&gpio_lock);
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun return 0;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
loongson_gpio_direction_output(struct gpio_chip * chip,unsigned gpio,int level)79*4882a593Smuzhiyun static int loongson_gpio_direction_output(struct gpio_chip *chip,
80*4882a593Smuzhiyun unsigned gpio, int level)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun u32 temp;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun loongson_gpio_set_value(chip, gpio, level);
85*4882a593Smuzhiyun spin_lock(&gpio_lock);
86*4882a593Smuzhiyun temp = LOONGSON_GPIOIE;
87*4882a593Smuzhiyun temp &= ~BIT(gpio);
88*4882a593Smuzhiyun LOONGSON_GPIOIE = temp;
89*4882a593Smuzhiyun spin_unlock(&gpio_lock);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun return 0;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
loongson_gpio_probe(struct platform_device * pdev)94*4882a593Smuzhiyun static int loongson_gpio_probe(struct platform_device *pdev)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun struct gpio_chip *gc;
97*4882a593Smuzhiyun struct device *dev = &pdev->dev;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun gc = devm_kzalloc(dev, sizeof(*gc), GFP_KERNEL);
100*4882a593Smuzhiyun if (!gc)
101*4882a593Smuzhiyun return -ENOMEM;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun gc->label = "loongson-gpio-chip";
104*4882a593Smuzhiyun gc->base = 0;
105*4882a593Smuzhiyun gc->ngpio = LOONGSON_N_GPIO;
106*4882a593Smuzhiyun gc->get = loongson_gpio_get_value;
107*4882a593Smuzhiyun gc->set = loongson_gpio_set_value;
108*4882a593Smuzhiyun gc->direction_input = loongson_gpio_direction_input;
109*4882a593Smuzhiyun gc->direction_output = loongson_gpio_direction_output;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun return gpiochip_add_data(gc, NULL);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static struct platform_driver loongson_gpio_driver = {
115*4882a593Smuzhiyun .driver = {
116*4882a593Smuzhiyun .name = "loongson-gpio",
117*4882a593Smuzhiyun },
118*4882a593Smuzhiyun .probe = loongson_gpio_probe,
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun
loongson_gpio_setup(void)121*4882a593Smuzhiyun static int __init loongson_gpio_setup(void)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun struct platform_device *pdev;
124*4882a593Smuzhiyun int ret;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun ret = platform_driver_register(&loongson_gpio_driver);
127*4882a593Smuzhiyun if (ret) {
128*4882a593Smuzhiyun pr_err("error registering loongson GPIO driver\n");
129*4882a593Smuzhiyun return ret;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun pdev = platform_device_register_simple("loongson-gpio", -1, NULL, 0);
133*4882a593Smuzhiyun return PTR_ERR_OR_ZERO(pdev);
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun postcore_initcall(loongson_gpio_setup);
136