1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Kontron PLD GPIO driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2010-2013 Kontron Europe GmbH
6*4882a593Smuzhiyun * Author: Michael Brunner <michael.brunner@kontron.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/bitops.h>
13*4882a593Smuzhiyun #include <linux/errno.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/gpio/driver.h>
16*4882a593Smuzhiyun #include <linux/mfd/kempld.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define KEMPLD_GPIO_MAX_NUM 16
19*4882a593Smuzhiyun #define KEMPLD_GPIO_MASK(x) (BIT((x) % 8))
20*4882a593Smuzhiyun #define KEMPLD_GPIO_DIR_NUM(x) (0x40 + (x) / 8)
21*4882a593Smuzhiyun #define KEMPLD_GPIO_LVL_NUM(x) (0x42 + (x) / 8)
22*4882a593Smuzhiyun #define KEMPLD_GPIO_EVT_LVL_EDGE 0x46
23*4882a593Smuzhiyun #define KEMPLD_GPIO_IEN 0x4A
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct kempld_gpio_data {
26*4882a593Smuzhiyun struct gpio_chip chip;
27*4882a593Smuzhiyun struct kempld_device_data *pld;
28*4882a593Smuzhiyun };
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /*
31*4882a593Smuzhiyun * Set or clear GPIO bit
32*4882a593Smuzhiyun * kempld_get_mutex must be called prior to calling this function.
33*4882a593Smuzhiyun */
kempld_gpio_bitop(struct kempld_device_data * pld,u8 reg,u8 bit,u8 val)34*4882a593Smuzhiyun static void kempld_gpio_bitop(struct kempld_device_data *pld,
35*4882a593Smuzhiyun u8 reg, u8 bit, u8 val)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun u8 status;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun status = kempld_read8(pld, reg);
40*4882a593Smuzhiyun if (val)
41*4882a593Smuzhiyun status |= KEMPLD_GPIO_MASK(bit);
42*4882a593Smuzhiyun else
43*4882a593Smuzhiyun status &= ~KEMPLD_GPIO_MASK(bit);
44*4882a593Smuzhiyun kempld_write8(pld, reg, status);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
kempld_gpio_get_bit(struct kempld_device_data * pld,u8 reg,u8 bit)47*4882a593Smuzhiyun static int kempld_gpio_get_bit(struct kempld_device_data *pld, u8 reg, u8 bit)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun u8 status;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun kempld_get_mutex(pld);
52*4882a593Smuzhiyun status = kempld_read8(pld, reg);
53*4882a593Smuzhiyun kempld_release_mutex(pld);
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun return !!(status & KEMPLD_GPIO_MASK(bit));
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
kempld_gpio_get(struct gpio_chip * chip,unsigned offset)58*4882a593Smuzhiyun static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
61*4882a593Smuzhiyun struct kempld_device_data *pld = gpio->pld;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun return !!kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset), offset);
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
kempld_gpio_set(struct gpio_chip * chip,unsigned offset,int value)66*4882a593Smuzhiyun static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
69*4882a593Smuzhiyun struct kempld_device_data *pld = gpio->pld;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun kempld_get_mutex(pld);
72*4882a593Smuzhiyun kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value);
73*4882a593Smuzhiyun kempld_release_mutex(pld);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
kempld_gpio_direction_input(struct gpio_chip * chip,unsigned offset)76*4882a593Smuzhiyun static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
79*4882a593Smuzhiyun struct kempld_device_data *pld = gpio->pld;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun kempld_get_mutex(pld);
82*4882a593Smuzhiyun kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 0);
83*4882a593Smuzhiyun kempld_release_mutex(pld);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun return 0;
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
kempld_gpio_direction_output(struct gpio_chip * chip,unsigned offset,int value)88*4882a593Smuzhiyun static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
89*4882a593Smuzhiyun int value)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
92*4882a593Smuzhiyun struct kempld_device_data *pld = gpio->pld;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun kempld_get_mutex(pld);
95*4882a593Smuzhiyun kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value);
96*4882a593Smuzhiyun kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 1);
97*4882a593Smuzhiyun kempld_release_mutex(pld);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return 0;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
kempld_gpio_get_direction(struct gpio_chip * chip,unsigned offset)102*4882a593Smuzhiyun static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun struct kempld_gpio_data *gpio = gpiochip_get_data(chip);
105*4882a593Smuzhiyun struct kempld_device_data *pld = gpio->pld;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun if (kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR_NUM(offset), offset))
108*4882a593Smuzhiyun return GPIO_LINE_DIRECTION_OUT;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun return GPIO_LINE_DIRECTION_IN;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun
kempld_gpio_pincount(struct kempld_device_data * pld)113*4882a593Smuzhiyun static int kempld_gpio_pincount(struct kempld_device_data *pld)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun u16 evt, evt_back;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun kempld_get_mutex(pld);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* Backup event register as it might be already initialized */
120*4882a593Smuzhiyun evt_back = kempld_read16(pld, KEMPLD_GPIO_EVT_LVL_EDGE);
121*4882a593Smuzhiyun /* Clear event register */
122*4882a593Smuzhiyun kempld_write16(pld, KEMPLD_GPIO_EVT_LVL_EDGE, 0x0000);
123*4882a593Smuzhiyun /* Read back event register */
124*4882a593Smuzhiyun evt = kempld_read16(pld, KEMPLD_GPIO_EVT_LVL_EDGE);
125*4882a593Smuzhiyun /* Restore event register */
126*4882a593Smuzhiyun kempld_write16(pld, KEMPLD_GPIO_EVT_LVL_EDGE, evt_back);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun kempld_release_mutex(pld);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return evt ? __ffs(evt) : 16;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
kempld_gpio_probe(struct platform_device * pdev)133*4882a593Smuzhiyun static int kempld_gpio_probe(struct platform_device *pdev)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct device *dev = &pdev->dev;
136*4882a593Smuzhiyun struct kempld_device_data *pld = dev_get_drvdata(dev->parent);
137*4882a593Smuzhiyun struct kempld_platform_data *pdata = dev_get_platdata(pld->dev);
138*4882a593Smuzhiyun struct kempld_gpio_data *gpio;
139*4882a593Smuzhiyun struct gpio_chip *chip;
140*4882a593Smuzhiyun int ret;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun if (pld->info.spec_major < 2) {
143*4882a593Smuzhiyun dev_err(dev,
144*4882a593Smuzhiyun "Driver only supports GPIO devices compatible to PLD spec. rev. 2.0 or higher\n");
145*4882a593Smuzhiyun return -ENODEV;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun gpio = devm_kzalloc(dev, sizeof(*gpio), GFP_KERNEL);
149*4882a593Smuzhiyun if (!gpio)
150*4882a593Smuzhiyun return -ENOMEM;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun gpio->pld = pld;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun platform_set_drvdata(pdev, gpio);
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun chip = &gpio->chip;
157*4882a593Smuzhiyun chip->label = "gpio-kempld";
158*4882a593Smuzhiyun chip->owner = THIS_MODULE;
159*4882a593Smuzhiyun chip->parent = dev;
160*4882a593Smuzhiyun chip->can_sleep = true;
161*4882a593Smuzhiyun if (pdata && pdata->gpio_base)
162*4882a593Smuzhiyun chip->base = pdata->gpio_base;
163*4882a593Smuzhiyun else
164*4882a593Smuzhiyun chip->base = -1;
165*4882a593Smuzhiyun chip->direction_input = kempld_gpio_direction_input;
166*4882a593Smuzhiyun chip->direction_output = kempld_gpio_direction_output;
167*4882a593Smuzhiyun chip->get_direction = kempld_gpio_get_direction;
168*4882a593Smuzhiyun chip->get = kempld_gpio_get;
169*4882a593Smuzhiyun chip->set = kempld_gpio_set;
170*4882a593Smuzhiyun chip->ngpio = kempld_gpio_pincount(pld);
171*4882a593Smuzhiyun if (chip->ngpio == 0) {
172*4882a593Smuzhiyun dev_err(dev, "No GPIO pins detected\n");
173*4882a593Smuzhiyun return -ENODEV;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun ret = devm_gpiochip_add_data(dev, chip, gpio);
177*4882a593Smuzhiyun if (ret) {
178*4882a593Smuzhiyun dev_err(dev, "Could not register GPIO chip\n");
179*4882a593Smuzhiyun return ret;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun dev_info(dev, "GPIO functionality initialized with %d pins\n",
183*4882a593Smuzhiyun chip->ngpio);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun static struct platform_driver kempld_gpio_driver = {
189*4882a593Smuzhiyun .driver = {
190*4882a593Smuzhiyun .name = "kempld-gpio",
191*4882a593Smuzhiyun },
192*4882a593Smuzhiyun .probe = kempld_gpio_probe,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun module_platform_driver(kempld_gpio_driver);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun MODULE_DESCRIPTION("KEM PLD GPIO Driver");
198*4882a593Smuzhiyun MODULE_AUTHOR("Michael Brunner <michael.brunner@kontron.com>");
199*4882a593Smuzhiyun MODULE_LICENSE("GPL");
200*4882a593Smuzhiyun MODULE_ALIAS("platform:kempld-gpio");
201