1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Driver for GE FPGA based GPIO
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Author: Martyn Welch <martyn.welch@ge.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * 2008 (c) GE Intelligent Platforms Embedded Systems, Inc.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public License
9*4882a593Smuzhiyun * version 2. This program is licensed "as is" without any warranty of any
10*4882a593Smuzhiyun * kind, whether express or implied.
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun /* TODO
14*4882a593Smuzhiyun *
15*4882a593Smuzhiyun * Configuration of output modes (totem-pole/open-drain)
16*4882a593Smuzhiyun * Interrupt configuration - interrupts are always generated the FPGA relies on
17*4882a593Smuzhiyun * the I/O interrupt controllers mask to stop them propergating
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/kernel.h>
21*4882a593Smuzhiyun #include <linux/io.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <linux/of_device.h>
24*4882a593Smuzhiyun #include <linux/of_address.h>
25*4882a593Smuzhiyun #include <linux/module.h>
26*4882a593Smuzhiyun #include <linux/gpio/driver.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define GEF_GPIO_DIRECT 0x00
29*4882a593Smuzhiyun #define GEF_GPIO_IN 0x04
30*4882a593Smuzhiyun #define GEF_GPIO_OUT 0x08
31*4882a593Smuzhiyun #define GEF_GPIO_TRIG 0x0C
32*4882a593Smuzhiyun #define GEF_GPIO_POLAR_A 0x10
33*4882a593Smuzhiyun #define GEF_GPIO_POLAR_B 0x14
34*4882a593Smuzhiyun #define GEF_GPIO_INT_STAT 0x18
35*4882a593Smuzhiyun #define GEF_GPIO_OVERRUN 0x1C
36*4882a593Smuzhiyun #define GEF_GPIO_MODE 0x20
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static const struct of_device_id gef_gpio_ids[] = {
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun .compatible = "gef,sbc610-gpio",
41*4882a593Smuzhiyun .data = (void *)19,
42*4882a593Smuzhiyun }, {
43*4882a593Smuzhiyun .compatible = "gef,sbc310-gpio",
44*4882a593Smuzhiyun .data = (void *)6,
45*4882a593Smuzhiyun }, {
46*4882a593Smuzhiyun .compatible = "ge,imp3a-gpio",
47*4882a593Smuzhiyun .data = (void *)16,
48*4882a593Smuzhiyun },
49*4882a593Smuzhiyun { }
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, gef_gpio_ids);
52*4882a593Smuzhiyun
gef_gpio_probe(struct platform_device * pdev)53*4882a593Smuzhiyun static int __init gef_gpio_probe(struct platform_device *pdev)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun struct gpio_chip *gc;
56*4882a593Smuzhiyun void __iomem *regs;
57*4882a593Smuzhiyun int ret;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
60*4882a593Smuzhiyun if (!gc)
61*4882a593Smuzhiyun return -ENOMEM;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun regs = of_iomap(pdev->dev.of_node, 0);
64*4882a593Smuzhiyun if (!regs)
65*4882a593Smuzhiyun return -ENOMEM;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun ret = bgpio_init(gc, &pdev->dev, 4, regs + GEF_GPIO_IN,
68*4882a593Smuzhiyun regs + GEF_GPIO_OUT, NULL, NULL,
69*4882a593Smuzhiyun regs + GEF_GPIO_DIRECT, BGPIOF_BIG_ENDIAN_BYTE_ORDER);
70*4882a593Smuzhiyun if (ret) {
71*4882a593Smuzhiyun dev_err(&pdev->dev, "bgpio_init failed\n");
72*4882a593Smuzhiyun goto err0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* Setup pointers to chip functions */
76*4882a593Smuzhiyun gc->label = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%pOF", pdev->dev.of_node);
77*4882a593Smuzhiyun if (!gc->label) {
78*4882a593Smuzhiyun ret = -ENOMEM;
79*4882a593Smuzhiyun goto err0;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun gc->base = -1;
83*4882a593Smuzhiyun gc->ngpio = (u16)(uintptr_t)of_device_get_match_data(&pdev->dev);
84*4882a593Smuzhiyun gc->of_gpio_n_cells = 2;
85*4882a593Smuzhiyun gc->of_node = pdev->dev.of_node;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* This function adds a memory mapped GPIO chip */
88*4882a593Smuzhiyun ret = devm_gpiochip_add_data(&pdev->dev, gc, NULL);
89*4882a593Smuzhiyun if (ret)
90*4882a593Smuzhiyun goto err0;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return 0;
93*4882a593Smuzhiyun err0:
94*4882a593Smuzhiyun iounmap(regs);
95*4882a593Smuzhiyun pr_err("%pOF: GPIO chip registration failed\n", pdev->dev.of_node);
96*4882a593Smuzhiyun return ret;
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static struct platform_driver gef_gpio_driver = {
100*4882a593Smuzhiyun .driver = {
101*4882a593Smuzhiyun .name = "gef-gpio",
102*4882a593Smuzhiyun .of_match_table = gef_gpio_ids,
103*4882a593Smuzhiyun },
104*4882a593Smuzhiyun };
105*4882a593Smuzhiyun module_platform_driver_probe(gef_gpio_driver, gef_gpio_probe);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun MODULE_DESCRIPTION("GE I/O FPGA GPIO driver");
108*4882a593Smuzhiyun MODULE_AUTHOR("Martyn Welch <martyn.welch@ge.com");
109*4882a593Smuzhiyun MODULE_LICENSE("GPL");
110