1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun bt8xx GPIO abuser
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun Copyright (C) 2008 Michael Buesch <m@bues.ch>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun Please do _only_ contact the people listed _above_ with issues related to this driver.
9*4882a593Smuzhiyun All the other people listed below are not related to this driver. Their names
10*4882a593Smuzhiyun are only here, because this driver is derived from the bt848 driver.
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun Derived from the bt848 driver:
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun Copyright (C) 1996,97,98 Ralph Metzler
16*4882a593Smuzhiyun & Marcus Metzler
17*4882a593Smuzhiyun (c) 1999-2002 Gerd Knorr
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun some v4l2 code lines are taken from Justin's bttv2 driver which is
20*4882a593Smuzhiyun (c) 2000 Justin Schoeman
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun V4L1 removal from:
23*4882a593Smuzhiyun (c) 2005-2006 Nickolay V. Shmyrev
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun Fixes to be fully V4L2 compliant by
26*4882a593Smuzhiyun (c) 2006 Mauro Carvalho Chehab
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun Cropping and overscan support
29*4882a593Smuzhiyun Copyright (C) 2005, 2006 Michael H. Schimek
30*4882a593Smuzhiyun Sponsored by OPQ Systems AB
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <linux/module.h>
35*4882a593Smuzhiyun #include <linux/pci.h>
36*4882a593Smuzhiyun #include <linux/spinlock.h>
37*4882a593Smuzhiyun #include <linux/gpio/driver.h>
38*4882a593Smuzhiyun #include <linux/slab.h>
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* Steal the hardware definitions from the bttv driver. */
41*4882a593Smuzhiyun #include "../media/pci/bt8xx/bt848.h"
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define BT8XXGPIO_NR_GPIOS 24 /* We have 24 GPIO pins */
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun struct bt8xxgpio {
48*4882a593Smuzhiyun spinlock_t lock;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun void __iomem *mmio;
51*4882a593Smuzhiyun struct pci_dev *pdev;
52*4882a593Smuzhiyun struct gpio_chip gpio;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #ifdef CONFIG_PM
55*4882a593Smuzhiyun u32 saved_outen;
56*4882a593Smuzhiyun u32 saved_data;
57*4882a593Smuzhiyun #endif
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define bgwrite(dat, adr) writel((dat), bg->mmio+(adr))
61*4882a593Smuzhiyun #define bgread(adr) readl(bg->mmio+(adr))
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun static int modparam_gpiobase = -1/* dynamic */;
65*4882a593Smuzhiyun module_param_named(gpiobase, modparam_gpiobase, int, 0444);
66*4882a593Smuzhiyun MODULE_PARM_DESC(gpiobase, "The GPIO number base. -1 means dynamic, which is the default.");
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun
bt8xxgpio_gpio_direction_input(struct gpio_chip * gpio,unsigned nr)69*4882a593Smuzhiyun static int bt8xxgpio_gpio_direction_input(struct gpio_chip *gpio, unsigned nr)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct bt8xxgpio *bg = gpiochip_get_data(gpio);
72*4882a593Smuzhiyun unsigned long flags;
73*4882a593Smuzhiyun u32 outen, data;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun spin_lock_irqsave(&bg->lock, flags);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun data = bgread(BT848_GPIO_DATA);
78*4882a593Smuzhiyun data &= ~(1 << nr);
79*4882a593Smuzhiyun bgwrite(data, BT848_GPIO_DATA);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun outen = bgread(BT848_GPIO_OUT_EN);
82*4882a593Smuzhiyun outen &= ~(1 << nr);
83*4882a593Smuzhiyun bgwrite(outen, BT848_GPIO_OUT_EN);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun spin_unlock_irqrestore(&bg->lock, flags);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun return 0;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
bt8xxgpio_gpio_get(struct gpio_chip * gpio,unsigned nr)90*4882a593Smuzhiyun static int bt8xxgpio_gpio_get(struct gpio_chip *gpio, unsigned nr)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun struct bt8xxgpio *bg = gpiochip_get_data(gpio);
93*4882a593Smuzhiyun unsigned long flags;
94*4882a593Smuzhiyun u32 val;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun spin_lock_irqsave(&bg->lock, flags);
97*4882a593Smuzhiyun val = bgread(BT848_GPIO_DATA);
98*4882a593Smuzhiyun spin_unlock_irqrestore(&bg->lock, flags);
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun return !!(val & (1 << nr));
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
bt8xxgpio_gpio_direction_output(struct gpio_chip * gpio,unsigned nr,int val)103*4882a593Smuzhiyun static int bt8xxgpio_gpio_direction_output(struct gpio_chip *gpio,
104*4882a593Smuzhiyun unsigned nr, int val)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct bt8xxgpio *bg = gpiochip_get_data(gpio);
107*4882a593Smuzhiyun unsigned long flags;
108*4882a593Smuzhiyun u32 outen, data;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun spin_lock_irqsave(&bg->lock, flags);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun outen = bgread(BT848_GPIO_OUT_EN);
113*4882a593Smuzhiyun outen |= (1 << nr);
114*4882a593Smuzhiyun bgwrite(outen, BT848_GPIO_OUT_EN);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun data = bgread(BT848_GPIO_DATA);
117*4882a593Smuzhiyun if (val)
118*4882a593Smuzhiyun data |= (1 << nr);
119*4882a593Smuzhiyun else
120*4882a593Smuzhiyun data &= ~(1 << nr);
121*4882a593Smuzhiyun bgwrite(data, BT848_GPIO_DATA);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun spin_unlock_irqrestore(&bg->lock, flags);
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun return 0;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
bt8xxgpio_gpio_set(struct gpio_chip * gpio,unsigned nr,int val)128*4882a593Smuzhiyun static void bt8xxgpio_gpio_set(struct gpio_chip *gpio,
129*4882a593Smuzhiyun unsigned nr, int val)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun struct bt8xxgpio *bg = gpiochip_get_data(gpio);
132*4882a593Smuzhiyun unsigned long flags;
133*4882a593Smuzhiyun u32 data;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun spin_lock_irqsave(&bg->lock, flags);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun data = bgread(BT848_GPIO_DATA);
138*4882a593Smuzhiyun if (val)
139*4882a593Smuzhiyun data |= (1 << nr);
140*4882a593Smuzhiyun else
141*4882a593Smuzhiyun data &= ~(1 << nr);
142*4882a593Smuzhiyun bgwrite(data, BT848_GPIO_DATA);
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun spin_unlock_irqrestore(&bg->lock, flags);
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
bt8xxgpio_gpio_setup(struct bt8xxgpio * bg)147*4882a593Smuzhiyun static void bt8xxgpio_gpio_setup(struct bt8xxgpio *bg)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun struct gpio_chip *c = &bg->gpio;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun c->label = dev_name(&bg->pdev->dev);
152*4882a593Smuzhiyun c->owner = THIS_MODULE;
153*4882a593Smuzhiyun c->direction_input = bt8xxgpio_gpio_direction_input;
154*4882a593Smuzhiyun c->get = bt8xxgpio_gpio_get;
155*4882a593Smuzhiyun c->direction_output = bt8xxgpio_gpio_direction_output;
156*4882a593Smuzhiyun c->set = bt8xxgpio_gpio_set;
157*4882a593Smuzhiyun c->dbg_show = NULL;
158*4882a593Smuzhiyun c->base = modparam_gpiobase;
159*4882a593Smuzhiyun c->ngpio = BT8XXGPIO_NR_GPIOS;
160*4882a593Smuzhiyun c->can_sleep = false;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
bt8xxgpio_probe(struct pci_dev * dev,const struct pci_device_id * pci_id)163*4882a593Smuzhiyun static int bt8xxgpio_probe(struct pci_dev *dev,
164*4882a593Smuzhiyun const struct pci_device_id *pci_id)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun struct bt8xxgpio *bg;
167*4882a593Smuzhiyun int err;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun bg = devm_kzalloc(&dev->dev, sizeof(struct bt8xxgpio), GFP_KERNEL);
170*4882a593Smuzhiyun if (!bg)
171*4882a593Smuzhiyun return -ENOMEM;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun bg->pdev = dev;
174*4882a593Smuzhiyun spin_lock_init(&bg->lock);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun err = pci_enable_device(dev);
177*4882a593Smuzhiyun if (err) {
178*4882a593Smuzhiyun printk(KERN_ERR "bt8xxgpio: Can't enable device.\n");
179*4882a593Smuzhiyun return err;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun if (!devm_request_mem_region(&dev->dev, pci_resource_start(dev, 0),
182*4882a593Smuzhiyun pci_resource_len(dev, 0),
183*4882a593Smuzhiyun "bt8xxgpio")) {
184*4882a593Smuzhiyun printk(KERN_WARNING "bt8xxgpio: Can't request iomem (0x%llx).\n",
185*4882a593Smuzhiyun (unsigned long long)pci_resource_start(dev, 0));
186*4882a593Smuzhiyun err = -EBUSY;
187*4882a593Smuzhiyun goto err_disable;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun pci_set_master(dev);
190*4882a593Smuzhiyun pci_set_drvdata(dev, bg);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun bg->mmio = devm_ioremap(&dev->dev, pci_resource_start(dev, 0), 0x1000);
193*4882a593Smuzhiyun if (!bg->mmio) {
194*4882a593Smuzhiyun printk(KERN_ERR "bt8xxgpio: ioremap() failed\n");
195*4882a593Smuzhiyun err = -EIO;
196*4882a593Smuzhiyun goto err_disable;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* Disable interrupts */
200*4882a593Smuzhiyun bgwrite(0, BT848_INT_MASK);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* gpio init */
203*4882a593Smuzhiyun bgwrite(0, BT848_GPIO_DMA_CTL);
204*4882a593Smuzhiyun bgwrite(0, BT848_GPIO_REG_INP);
205*4882a593Smuzhiyun bgwrite(0, BT848_GPIO_OUT_EN);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun bt8xxgpio_gpio_setup(bg);
208*4882a593Smuzhiyun err = gpiochip_add_data(&bg->gpio, bg);
209*4882a593Smuzhiyun if (err) {
210*4882a593Smuzhiyun printk(KERN_ERR "bt8xxgpio: Failed to register GPIOs\n");
211*4882a593Smuzhiyun goto err_disable;
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun return 0;
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun err_disable:
217*4882a593Smuzhiyun pci_disable_device(dev);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun return err;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
bt8xxgpio_remove(struct pci_dev * pdev)222*4882a593Smuzhiyun static void bt8xxgpio_remove(struct pci_dev *pdev)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun struct bt8xxgpio *bg = pci_get_drvdata(pdev);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun gpiochip_remove(&bg->gpio);
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun bgwrite(0, BT848_INT_MASK);
229*4882a593Smuzhiyun bgwrite(~0x0, BT848_INT_STAT);
230*4882a593Smuzhiyun bgwrite(0x0, BT848_GPIO_OUT_EN);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun pci_disable_device(pdev);
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun #ifdef CONFIG_PM
bt8xxgpio_suspend(struct pci_dev * pdev,pm_message_t state)236*4882a593Smuzhiyun static int bt8xxgpio_suspend(struct pci_dev *pdev, pm_message_t state)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun struct bt8xxgpio *bg = pci_get_drvdata(pdev);
239*4882a593Smuzhiyun unsigned long flags;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun spin_lock_irqsave(&bg->lock, flags);
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun bg->saved_outen = bgread(BT848_GPIO_OUT_EN);
244*4882a593Smuzhiyun bg->saved_data = bgread(BT848_GPIO_DATA);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun bgwrite(0, BT848_INT_MASK);
247*4882a593Smuzhiyun bgwrite(~0x0, BT848_INT_STAT);
248*4882a593Smuzhiyun bgwrite(0x0, BT848_GPIO_OUT_EN);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun spin_unlock_irqrestore(&bg->lock, flags);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun pci_save_state(pdev);
253*4882a593Smuzhiyun pci_disable_device(pdev);
254*4882a593Smuzhiyun pci_set_power_state(pdev, pci_choose_state(pdev, state));
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun return 0;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
bt8xxgpio_resume(struct pci_dev * pdev)259*4882a593Smuzhiyun static int bt8xxgpio_resume(struct pci_dev *pdev)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun struct bt8xxgpio *bg = pci_get_drvdata(pdev);
262*4882a593Smuzhiyun unsigned long flags;
263*4882a593Smuzhiyun int err;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun pci_set_power_state(pdev, PCI_D0);
266*4882a593Smuzhiyun err = pci_enable_device(pdev);
267*4882a593Smuzhiyun if (err)
268*4882a593Smuzhiyun return err;
269*4882a593Smuzhiyun pci_restore_state(pdev);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun spin_lock_irqsave(&bg->lock, flags);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun bgwrite(0, BT848_INT_MASK);
274*4882a593Smuzhiyun bgwrite(0, BT848_GPIO_DMA_CTL);
275*4882a593Smuzhiyun bgwrite(0, BT848_GPIO_REG_INP);
276*4882a593Smuzhiyun bgwrite(bg->saved_outen, BT848_GPIO_OUT_EN);
277*4882a593Smuzhiyun bgwrite(bg->saved_data & bg->saved_outen,
278*4882a593Smuzhiyun BT848_GPIO_DATA);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun spin_unlock_irqrestore(&bg->lock, flags);
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return 0;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun #else
285*4882a593Smuzhiyun #define bt8xxgpio_suspend NULL
286*4882a593Smuzhiyun #define bt8xxgpio_resume NULL
287*4882a593Smuzhiyun #endif /* CONFIG_PM */
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun static const struct pci_device_id bt8xxgpio_pci_tbl[] = {
290*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BT848) },
291*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BT849) },
292*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BT878) },
293*4882a593Smuzhiyun { PCI_DEVICE(PCI_VENDOR_ID_BROOKTREE, PCI_DEVICE_ID_BT879) },
294*4882a593Smuzhiyun { 0, },
295*4882a593Smuzhiyun };
296*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, bt8xxgpio_pci_tbl);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun static struct pci_driver bt8xxgpio_pci_driver = {
299*4882a593Smuzhiyun .name = "bt8xxgpio",
300*4882a593Smuzhiyun .id_table = bt8xxgpio_pci_tbl,
301*4882a593Smuzhiyun .probe = bt8xxgpio_probe,
302*4882a593Smuzhiyun .remove = bt8xxgpio_remove,
303*4882a593Smuzhiyun .suspend = bt8xxgpio_suspend,
304*4882a593Smuzhiyun .resume = bt8xxgpio_resume,
305*4882a593Smuzhiyun };
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun module_pci_driver(bt8xxgpio_pci_driver);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun MODULE_LICENSE("GPL");
310*4882a593Smuzhiyun MODULE_AUTHOR("Michael Buesch");
311*4882a593Smuzhiyun MODULE_DESCRIPTION("Abuse a BT8xx framegrabber card as generic GPIO card");
312