1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // Copyright (C) 2018 ROHM Semiconductors
3*4882a593Smuzhiyun // gpio-bd70528.c ROHM BD70528MWV gpio driver
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #include <linux/gpio/driver.h>
6*4882a593Smuzhiyun #include <linux/mfd/rohm-bd70528.h>
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/regmap.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #define GPIO_IN_REG(offset) (BD70528_REG_GPIO1_IN + (offset) * 2)
12*4882a593Smuzhiyun #define GPIO_OUT_REG(offset) (BD70528_REG_GPIO1_OUT + (offset) * 2)
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun struct bd70528_gpio {
15*4882a593Smuzhiyun struct rohm_regmap_dev chip;
16*4882a593Smuzhiyun struct gpio_chip gpio;
17*4882a593Smuzhiyun };
18*4882a593Smuzhiyun
bd70528_set_debounce(struct bd70528_gpio * bdgpio,unsigned int offset,unsigned int debounce)19*4882a593Smuzhiyun static int bd70528_set_debounce(struct bd70528_gpio *bdgpio,
20*4882a593Smuzhiyun unsigned int offset, unsigned int debounce)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun u8 val;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun switch (debounce) {
25*4882a593Smuzhiyun case 0:
26*4882a593Smuzhiyun val = BD70528_DEBOUNCE_DISABLE;
27*4882a593Smuzhiyun break;
28*4882a593Smuzhiyun case 1 ... 15000:
29*4882a593Smuzhiyun val = BD70528_DEBOUNCE_15MS;
30*4882a593Smuzhiyun break;
31*4882a593Smuzhiyun case 15001 ... 30000:
32*4882a593Smuzhiyun val = BD70528_DEBOUNCE_30MS;
33*4882a593Smuzhiyun break;
34*4882a593Smuzhiyun case 30001 ... 50000:
35*4882a593Smuzhiyun val = BD70528_DEBOUNCE_50MS;
36*4882a593Smuzhiyun break;
37*4882a593Smuzhiyun default:
38*4882a593Smuzhiyun dev_err(bdgpio->chip.dev,
39*4882a593Smuzhiyun "Invalid debounce value %u\n", debounce);
40*4882a593Smuzhiyun return -EINVAL;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun return regmap_update_bits(bdgpio->chip.regmap, GPIO_IN_REG(offset),
43*4882a593Smuzhiyun BD70528_DEBOUNCE_MASK, val);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
bd70528_get_direction(struct gpio_chip * chip,unsigned int offset)46*4882a593Smuzhiyun static int bd70528_get_direction(struct gpio_chip *chip, unsigned int offset)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
49*4882a593Smuzhiyun int val, ret;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Do we need to do something to IRQs here? */
52*4882a593Smuzhiyun ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val);
53*4882a593Smuzhiyun if (ret) {
54*4882a593Smuzhiyun dev_err(bdgpio->chip.dev, "Could not read gpio direction\n");
55*4882a593Smuzhiyun return ret;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun if (val & BD70528_GPIO_OUT_EN_MASK)
58*4882a593Smuzhiyun return GPIO_LINE_DIRECTION_OUT;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return GPIO_LINE_DIRECTION_IN;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
bd70528_gpio_set_config(struct gpio_chip * chip,unsigned int offset,unsigned long config)63*4882a593Smuzhiyun static int bd70528_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
64*4882a593Smuzhiyun unsigned long config)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun switch (pinconf_to_config_param(config)) {
69*4882a593Smuzhiyun case PIN_CONFIG_DRIVE_OPEN_DRAIN:
70*4882a593Smuzhiyun return regmap_update_bits(bdgpio->chip.regmap,
71*4882a593Smuzhiyun GPIO_OUT_REG(offset),
72*4882a593Smuzhiyun BD70528_GPIO_DRIVE_MASK,
73*4882a593Smuzhiyun BD70528_GPIO_OPEN_DRAIN);
74*4882a593Smuzhiyun break;
75*4882a593Smuzhiyun case PIN_CONFIG_DRIVE_PUSH_PULL:
76*4882a593Smuzhiyun return regmap_update_bits(bdgpio->chip.regmap,
77*4882a593Smuzhiyun GPIO_OUT_REG(offset),
78*4882a593Smuzhiyun BD70528_GPIO_DRIVE_MASK,
79*4882a593Smuzhiyun BD70528_GPIO_PUSH_PULL);
80*4882a593Smuzhiyun break;
81*4882a593Smuzhiyun case PIN_CONFIG_INPUT_DEBOUNCE:
82*4882a593Smuzhiyun return bd70528_set_debounce(bdgpio, offset,
83*4882a593Smuzhiyun pinconf_to_config_argument(config));
84*4882a593Smuzhiyun break;
85*4882a593Smuzhiyun default:
86*4882a593Smuzhiyun break;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun return -ENOTSUPP;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
bd70528_direction_input(struct gpio_chip * chip,unsigned int offset)91*4882a593Smuzhiyun static int bd70528_direction_input(struct gpio_chip *chip, unsigned int offset)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /* Do we need to do something to IRQs here? */
96*4882a593Smuzhiyun return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset),
97*4882a593Smuzhiyun BD70528_GPIO_OUT_EN_MASK,
98*4882a593Smuzhiyun BD70528_GPIO_OUT_DISABLE);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
bd70528_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)101*4882a593Smuzhiyun static void bd70528_gpio_set(struct gpio_chip *chip, unsigned int offset,
102*4882a593Smuzhiyun int value)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun int ret;
105*4882a593Smuzhiyun struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
106*4882a593Smuzhiyun u8 val = (value) ? BD70528_GPIO_OUT_HI : BD70528_GPIO_OUT_LO;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun ret = regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset),
109*4882a593Smuzhiyun BD70528_GPIO_OUT_MASK, val);
110*4882a593Smuzhiyun if (ret)
111*4882a593Smuzhiyun dev_err(bdgpio->chip.dev, "Could not set gpio to %d\n", value);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
bd70528_direction_output(struct gpio_chip * chip,unsigned int offset,int value)114*4882a593Smuzhiyun static int bd70528_direction_output(struct gpio_chip *chip, unsigned int offset,
115*4882a593Smuzhiyun int value)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun bd70528_gpio_set(chip, offset, value);
120*4882a593Smuzhiyun return regmap_update_bits(bdgpio->chip.regmap, GPIO_OUT_REG(offset),
121*4882a593Smuzhiyun BD70528_GPIO_OUT_EN_MASK,
122*4882a593Smuzhiyun BD70528_GPIO_OUT_ENABLE);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun #define GPIO_IN_STATE_MASK(offset) (BD70528_GPIO_IN_STATE_BASE << (offset))
126*4882a593Smuzhiyun
bd70528_gpio_get_o(struct bd70528_gpio * bdgpio,unsigned int offset)127*4882a593Smuzhiyun static int bd70528_gpio_get_o(struct bd70528_gpio *bdgpio, unsigned int offset)
128*4882a593Smuzhiyun {
129*4882a593Smuzhiyun int ret;
130*4882a593Smuzhiyun unsigned int val;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun ret = regmap_read(bdgpio->chip.regmap, GPIO_OUT_REG(offset), &val);
133*4882a593Smuzhiyun if (!ret)
134*4882a593Smuzhiyun ret = !!(val & BD70528_GPIO_OUT_MASK);
135*4882a593Smuzhiyun else
136*4882a593Smuzhiyun dev_err(bdgpio->chip.dev, "GPIO (out) state read failed\n");
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun return ret;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
bd70528_gpio_get_i(struct bd70528_gpio * bdgpio,unsigned int offset)141*4882a593Smuzhiyun static int bd70528_gpio_get_i(struct bd70528_gpio *bdgpio, unsigned int offset)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun unsigned int val;
144*4882a593Smuzhiyun int ret;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun ret = regmap_read(bdgpio->chip.regmap, BD70528_REG_GPIO_STATE, &val);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (!ret)
149*4882a593Smuzhiyun ret = !(val & GPIO_IN_STATE_MASK(offset));
150*4882a593Smuzhiyun else
151*4882a593Smuzhiyun dev_err(bdgpio->chip.dev, "GPIO (in) state read failed\n");
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return ret;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
bd70528_gpio_get(struct gpio_chip * chip,unsigned int offset)156*4882a593Smuzhiyun static int bd70528_gpio_get(struct gpio_chip *chip, unsigned int offset)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun int ret;
159*4882a593Smuzhiyun struct bd70528_gpio *bdgpio = gpiochip_get_data(chip);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /*
162*4882a593Smuzhiyun * There is a race condition where someone might be changing the
163*4882a593Smuzhiyun * GPIO direction after we get it but before we read the value. But
164*4882a593Smuzhiyun * application design where GPIO direction may be changed just when
165*4882a593Smuzhiyun * we read GPIO value would be pointless as reader could not know
166*4882a593Smuzhiyun * whether the returned high/low state is caused by input or output.
167*4882a593Smuzhiyun * Or then there must be other ways to mitigate the issue. Thus
168*4882a593Smuzhiyun * locking would make no sense.
169*4882a593Smuzhiyun */
170*4882a593Smuzhiyun ret = bd70528_get_direction(chip, offset);
171*4882a593Smuzhiyun if (ret == GPIO_LINE_DIRECTION_OUT)
172*4882a593Smuzhiyun ret = bd70528_gpio_get_o(bdgpio, offset);
173*4882a593Smuzhiyun else if (ret == GPIO_LINE_DIRECTION_IN)
174*4882a593Smuzhiyun ret = bd70528_gpio_get_i(bdgpio, offset);
175*4882a593Smuzhiyun else
176*4882a593Smuzhiyun dev_err(bdgpio->chip.dev, "failed to read GPIO direction\n");
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun return ret;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
bd70528_probe(struct platform_device * pdev)181*4882a593Smuzhiyun static int bd70528_probe(struct platform_device *pdev)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun struct bd70528_gpio *bdgpio;
184*4882a593Smuzhiyun struct rohm_regmap_dev *bd70528;
185*4882a593Smuzhiyun int ret;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun bd70528 = dev_get_drvdata(pdev->dev.parent);
188*4882a593Smuzhiyun if (!bd70528) {
189*4882a593Smuzhiyun dev_err(&pdev->dev, "No MFD driver data\n");
190*4882a593Smuzhiyun return -EINVAL;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun bdgpio = devm_kzalloc(&pdev->dev, sizeof(*bdgpio),
194*4882a593Smuzhiyun GFP_KERNEL);
195*4882a593Smuzhiyun if (!bdgpio)
196*4882a593Smuzhiyun return -ENOMEM;
197*4882a593Smuzhiyun bdgpio->chip.dev = &pdev->dev;
198*4882a593Smuzhiyun bdgpio->gpio.parent = pdev->dev.parent;
199*4882a593Smuzhiyun bdgpio->gpio.label = "bd70528-gpio";
200*4882a593Smuzhiyun bdgpio->gpio.owner = THIS_MODULE;
201*4882a593Smuzhiyun bdgpio->gpio.get_direction = bd70528_get_direction;
202*4882a593Smuzhiyun bdgpio->gpio.direction_input = bd70528_direction_input;
203*4882a593Smuzhiyun bdgpio->gpio.direction_output = bd70528_direction_output;
204*4882a593Smuzhiyun bdgpio->gpio.set_config = bd70528_gpio_set_config;
205*4882a593Smuzhiyun bdgpio->gpio.can_sleep = true;
206*4882a593Smuzhiyun bdgpio->gpio.get = bd70528_gpio_get;
207*4882a593Smuzhiyun bdgpio->gpio.set = bd70528_gpio_set;
208*4882a593Smuzhiyun bdgpio->gpio.ngpio = 4;
209*4882a593Smuzhiyun bdgpio->gpio.base = -1;
210*4882a593Smuzhiyun #ifdef CONFIG_OF_GPIO
211*4882a593Smuzhiyun bdgpio->gpio.of_node = pdev->dev.parent->of_node;
212*4882a593Smuzhiyun #endif
213*4882a593Smuzhiyun bdgpio->chip.regmap = bd70528->regmap;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun ret = devm_gpiochip_add_data(&pdev->dev, &bdgpio->gpio,
216*4882a593Smuzhiyun bdgpio);
217*4882a593Smuzhiyun if (ret)
218*4882a593Smuzhiyun dev_err(&pdev->dev, "gpio_init: Failed to add bd70528-gpio\n");
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return ret;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun static struct platform_driver bd70528_gpio = {
224*4882a593Smuzhiyun .driver = {
225*4882a593Smuzhiyun .name = "bd70528-gpio"
226*4882a593Smuzhiyun },
227*4882a593Smuzhiyun .probe = bd70528_probe,
228*4882a593Smuzhiyun };
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun module_platform_driver(bd70528_gpio);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
233*4882a593Smuzhiyun MODULE_DESCRIPTION("BD70528 voltage regulator driver");
234*4882a593Smuzhiyun MODULE_LICENSE("GPL");
235*4882a593Smuzhiyun MODULE_ALIAS("platform:bd70528-gpio");
236