1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright Intel Corporation (C) 2014-2016. All Rights Reserved
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * GPIO driver for Altera Arria10 MAX5 System Resource Chip
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Adapted from gpio-tps65910.c
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/gpio/driver.h>
11*4882a593Smuzhiyun #include <linux/mfd/altera-a10sr.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun /**
15*4882a593Smuzhiyun * struct altr_a10sr_gpio - Altera Max5 GPIO device private data structure
16*4882a593Smuzhiyun * @gp: : instance of the gpio_chip
17*4882a593Smuzhiyun * @regmap: the regmap from the parent device.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun struct altr_a10sr_gpio {
20*4882a593Smuzhiyun struct gpio_chip gp;
21*4882a593Smuzhiyun struct regmap *regmap;
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun
altr_a10sr_gpio_get(struct gpio_chip * chip,unsigned int offset)24*4882a593Smuzhiyun static int altr_a10sr_gpio_get(struct gpio_chip *chip, unsigned int offset)
25*4882a593Smuzhiyun {
26*4882a593Smuzhiyun struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
27*4882a593Smuzhiyun int ret, val;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun ret = regmap_read(gpio->regmap, ALTR_A10SR_PBDSW_REG, &val);
30*4882a593Smuzhiyun if (ret < 0)
31*4882a593Smuzhiyun return ret;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return !!(val & BIT(offset - ALTR_A10SR_LED_VALID_SHIFT));
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
altr_a10sr_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)36*4882a593Smuzhiyun static void altr_a10sr_gpio_set(struct gpio_chip *chip, unsigned int offset,
37*4882a593Smuzhiyun int value)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun struct altr_a10sr_gpio *gpio = gpiochip_get_data(chip);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun regmap_update_bits(gpio->regmap, ALTR_A10SR_LED_REG,
42*4882a593Smuzhiyun BIT(ALTR_A10SR_LED_VALID_SHIFT + offset),
43*4882a593Smuzhiyun value ? BIT(ALTR_A10SR_LED_VALID_SHIFT + offset)
44*4882a593Smuzhiyun : 0);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
altr_a10sr_gpio_direction_input(struct gpio_chip * gc,unsigned int nr)47*4882a593Smuzhiyun static int altr_a10sr_gpio_direction_input(struct gpio_chip *gc,
48*4882a593Smuzhiyun unsigned int nr)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun if (nr < (ALTR_A10SR_IN_VALID_RANGE_LO - ALTR_A10SR_LED_VALID_SHIFT))
51*4882a593Smuzhiyun return -EINVAL;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun return 0;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
altr_a10sr_gpio_direction_output(struct gpio_chip * gc,unsigned int nr,int value)56*4882a593Smuzhiyun static int altr_a10sr_gpio_direction_output(struct gpio_chip *gc,
57*4882a593Smuzhiyun unsigned int nr, int value)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun if (nr > (ALTR_A10SR_OUT_VALID_RANGE_HI - ALTR_A10SR_LED_VALID_SHIFT))
60*4882a593Smuzhiyun return -EINVAL;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun altr_a10sr_gpio_set(gc, nr, value);
63*4882a593Smuzhiyun return 0;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun static const struct gpio_chip altr_a10sr_gc = {
67*4882a593Smuzhiyun .label = "altr_a10sr_gpio",
68*4882a593Smuzhiyun .owner = THIS_MODULE,
69*4882a593Smuzhiyun .get = altr_a10sr_gpio_get,
70*4882a593Smuzhiyun .set = altr_a10sr_gpio_set,
71*4882a593Smuzhiyun .direction_input = altr_a10sr_gpio_direction_input,
72*4882a593Smuzhiyun .direction_output = altr_a10sr_gpio_direction_output,
73*4882a593Smuzhiyun .can_sleep = true,
74*4882a593Smuzhiyun .ngpio = 12,
75*4882a593Smuzhiyun .base = -1,
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
altr_a10sr_gpio_probe(struct platform_device * pdev)78*4882a593Smuzhiyun static int altr_a10sr_gpio_probe(struct platform_device *pdev)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct altr_a10sr_gpio *gpio;
81*4882a593Smuzhiyun int ret;
82*4882a593Smuzhiyun struct altr_a10sr *a10sr = dev_get_drvdata(pdev->dev.parent);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
85*4882a593Smuzhiyun if (!gpio)
86*4882a593Smuzhiyun return -ENOMEM;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun gpio->regmap = a10sr->regmap;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun gpio->gp = altr_a10sr_gc;
91*4882a593Smuzhiyun gpio->gp.parent = pdev->dev.parent;
92*4882a593Smuzhiyun gpio->gp.of_node = pdev->dev.of_node;
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun ret = devm_gpiochip_add_data(&pdev->dev, &gpio->gp, gpio);
95*4882a593Smuzhiyun if (ret < 0) {
96*4882a593Smuzhiyun dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
97*4882a593Smuzhiyun return ret;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun platform_set_drvdata(pdev, gpio);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static const struct of_device_id altr_a10sr_gpio_of_match[] = {
106*4882a593Smuzhiyun { .compatible = "altr,a10sr-gpio" },
107*4882a593Smuzhiyun { },
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, altr_a10sr_gpio_of_match);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun static struct platform_driver altr_a10sr_gpio_driver = {
112*4882a593Smuzhiyun .probe = altr_a10sr_gpio_probe,
113*4882a593Smuzhiyun .driver = {
114*4882a593Smuzhiyun .name = "altr_a10sr_gpio",
115*4882a593Smuzhiyun .of_match_table = of_match_ptr(altr_a10sr_gpio_of_match),
116*4882a593Smuzhiyun },
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun module_platform_driver(altr_a10sr_gpio_driver);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
121*4882a593Smuzhiyun MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
122*4882a593Smuzhiyun MODULE_DESCRIPTION("Altera Arria10 System Resource Chip GPIO");
123