xref: /OK3568_Linux_fs/kernel/drivers/fpga/fpga-region.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * FPGA Region - Support for FPGA programming under Linux
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  *  Copyright (C) 2013-2016 Altera Corporation
6*4882a593Smuzhiyun  *  Copyright (C) 2017 Intel Corporation
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun #include <linux/fpga/fpga-bridge.h>
9*4882a593Smuzhiyun #include <linux/fpga/fpga-mgr.h>
10*4882a593Smuzhiyun #include <linux/fpga/fpga-region.h>
11*4882a593Smuzhiyun #include <linux/idr.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/list.h>
14*4882a593Smuzhiyun #include <linux/module.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/spinlock.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun static DEFINE_IDA(fpga_region_ida);
19*4882a593Smuzhiyun static struct class *fpga_region_class;
20*4882a593Smuzhiyun 
fpga_region_class_find(struct device * start,const void * data,int (* match)(struct device *,const void *))21*4882a593Smuzhiyun struct fpga_region *fpga_region_class_find(
22*4882a593Smuzhiyun 	struct device *start, const void *data,
23*4882a593Smuzhiyun 	int (*match)(struct device *, const void *))
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	struct device *dev;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	dev = class_find_device(fpga_region_class, start, data, match);
28*4882a593Smuzhiyun 	if (!dev)
29*4882a593Smuzhiyun 		return NULL;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	return to_fpga_region(dev);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(fpga_region_class_find);
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /**
36*4882a593Smuzhiyun  * fpga_region_get - get an exclusive reference to a fpga region
37*4882a593Smuzhiyun  * @region: FPGA Region struct
38*4882a593Smuzhiyun  *
39*4882a593Smuzhiyun  * Caller should call fpga_region_put() when done with region.
40*4882a593Smuzhiyun  *
41*4882a593Smuzhiyun  * Return fpga_region struct if successful.
42*4882a593Smuzhiyun  * Return -EBUSY if someone already has a reference to the region.
43*4882a593Smuzhiyun  * Return -ENODEV if @np is not a FPGA Region.
44*4882a593Smuzhiyun  */
fpga_region_get(struct fpga_region * region)45*4882a593Smuzhiyun static struct fpga_region *fpga_region_get(struct fpga_region *region)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	struct device *dev = &region->dev;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	if (!mutex_trylock(&region->mutex)) {
50*4882a593Smuzhiyun 		dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
51*4882a593Smuzhiyun 		return ERR_PTR(-EBUSY);
52*4882a593Smuzhiyun 	}
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	get_device(dev);
55*4882a593Smuzhiyun 	if (!try_module_get(dev->parent->driver->owner)) {
56*4882a593Smuzhiyun 		put_device(dev);
57*4882a593Smuzhiyun 		mutex_unlock(&region->mutex);
58*4882a593Smuzhiyun 		return ERR_PTR(-ENODEV);
59*4882a593Smuzhiyun 	}
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	dev_dbg(dev, "get\n");
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	return region;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /**
67*4882a593Smuzhiyun  * fpga_region_put - release a reference to a region
68*4882a593Smuzhiyun  *
69*4882a593Smuzhiyun  * @region: FPGA region
70*4882a593Smuzhiyun  */
fpga_region_put(struct fpga_region * region)71*4882a593Smuzhiyun static void fpga_region_put(struct fpga_region *region)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	struct device *dev = &region->dev;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	dev_dbg(dev, "put\n");
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	module_put(dev->parent->driver->owner);
78*4882a593Smuzhiyun 	put_device(dev);
79*4882a593Smuzhiyun 	mutex_unlock(&region->mutex);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun /**
83*4882a593Smuzhiyun  * fpga_region_program_fpga - program FPGA
84*4882a593Smuzhiyun  *
85*4882a593Smuzhiyun  * @region: FPGA region
86*4882a593Smuzhiyun  *
87*4882a593Smuzhiyun  * Program an FPGA using fpga image info (region->info).
88*4882a593Smuzhiyun  * If the region has a get_bridges function, the exclusive reference for the
89*4882a593Smuzhiyun  * bridges will be held if programming succeeds.  This is intended to prevent
90*4882a593Smuzhiyun  * reprogramming the region until the caller considers it safe to do so.
91*4882a593Smuzhiyun  * The caller will need to call fpga_bridges_put() before attempting to
92*4882a593Smuzhiyun  * reprogram the region.
93*4882a593Smuzhiyun  *
94*4882a593Smuzhiyun  * Return 0 for success or negative error code.
95*4882a593Smuzhiyun  */
fpga_region_program_fpga(struct fpga_region * region)96*4882a593Smuzhiyun int fpga_region_program_fpga(struct fpga_region *region)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	struct device *dev = &region->dev;
99*4882a593Smuzhiyun 	struct fpga_image_info *info = region->info;
100*4882a593Smuzhiyun 	int ret;
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	region = fpga_region_get(region);
103*4882a593Smuzhiyun 	if (IS_ERR(region)) {
104*4882a593Smuzhiyun 		dev_err(dev, "failed to get FPGA region\n");
105*4882a593Smuzhiyun 		return PTR_ERR(region);
106*4882a593Smuzhiyun 	}
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	ret = fpga_mgr_lock(region->mgr);
109*4882a593Smuzhiyun 	if (ret) {
110*4882a593Smuzhiyun 		dev_err(dev, "FPGA manager is busy\n");
111*4882a593Smuzhiyun 		goto err_put_region;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	/*
115*4882a593Smuzhiyun 	 * In some cases, we already have a list of bridges in the
116*4882a593Smuzhiyun 	 * fpga region struct.  Or we don't have any bridges.
117*4882a593Smuzhiyun 	 */
118*4882a593Smuzhiyun 	if (region->get_bridges) {
119*4882a593Smuzhiyun 		ret = region->get_bridges(region);
120*4882a593Smuzhiyun 		if (ret) {
121*4882a593Smuzhiyun 			dev_err(dev, "failed to get fpga region bridges\n");
122*4882a593Smuzhiyun 			goto err_unlock_mgr;
123*4882a593Smuzhiyun 		}
124*4882a593Smuzhiyun 	}
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ret = fpga_bridges_disable(&region->bridge_list);
127*4882a593Smuzhiyun 	if (ret) {
128*4882a593Smuzhiyun 		dev_err(dev, "failed to disable bridges\n");
129*4882a593Smuzhiyun 		goto err_put_br;
130*4882a593Smuzhiyun 	}
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	ret = fpga_mgr_load(region->mgr, info);
133*4882a593Smuzhiyun 	if (ret) {
134*4882a593Smuzhiyun 		dev_err(dev, "failed to load FPGA image\n");
135*4882a593Smuzhiyun 		goto err_put_br;
136*4882a593Smuzhiyun 	}
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	ret = fpga_bridges_enable(&region->bridge_list);
139*4882a593Smuzhiyun 	if (ret) {
140*4882a593Smuzhiyun 		dev_err(dev, "failed to enable region bridges\n");
141*4882a593Smuzhiyun 		goto err_put_br;
142*4882a593Smuzhiyun 	}
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	fpga_mgr_unlock(region->mgr);
145*4882a593Smuzhiyun 	fpga_region_put(region);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	return 0;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun err_put_br:
150*4882a593Smuzhiyun 	if (region->get_bridges)
151*4882a593Smuzhiyun 		fpga_bridges_put(&region->bridge_list);
152*4882a593Smuzhiyun err_unlock_mgr:
153*4882a593Smuzhiyun 	fpga_mgr_unlock(region->mgr);
154*4882a593Smuzhiyun err_put_region:
155*4882a593Smuzhiyun 	fpga_region_put(region);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(fpga_region_program_fpga);
160*4882a593Smuzhiyun 
compat_id_show(struct device * dev,struct device_attribute * attr,char * buf)161*4882a593Smuzhiyun static ssize_t compat_id_show(struct device *dev,
162*4882a593Smuzhiyun 			      struct device_attribute *attr, char *buf)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	struct fpga_region *region = to_fpga_region(dev);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	if (!region->compat_id)
167*4882a593Smuzhiyun 		return -ENOENT;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	return sprintf(buf, "%016llx%016llx\n",
170*4882a593Smuzhiyun 		       (unsigned long long)region->compat_id->id_h,
171*4882a593Smuzhiyun 		       (unsigned long long)region->compat_id->id_l);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun static DEVICE_ATTR_RO(compat_id);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun static struct attribute *fpga_region_attrs[] = {
177*4882a593Smuzhiyun 	&dev_attr_compat_id.attr,
178*4882a593Smuzhiyun 	NULL,
179*4882a593Smuzhiyun };
180*4882a593Smuzhiyun ATTRIBUTE_GROUPS(fpga_region);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun /**
183*4882a593Smuzhiyun  * fpga_region_create - alloc and init a struct fpga_region
184*4882a593Smuzhiyun  * @dev: device parent
185*4882a593Smuzhiyun  * @mgr: manager that programs this region
186*4882a593Smuzhiyun  * @get_bridges: optional function to get bridges to a list
187*4882a593Smuzhiyun  *
188*4882a593Smuzhiyun  * The caller of this function is responsible for freeing the resulting region
189*4882a593Smuzhiyun  * struct with fpga_region_free().  Using devm_fpga_region_create() instead is
190*4882a593Smuzhiyun  * recommended.
191*4882a593Smuzhiyun  *
192*4882a593Smuzhiyun  * Return: struct fpga_region or NULL
193*4882a593Smuzhiyun  */
194*4882a593Smuzhiyun struct fpga_region
fpga_region_create(struct device * dev,struct fpga_manager * mgr,int (* get_bridges)(struct fpga_region *))195*4882a593Smuzhiyun *fpga_region_create(struct device *dev,
196*4882a593Smuzhiyun 		    struct fpga_manager *mgr,
197*4882a593Smuzhiyun 		    int (*get_bridges)(struct fpga_region *))
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun 	struct fpga_region *region;
200*4882a593Smuzhiyun 	int id, ret = 0;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	region = kzalloc(sizeof(*region), GFP_KERNEL);
203*4882a593Smuzhiyun 	if (!region)
204*4882a593Smuzhiyun 		return NULL;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
207*4882a593Smuzhiyun 	if (id < 0)
208*4882a593Smuzhiyun 		goto err_free;
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	region->mgr = mgr;
211*4882a593Smuzhiyun 	region->get_bridges = get_bridges;
212*4882a593Smuzhiyun 	mutex_init(&region->mutex);
213*4882a593Smuzhiyun 	INIT_LIST_HEAD(&region->bridge_list);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	device_initialize(&region->dev);
216*4882a593Smuzhiyun 	region->dev.class = fpga_region_class;
217*4882a593Smuzhiyun 	region->dev.parent = dev;
218*4882a593Smuzhiyun 	region->dev.of_node = dev->of_node;
219*4882a593Smuzhiyun 	region->dev.id = id;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	ret = dev_set_name(&region->dev, "region%d", id);
222*4882a593Smuzhiyun 	if (ret)
223*4882a593Smuzhiyun 		goto err_remove;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	return region;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun err_remove:
228*4882a593Smuzhiyun 	ida_simple_remove(&fpga_region_ida, id);
229*4882a593Smuzhiyun err_free:
230*4882a593Smuzhiyun 	kfree(region);
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	return NULL;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(fpga_region_create);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun /**
237*4882a593Smuzhiyun  * fpga_region_free - free a FPGA region created by fpga_region_create()
238*4882a593Smuzhiyun  * @region: FPGA region
239*4882a593Smuzhiyun  */
fpga_region_free(struct fpga_region * region)240*4882a593Smuzhiyun void fpga_region_free(struct fpga_region *region)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun 	ida_simple_remove(&fpga_region_ida, region->dev.id);
243*4882a593Smuzhiyun 	kfree(region);
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(fpga_region_free);
246*4882a593Smuzhiyun 
devm_fpga_region_release(struct device * dev,void * res)247*4882a593Smuzhiyun static void devm_fpga_region_release(struct device *dev, void *res)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun 	struct fpga_region *region = *(struct fpga_region **)res;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	fpga_region_free(region);
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun /**
255*4882a593Smuzhiyun  * devm_fpga_region_create - create and initialize a managed FPGA region struct
256*4882a593Smuzhiyun  * @dev: device parent
257*4882a593Smuzhiyun  * @mgr: manager that programs this region
258*4882a593Smuzhiyun  * @get_bridges: optional function to get bridges to a list
259*4882a593Smuzhiyun  *
260*4882a593Smuzhiyun  * This function is intended for use in a FPGA region driver's probe function.
261*4882a593Smuzhiyun  * After the region driver creates the region struct with
262*4882a593Smuzhiyun  * devm_fpga_region_create(), it should register it with fpga_region_register().
263*4882a593Smuzhiyun  * The region driver's remove function should call fpga_region_unregister().
264*4882a593Smuzhiyun  * The region struct allocated with this function will be freed automatically on
265*4882a593Smuzhiyun  * driver detach.  This includes the case of a probe function returning error
266*4882a593Smuzhiyun  * before calling fpga_region_register(), the struct will still get cleaned up.
267*4882a593Smuzhiyun  *
268*4882a593Smuzhiyun  * Return: struct fpga_region or NULL
269*4882a593Smuzhiyun  */
270*4882a593Smuzhiyun struct fpga_region
devm_fpga_region_create(struct device * dev,struct fpga_manager * mgr,int (* get_bridges)(struct fpga_region *))271*4882a593Smuzhiyun *devm_fpga_region_create(struct device *dev,
272*4882a593Smuzhiyun 			 struct fpga_manager *mgr,
273*4882a593Smuzhiyun 			 int (*get_bridges)(struct fpga_region *))
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun 	struct fpga_region **ptr, *region;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	ptr = devres_alloc(devm_fpga_region_release, sizeof(*ptr), GFP_KERNEL);
278*4882a593Smuzhiyun 	if (!ptr)
279*4882a593Smuzhiyun 		return NULL;
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	region = fpga_region_create(dev, mgr, get_bridges);
282*4882a593Smuzhiyun 	if (!region) {
283*4882a593Smuzhiyun 		devres_free(ptr);
284*4882a593Smuzhiyun 	} else {
285*4882a593Smuzhiyun 		*ptr = region;
286*4882a593Smuzhiyun 		devres_add(dev, ptr);
287*4882a593Smuzhiyun 	}
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	return region;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(devm_fpga_region_create);
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun /**
294*4882a593Smuzhiyun  * fpga_region_register - register a FPGA region
295*4882a593Smuzhiyun  * @region: FPGA region
296*4882a593Smuzhiyun  *
297*4882a593Smuzhiyun  * Return: 0 or -errno
298*4882a593Smuzhiyun  */
fpga_region_register(struct fpga_region * region)299*4882a593Smuzhiyun int fpga_region_register(struct fpga_region *region)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun 	return device_add(&region->dev);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(fpga_region_register);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun /**
306*4882a593Smuzhiyun  * fpga_region_unregister - unregister a FPGA region
307*4882a593Smuzhiyun  * @region: FPGA region
308*4882a593Smuzhiyun  *
309*4882a593Smuzhiyun  * This function is intended for use in a FPGA region driver's remove function.
310*4882a593Smuzhiyun  */
fpga_region_unregister(struct fpga_region * region)311*4882a593Smuzhiyun void fpga_region_unregister(struct fpga_region *region)
312*4882a593Smuzhiyun {
313*4882a593Smuzhiyun 	device_unregister(&region->dev);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(fpga_region_unregister);
316*4882a593Smuzhiyun 
fpga_region_dev_release(struct device * dev)317*4882a593Smuzhiyun static void fpga_region_dev_release(struct device *dev)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun /**
322*4882a593Smuzhiyun  * fpga_region_init - init function for fpga_region class
323*4882a593Smuzhiyun  * Creates the fpga_region class and registers a reconfig notifier.
324*4882a593Smuzhiyun  */
fpga_region_init(void)325*4882a593Smuzhiyun static int __init fpga_region_init(void)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun 	fpga_region_class = class_create(THIS_MODULE, "fpga_region");
328*4882a593Smuzhiyun 	if (IS_ERR(fpga_region_class))
329*4882a593Smuzhiyun 		return PTR_ERR(fpga_region_class);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	fpga_region_class->dev_groups = fpga_region_groups;
332*4882a593Smuzhiyun 	fpga_region_class->dev_release = fpga_region_dev_release;
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	return 0;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
fpga_region_exit(void)337*4882a593Smuzhiyun static void __exit fpga_region_exit(void)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun 	class_destroy(fpga_region_class);
340*4882a593Smuzhiyun 	ida_destroy(&fpga_region_ida);
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun subsys_initcall(fpga_region_init);
344*4882a593Smuzhiyun module_exit(fpga_region_exit);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun MODULE_DESCRIPTION("FPGA Region");
347*4882a593Smuzhiyun MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
348*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
349