1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun# 3*4882a593Smuzhiyun# Makefile for the fpga framework and fpga manager drivers. 4*4882a593Smuzhiyun# 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun# Core FPGA Manager Framework 7*4882a593Smuzhiyunobj-$(CONFIG_FPGA) += fpga-mgr.o 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun# FPGA Manager Drivers 10*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o 11*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o 12*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o 13*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o 14*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o 15*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o 16*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o 17*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o 18*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o 19*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o 20*4882a593Smuzhiyunobj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o 21*4882a593Smuzhiyunobj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o 22*4882a593Smuzhiyunobj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun# FPGA Bridge Drivers 25*4882a593Smuzhiyunobj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o 26*4882a593Smuzhiyunobj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o 27*4882a593Smuzhiyunobj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o 28*4882a593Smuzhiyunobj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun# High Level Interfaces 31*4882a593Smuzhiyunobj-$(CONFIG_FPGA_REGION) += fpga-region.o 32*4882a593Smuzhiyunobj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun# FPGA Device Feature List Support 35*4882a593Smuzhiyunobj-$(CONFIG_FPGA_DFL) += dfl.o 36*4882a593Smuzhiyunobj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o 37*4882a593Smuzhiyunobj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o 38*4882a593Smuzhiyunobj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o 39*4882a593Smuzhiyunobj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o 40*4882a593Smuzhiyunobj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o 41*4882a593Smuzhiyun 42*4882a593Smuzhiyundfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o dfl-fme-error.o 43*4882a593Smuzhiyundfl-fme-objs += dfl-fme-perf.o 44*4882a593Smuzhiyundfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o 45*4882a593Smuzhiyundfl-afu-objs += dfl-afu-error.o 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun# Drivers for FPGAs which implement DFL 48*4882a593Smuzhiyunobj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o 49