1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2018, NVIDIA CORPORATION. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __FIRMWARE_TEGRA_BPMP_PRIVATE_H 7*4882a593Smuzhiyun #define __FIRMWARE_TEGRA_BPMP_PRIVATE_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <soc/tegra/bpmp.h> 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun struct tegra_bpmp_ops { 12*4882a593Smuzhiyun int (*init)(struct tegra_bpmp *bpmp); 13*4882a593Smuzhiyun void (*deinit)(struct tegra_bpmp *bpmp); 14*4882a593Smuzhiyun bool (*is_response_ready)(struct tegra_bpmp_channel *channel); 15*4882a593Smuzhiyun bool (*is_request_ready)(struct tegra_bpmp_channel *channel); 16*4882a593Smuzhiyun int (*ack_response)(struct tegra_bpmp_channel *channel); 17*4882a593Smuzhiyun int (*ack_request)(struct tegra_bpmp_channel *channel); 18*4882a593Smuzhiyun bool (*is_response_channel_free)(struct tegra_bpmp_channel *channel); 19*4882a593Smuzhiyun bool (*is_request_channel_free)(struct tegra_bpmp_channel *channel); 20*4882a593Smuzhiyun int (*post_response)(struct tegra_bpmp_channel *channel); 21*4882a593Smuzhiyun int (*post_request)(struct tegra_bpmp_channel *channel); 22*4882a593Smuzhiyun int (*ring_doorbell)(struct tegra_bpmp *bpmp); 23*4882a593Smuzhiyun int (*resume)(struct tegra_bpmp *bpmp); 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) || \ 27*4882a593Smuzhiyun IS_ENABLED(CONFIG_ARCH_TEGRA_194_SOC) || \ 28*4882a593Smuzhiyun IS_ENABLED(CONFIG_ARCH_TEGRA_234_SOC) 29*4882a593Smuzhiyun extern const struct tegra_bpmp_ops tegra186_bpmp_ops; 30*4882a593Smuzhiyun #endif 31*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) 32*4882a593Smuzhiyun extern const struct tegra_bpmp_ops tegra210_bpmp_ops; 33*4882a593Smuzhiyun #endif 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #endif 36