1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Definitions for PCDP-defined console devices 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * For DIG64_HCDPv10a_01.pdf and DIG64_PCDPv20.pdf (v1.0a and v2.0 resp.), 6*4882a593Smuzhiyun * please see <http://www.dig64.org/specifications/> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * (c) Copyright 2002, 2004 Hewlett-Packard Development Company, L.P. 9*4882a593Smuzhiyun * Khalid Aziz <khalid.aziz@hp.com> 10*4882a593Smuzhiyun * Bjorn Helgaas <bjorn.helgaas@hp.com> 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define PCDP_CONSOLE 0 14*4882a593Smuzhiyun #define PCDP_DEBUG 1 15*4882a593Smuzhiyun #define PCDP_CONSOLE_OUTPUT 2 16*4882a593Smuzhiyun #define PCDP_CONSOLE_INPUT 3 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define PCDP_UART (0 << 3) 19*4882a593Smuzhiyun #define PCDP_VGA (1 << 3) 20*4882a593Smuzhiyun #define PCDP_USB (2 << 3) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* pcdp_uart.type and pcdp_device.type */ 23*4882a593Smuzhiyun #define PCDP_CONSOLE_UART (PCDP_UART | PCDP_CONSOLE) 24*4882a593Smuzhiyun #define PCDP_DEBUG_UART (PCDP_UART | PCDP_DEBUG) 25*4882a593Smuzhiyun #define PCDP_CONSOLE_VGA (PCDP_VGA | PCDP_CONSOLE_OUTPUT) 26*4882a593Smuzhiyun #define PCDP_CONSOLE_USB (PCDP_USB | PCDP_CONSOLE_INPUT) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /* pcdp_uart.flags */ 29*4882a593Smuzhiyun #define PCDP_UART_EDGE_SENSITIVE (1 << 0) 30*4882a593Smuzhiyun #define PCDP_UART_ACTIVE_LOW (1 << 1) 31*4882a593Smuzhiyun #define PCDP_UART_PRIMARY_CONSOLE (1 << 2) 32*4882a593Smuzhiyun #define PCDP_UART_IRQ (1 << 6) /* in pci_func for rev < 3 */ 33*4882a593Smuzhiyun #define PCDP_UART_PCI (1 << 7) /* in pci_func for rev < 3 */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun struct pcdp_uart { 36*4882a593Smuzhiyun u8 type; 37*4882a593Smuzhiyun u8 bits; 38*4882a593Smuzhiyun u8 parity; 39*4882a593Smuzhiyun u8 stop_bits; 40*4882a593Smuzhiyun u8 pci_seg; 41*4882a593Smuzhiyun u8 pci_bus; 42*4882a593Smuzhiyun u8 pci_dev; 43*4882a593Smuzhiyun u8 pci_func; 44*4882a593Smuzhiyun u64 baud; 45*4882a593Smuzhiyun struct acpi_generic_address addr; 46*4882a593Smuzhiyun u16 pci_dev_id; 47*4882a593Smuzhiyun u16 pci_vendor_id; 48*4882a593Smuzhiyun u32 gsi; 49*4882a593Smuzhiyun u32 clock_rate; 50*4882a593Smuzhiyun u8 pci_prog_intfc; 51*4882a593Smuzhiyun u8 flags; 52*4882a593Smuzhiyun u16 conout_index; 53*4882a593Smuzhiyun u32 reserved; 54*4882a593Smuzhiyun } __attribute__((packed)); 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define PCDP_IF_PCI 1 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* pcdp_if_pci.trans */ 59*4882a593Smuzhiyun #define PCDP_PCI_TRANS_IOPORT 0x02 60*4882a593Smuzhiyun #define PCDP_PCI_TRANS_MMIO 0x01 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun struct pcdp_if_pci { 63*4882a593Smuzhiyun u8 interconnect; 64*4882a593Smuzhiyun u8 reserved; 65*4882a593Smuzhiyun u16 length; 66*4882a593Smuzhiyun u8 segment; 67*4882a593Smuzhiyun u8 bus; 68*4882a593Smuzhiyun u8 dev; 69*4882a593Smuzhiyun u8 fun; 70*4882a593Smuzhiyun u16 dev_id; 71*4882a593Smuzhiyun u16 vendor_id; 72*4882a593Smuzhiyun u32 acpi_interrupt; 73*4882a593Smuzhiyun u64 mmio_tra; 74*4882a593Smuzhiyun u64 ioport_tra; 75*4882a593Smuzhiyun u8 flags; 76*4882a593Smuzhiyun u8 trans; 77*4882a593Smuzhiyun } __attribute__((packed)); 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun struct pcdp_vga { 80*4882a593Smuzhiyun u8 count; /* address space descriptors */ 81*4882a593Smuzhiyun } __attribute__((packed)); 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun /* pcdp_device.flags */ 84*4882a593Smuzhiyun #define PCDP_PRIMARY_CONSOLE 1 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun struct pcdp_device { 87*4882a593Smuzhiyun u8 type; 88*4882a593Smuzhiyun u8 flags; 89*4882a593Smuzhiyun u16 length; 90*4882a593Smuzhiyun u16 efi_index; 91*4882a593Smuzhiyun /* next data is pcdp_if_pci or pcdp_if_acpi (not yet supported) */ 92*4882a593Smuzhiyun /* next data is device specific type (currently only pcdp_vga) */ 93*4882a593Smuzhiyun } __attribute__((packed)); 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun struct pcdp { 96*4882a593Smuzhiyun u8 signature[4]; 97*4882a593Smuzhiyun u32 length; 98*4882a593Smuzhiyun u8 rev; /* PCDP v2.0 is rev 3 */ 99*4882a593Smuzhiyun u8 chksum; 100*4882a593Smuzhiyun u8 oemid[6]; 101*4882a593Smuzhiyun u8 oem_tabid[8]; 102*4882a593Smuzhiyun u32 oem_rev; 103*4882a593Smuzhiyun u8 creator_id[4]; 104*4882a593Smuzhiyun u32 creator_rev; 105*4882a593Smuzhiyun u32 num_uarts; 106*4882a593Smuzhiyun struct pcdp_uart uart[]; /* actual size is num_uarts */ 107*4882a593Smuzhiyun /* remainder of table is pcdp_device structures */ 108*4882a593Smuzhiyun } __attribute__((packed)); 109