1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2018 NXP
4*4882a593Smuzhiyun * Author: Dong Aisheng <aisheng.dong@nxp.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Implementation of the SCU IPC functions using MUs (client side).
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/firmware/imx/ipc.h>
12*4882a593Smuzhiyun #include <linux/firmware/imx/sci.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/irq.h>
15*4882a593Smuzhiyun #include <linux/kernel.h>
16*4882a593Smuzhiyun #include <linux/mailbox_client.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/mutex.h>
19*4882a593Smuzhiyun #include <linux/of_platform.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define SCU_MU_CHAN_NUM 8
23*4882a593Smuzhiyun #define MAX_RX_TIMEOUT (msecs_to_jiffies(30))
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun struct imx_sc_chan {
26*4882a593Smuzhiyun struct imx_sc_ipc *sc_ipc;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun struct mbox_client cl;
29*4882a593Smuzhiyun struct mbox_chan *ch;
30*4882a593Smuzhiyun int idx;
31*4882a593Smuzhiyun struct completion tx_done;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun struct imx_sc_ipc {
35*4882a593Smuzhiyun /* SCU uses 4 Tx and 4 Rx channels */
36*4882a593Smuzhiyun struct imx_sc_chan chans[SCU_MU_CHAN_NUM];
37*4882a593Smuzhiyun struct device *dev;
38*4882a593Smuzhiyun struct mutex lock;
39*4882a593Smuzhiyun struct completion done;
40*4882a593Smuzhiyun bool fast_ipc;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* temporarily store the SCU msg */
43*4882a593Smuzhiyun u32 *msg;
44*4882a593Smuzhiyun u8 rx_size;
45*4882a593Smuzhiyun u8 count;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /*
49*4882a593Smuzhiyun * This type is used to indicate error response for most functions.
50*4882a593Smuzhiyun */
51*4882a593Smuzhiyun enum imx_sc_error_codes {
52*4882a593Smuzhiyun IMX_SC_ERR_NONE = 0, /* Success */
53*4882a593Smuzhiyun IMX_SC_ERR_VERSION = 1, /* Incompatible API version */
54*4882a593Smuzhiyun IMX_SC_ERR_CONFIG = 2, /* Configuration error */
55*4882a593Smuzhiyun IMX_SC_ERR_PARM = 3, /* Bad parameter */
56*4882a593Smuzhiyun IMX_SC_ERR_NOACCESS = 4, /* Permission error (no access) */
57*4882a593Smuzhiyun IMX_SC_ERR_LOCKED = 5, /* Permission error (locked) */
58*4882a593Smuzhiyun IMX_SC_ERR_UNAVAILABLE = 6, /* Unavailable (out of resources) */
59*4882a593Smuzhiyun IMX_SC_ERR_NOTFOUND = 7, /* Not found */
60*4882a593Smuzhiyun IMX_SC_ERR_NOPOWER = 8, /* No power */
61*4882a593Smuzhiyun IMX_SC_ERR_IPC = 9, /* Generic IPC error */
62*4882a593Smuzhiyun IMX_SC_ERR_BUSY = 10, /* Resource is currently busy/active */
63*4882a593Smuzhiyun IMX_SC_ERR_FAIL = 11, /* General I/O failure */
64*4882a593Smuzhiyun IMX_SC_ERR_LAST
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun static int imx_sc_linux_errmap[IMX_SC_ERR_LAST] = {
68*4882a593Smuzhiyun 0, /* IMX_SC_ERR_NONE */
69*4882a593Smuzhiyun -EINVAL, /* IMX_SC_ERR_VERSION */
70*4882a593Smuzhiyun -EINVAL, /* IMX_SC_ERR_CONFIG */
71*4882a593Smuzhiyun -EINVAL, /* IMX_SC_ERR_PARM */
72*4882a593Smuzhiyun -EACCES, /* IMX_SC_ERR_NOACCESS */
73*4882a593Smuzhiyun -EACCES, /* IMX_SC_ERR_LOCKED */
74*4882a593Smuzhiyun -ERANGE, /* IMX_SC_ERR_UNAVAILABLE */
75*4882a593Smuzhiyun -EEXIST, /* IMX_SC_ERR_NOTFOUND */
76*4882a593Smuzhiyun -EPERM, /* IMX_SC_ERR_NOPOWER */
77*4882a593Smuzhiyun -EPIPE, /* IMX_SC_ERR_IPC */
78*4882a593Smuzhiyun -EBUSY, /* IMX_SC_ERR_BUSY */
79*4882a593Smuzhiyun -EIO, /* IMX_SC_ERR_FAIL */
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static struct imx_sc_ipc *imx_sc_ipc_handle;
83*4882a593Smuzhiyun
imx_sc_to_linux_errno(int errno)84*4882a593Smuzhiyun static inline int imx_sc_to_linux_errno(int errno)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun if (errno >= IMX_SC_ERR_NONE && errno < IMX_SC_ERR_LAST)
87*4882a593Smuzhiyun return imx_sc_linux_errmap[errno];
88*4882a593Smuzhiyun return -EIO;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /*
92*4882a593Smuzhiyun * Get the default handle used by SCU
93*4882a593Smuzhiyun */
imx_scu_get_handle(struct imx_sc_ipc ** ipc)94*4882a593Smuzhiyun int imx_scu_get_handle(struct imx_sc_ipc **ipc)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun if (!imx_sc_ipc_handle)
97*4882a593Smuzhiyun return -EPROBE_DEFER;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun *ipc = imx_sc_ipc_handle;
100*4882a593Smuzhiyun return 0;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun EXPORT_SYMBOL(imx_scu_get_handle);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* Callback called when the word of a message is ack-ed, eg read by SCU */
imx_scu_tx_done(struct mbox_client * cl,void * mssg,int r)105*4882a593Smuzhiyun static void imx_scu_tx_done(struct mbox_client *cl, void *mssg, int r)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun struct imx_sc_chan *sc_chan = container_of(cl, struct imx_sc_chan, cl);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun complete(&sc_chan->tx_done);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
imx_scu_rx_callback(struct mbox_client * c,void * msg)112*4882a593Smuzhiyun static void imx_scu_rx_callback(struct mbox_client *c, void *msg)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun struct imx_sc_chan *sc_chan = container_of(c, struct imx_sc_chan, cl);
115*4882a593Smuzhiyun struct imx_sc_ipc *sc_ipc = sc_chan->sc_ipc;
116*4882a593Smuzhiyun struct imx_sc_rpc_msg *hdr;
117*4882a593Smuzhiyun u32 *data = msg;
118*4882a593Smuzhiyun int i;
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun if (!sc_ipc->msg) {
121*4882a593Smuzhiyun dev_warn(sc_ipc->dev, "unexpected rx idx %d 0x%08x, ignore!\n",
122*4882a593Smuzhiyun sc_chan->idx, *data);
123*4882a593Smuzhiyun return;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (sc_ipc->fast_ipc) {
127*4882a593Smuzhiyun hdr = msg;
128*4882a593Smuzhiyun sc_ipc->rx_size = hdr->size;
129*4882a593Smuzhiyun sc_ipc->msg[0] = *data++;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun for (i = 1; i < sc_ipc->rx_size; i++)
132*4882a593Smuzhiyun sc_ipc->msg[i] = *data++;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun complete(&sc_ipc->done);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun return;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun if (sc_chan->idx == 0) {
140*4882a593Smuzhiyun hdr = msg;
141*4882a593Smuzhiyun sc_ipc->rx_size = hdr->size;
142*4882a593Smuzhiyun dev_dbg(sc_ipc->dev, "msg rx size %u\n", sc_ipc->rx_size);
143*4882a593Smuzhiyun if (sc_ipc->rx_size > 4)
144*4882a593Smuzhiyun dev_warn(sc_ipc->dev, "RPC does not support receiving over 4 words: %u\n",
145*4882a593Smuzhiyun sc_ipc->rx_size);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun sc_ipc->msg[sc_chan->idx] = *data;
149*4882a593Smuzhiyun sc_ipc->count++;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun dev_dbg(sc_ipc->dev, "mu %u msg %u 0x%x\n", sc_chan->idx,
152*4882a593Smuzhiyun sc_ipc->count, *data);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun if ((sc_ipc->rx_size != 0) && (sc_ipc->count == sc_ipc->rx_size))
155*4882a593Smuzhiyun complete(&sc_ipc->done);
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
imx_scu_ipc_write(struct imx_sc_ipc * sc_ipc,void * msg)158*4882a593Smuzhiyun static int imx_scu_ipc_write(struct imx_sc_ipc *sc_ipc, void *msg)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun struct imx_sc_rpc_msg hdr = *(struct imx_sc_rpc_msg *)msg;
161*4882a593Smuzhiyun struct imx_sc_chan *sc_chan;
162*4882a593Smuzhiyun u32 *data = msg;
163*4882a593Smuzhiyun int ret;
164*4882a593Smuzhiyun int size;
165*4882a593Smuzhiyun int i;
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* Check size */
168*4882a593Smuzhiyun if (hdr.size > IMX_SC_RPC_MAX_MSG)
169*4882a593Smuzhiyun return -EINVAL;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun dev_dbg(sc_ipc->dev, "RPC SVC %u FUNC %u SIZE %u\n", hdr.svc,
172*4882a593Smuzhiyun hdr.func, hdr.size);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun size = sc_ipc->fast_ipc ? 1 : hdr.size;
175*4882a593Smuzhiyun for (i = 0; i < size; i++) {
176*4882a593Smuzhiyun sc_chan = &sc_ipc->chans[i % 4];
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun /*
179*4882a593Smuzhiyun * SCU requires that all messages words are written
180*4882a593Smuzhiyun * sequentially but linux MU driver implements multiple
181*4882a593Smuzhiyun * independent channels for each register so ordering between
182*4882a593Smuzhiyun * different channels must be ensured by SCU API interface.
183*4882a593Smuzhiyun *
184*4882a593Smuzhiyun * Wait for tx_done before every send to ensure that no
185*4882a593Smuzhiyun * queueing happens at the mailbox channel level.
186*4882a593Smuzhiyun */
187*4882a593Smuzhiyun if (!sc_ipc->fast_ipc) {
188*4882a593Smuzhiyun wait_for_completion(&sc_chan->tx_done);
189*4882a593Smuzhiyun reinit_completion(&sc_chan->tx_done);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun ret = mbox_send_message(sc_chan->ch, &data[i]);
193*4882a593Smuzhiyun if (ret < 0)
194*4882a593Smuzhiyun return ret;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun return 0;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun /*
201*4882a593Smuzhiyun * RPC command/response
202*4882a593Smuzhiyun */
imx_scu_call_rpc(struct imx_sc_ipc * sc_ipc,void * msg,bool have_resp)203*4882a593Smuzhiyun int imx_scu_call_rpc(struct imx_sc_ipc *sc_ipc, void *msg, bool have_resp)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun uint8_t saved_svc, saved_func;
206*4882a593Smuzhiyun struct imx_sc_rpc_msg *hdr;
207*4882a593Smuzhiyun int ret;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun if (WARN_ON(!sc_ipc || !msg))
210*4882a593Smuzhiyun return -EINVAL;
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun mutex_lock(&sc_ipc->lock);
213*4882a593Smuzhiyun reinit_completion(&sc_ipc->done);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun if (have_resp) {
216*4882a593Smuzhiyun sc_ipc->msg = msg;
217*4882a593Smuzhiyun saved_svc = ((struct imx_sc_rpc_msg *)msg)->svc;
218*4882a593Smuzhiyun saved_func = ((struct imx_sc_rpc_msg *)msg)->func;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun sc_ipc->count = 0;
221*4882a593Smuzhiyun ret = imx_scu_ipc_write(sc_ipc, msg);
222*4882a593Smuzhiyun if (ret < 0) {
223*4882a593Smuzhiyun dev_err(sc_ipc->dev, "RPC send msg failed: %d\n", ret);
224*4882a593Smuzhiyun goto out;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun if (have_resp) {
228*4882a593Smuzhiyun if (!wait_for_completion_timeout(&sc_ipc->done,
229*4882a593Smuzhiyun MAX_RX_TIMEOUT)) {
230*4882a593Smuzhiyun dev_err(sc_ipc->dev, "RPC send msg timeout\n");
231*4882a593Smuzhiyun mutex_unlock(&sc_ipc->lock);
232*4882a593Smuzhiyun return -ETIMEDOUT;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* response status is stored in hdr->func field */
236*4882a593Smuzhiyun hdr = msg;
237*4882a593Smuzhiyun ret = hdr->func;
238*4882a593Smuzhiyun /*
239*4882a593Smuzhiyun * Some special SCU firmware APIs do NOT have return value
240*4882a593Smuzhiyun * in hdr->func, but they do have response data, those special
241*4882a593Smuzhiyun * APIs are defined as void function in SCU firmware, so they
242*4882a593Smuzhiyun * should be treated as return success always.
243*4882a593Smuzhiyun */
244*4882a593Smuzhiyun if ((saved_svc == IMX_SC_RPC_SVC_MISC) &&
245*4882a593Smuzhiyun (saved_func == IMX_SC_MISC_FUNC_UNIQUE_ID ||
246*4882a593Smuzhiyun saved_func == IMX_SC_MISC_FUNC_GET_BUTTON_STATUS))
247*4882a593Smuzhiyun ret = 0;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun out:
251*4882a593Smuzhiyun sc_ipc->msg = NULL;
252*4882a593Smuzhiyun mutex_unlock(&sc_ipc->lock);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun dev_dbg(sc_ipc->dev, "RPC SVC done\n");
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun return imx_sc_to_linux_errno(ret);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun EXPORT_SYMBOL(imx_scu_call_rpc);
259*4882a593Smuzhiyun
imx_scu_probe(struct platform_device * pdev)260*4882a593Smuzhiyun static int imx_scu_probe(struct platform_device *pdev)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun struct device *dev = &pdev->dev;
263*4882a593Smuzhiyun struct imx_sc_ipc *sc_ipc;
264*4882a593Smuzhiyun struct imx_sc_chan *sc_chan;
265*4882a593Smuzhiyun struct mbox_client *cl;
266*4882a593Smuzhiyun char *chan_name;
267*4882a593Smuzhiyun struct of_phandle_args args;
268*4882a593Smuzhiyun int num_channel;
269*4882a593Smuzhiyun int ret;
270*4882a593Smuzhiyun int i;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun sc_ipc = devm_kzalloc(dev, sizeof(*sc_ipc), GFP_KERNEL);
273*4882a593Smuzhiyun if (!sc_ipc)
274*4882a593Smuzhiyun return -ENOMEM;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun ret = of_parse_phandle_with_args(pdev->dev.of_node, "mboxes",
277*4882a593Smuzhiyun "#mbox-cells", 0, &args);
278*4882a593Smuzhiyun if (ret)
279*4882a593Smuzhiyun return ret;
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun sc_ipc->fast_ipc = of_device_is_compatible(args.np, "fsl,imx8-mu-scu");
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun num_channel = sc_ipc->fast_ipc ? 2 : SCU_MU_CHAN_NUM;
284*4882a593Smuzhiyun for (i = 0; i < num_channel; i++) {
285*4882a593Smuzhiyun if (i < num_channel / 2)
286*4882a593Smuzhiyun chan_name = kasprintf(GFP_KERNEL, "tx%d", i);
287*4882a593Smuzhiyun else
288*4882a593Smuzhiyun chan_name = kasprintf(GFP_KERNEL, "rx%d",
289*4882a593Smuzhiyun i - num_channel / 2);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (!chan_name)
292*4882a593Smuzhiyun return -ENOMEM;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun sc_chan = &sc_ipc->chans[i];
295*4882a593Smuzhiyun cl = &sc_chan->cl;
296*4882a593Smuzhiyun cl->dev = dev;
297*4882a593Smuzhiyun cl->tx_block = false;
298*4882a593Smuzhiyun cl->knows_txdone = true;
299*4882a593Smuzhiyun cl->rx_callback = imx_scu_rx_callback;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun if (!sc_ipc->fast_ipc) {
302*4882a593Smuzhiyun /* Initial tx_done completion as "done" */
303*4882a593Smuzhiyun cl->tx_done = imx_scu_tx_done;
304*4882a593Smuzhiyun init_completion(&sc_chan->tx_done);
305*4882a593Smuzhiyun complete(&sc_chan->tx_done);
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun sc_chan->sc_ipc = sc_ipc;
309*4882a593Smuzhiyun sc_chan->idx = i % (num_channel / 2);
310*4882a593Smuzhiyun sc_chan->ch = mbox_request_channel_byname(cl, chan_name);
311*4882a593Smuzhiyun if (IS_ERR(sc_chan->ch)) {
312*4882a593Smuzhiyun ret = PTR_ERR(sc_chan->ch);
313*4882a593Smuzhiyun if (ret != -EPROBE_DEFER)
314*4882a593Smuzhiyun dev_err(dev, "Failed to request mbox chan %s ret %d\n",
315*4882a593Smuzhiyun chan_name, ret);
316*4882a593Smuzhiyun kfree(chan_name);
317*4882a593Smuzhiyun return ret;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun dev_dbg(dev, "request mbox chan %s\n", chan_name);
321*4882a593Smuzhiyun /* chan_name is not used anymore by framework */
322*4882a593Smuzhiyun kfree(chan_name);
323*4882a593Smuzhiyun }
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun sc_ipc->dev = dev;
326*4882a593Smuzhiyun mutex_init(&sc_ipc->lock);
327*4882a593Smuzhiyun init_completion(&sc_ipc->done);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun imx_sc_ipc_handle = sc_ipc;
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun ret = imx_scu_soc_init(dev);
332*4882a593Smuzhiyun if (ret)
333*4882a593Smuzhiyun dev_warn(dev, "failed to initialize SoC info: %d\n", ret);
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun ret = imx_scu_enable_general_irq_channel(dev);
336*4882a593Smuzhiyun if (ret)
337*4882a593Smuzhiyun dev_warn(dev,
338*4882a593Smuzhiyun "failed to enable general irq channel: %d\n", ret);
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun dev_info(dev, "NXP i.MX SCU Initialized\n");
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun return devm_of_platform_populate(dev);
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun static const struct of_device_id imx_scu_match[] = {
346*4882a593Smuzhiyun { .compatible = "fsl,imx-scu", },
347*4882a593Smuzhiyun { /* Sentinel */ }
348*4882a593Smuzhiyun };
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun static struct platform_driver imx_scu_driver = {
351*4882a593Smuzhiyun .driver = {
352*4882a593Smuzhiyun .name = "imx-scu",
353*4882a593Smuzhiyun .of_match_table = imx_scu_match,
354*4882a593Smuzhiyun },
355*4882a593Smuzhiyun .probe = imx_scu_probe,
356*4882a593Smuzhiyun };
357*4882a593Smuzhiyun builtin_platform_driver(imx_scu_driver);
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun MODULE_AUTHOR("Dong Aisheng <aisheng.dong@nxp.com>");
360*4882a593Smuzhiyun MODULE_DESCRIPTION("IMX SCU firmware protocol driver");
361*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
362