1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2019 NXP
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Implementation of the SCU IRQ functions using MU.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <dt-bindings/firmware/imx/rsrc.h>
10*4882a593Smuzhiyun #include <linux/firmware/imx/ipc.h>
11*4882a593Smuzhiyun #include <linux/firmware/imx/sci.h>
12*4882a593Smuzhiyun #include <linux/mailbox_client.h>
13*4882a593Smuzhiyun #include <linux/suspend.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define IMX_SC_IRQ_FUNC_ENABLE 1
16*4882a593Smuzhiyun #define IMX_SC_IRQ_FUNC_STATUS 2
17*4882a593Smuzhiyun #define IMX_SC_IRQ_NUM_GROUP 4
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static u32 mu_resource_id;
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun struct imx_sc_msg_irq_get_status {
22*4882a593Smuzhiyun struct imx_sc_rpc_msg hdr;
23*4882a593Smuzhiyun union {
24*4882a593Smuzhiyun struct {
25*4882a593Smuzhiyun u16 resource;
26*4882a593Smuzhiyun u8 group;
27*4882a593Smuzhiyun u8 reserved;
28*4882a593Smuzhiyun } __packed req;
29*4882a593Smuzhiyun struct {
30*4882a593Smuzhiyun u32 status;
31*4882a593Smuzhiyun } resp;
32*4882a593Smuzhiyun } data;
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct imx_sc_msg_irq_enable {
36*4882a593Smuzhiyun struct imx_sc_rpc_msg hdr;
37*4882a593Smuzhiyun u32 mask;
38*4882a593Smuzhiyun u16 resource;
39*4882a593Smuzhiyun u8 group;
40*4882a593Smuzhiyun u8 enable;
41*4882a593Smuzhiyun } __packed;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static struct imx_sc_ipc *imx_sc_irq_ipc_handle;
44*4882a593Smuzhiyun static struct work_struct imx_sc_irq_work;
45*4882a593Smuzhiyun static ATOMIC_NOTIFIER_HEAD(imx_scu_irq_notifier_chain);
46*4882a593Smuzhiyun
imx_scu_irq_register_notifier(struct notifier_block * nb)47*4882a593Smuzhiyun int imx_scu_irq_register_notifier(struct notifier_block *nb)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun return atomic_notifier_chain_register(
50*4882a593Smuzhiyun &imx_scu_irq_notifier_chain, nb);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun EXPORT_SYMBOL(imx_scu_irq_register_notifier);
53*4882a593Smuzhiyun
imx_scu_irq_unregister_notifier(struct notifier_block * nb)54*4882a593Smuzhiyun int imx_scu_irq_unregister_notifier(struct notifier_block *nb)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun return atomic_notifier_chain_unregister(
57*4882a593Smuzhiyun &imx_scu_irq_notifier_chain, nb);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun EXPORT_SYMBOL(imx_scu_irq_unregister_notifier);
60*4882a593Smuzhiyun
imx_scu_irq_notifier_call_chain(unsigned long status,u8 * group)61*4882a593Smuzhiyun static int imx_scu_irq_notifier_call_chain(unsigned long status, u8 *group)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun return atomic_notifier_call_chain(&imx_scu_irq_notifier_chain,
64*4882a593Smuzhiyun status, (void *)group);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
imx_scu_irq_work_handler(struct work_struct * work)67*4882a593Smuzhiyun static void imx_scu_irq_work_handler(struct work_struct *work)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun struct imx_sc_msg_irq_get_status msg;
70*4882a593Smuzhiyun struct imx_sc_rpc_msg *hdr = &msg.hdr;
71*4882a593Smuzhiyun u32 irq_status;
72*4882a593Smuzhiyun int ret;
73*4882a593Smuzhiyun u8 i;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun for (i = 0; i < IMX_SC_IRQ_NUM_GROUP; i++) {
76*4882a593Smuzhiyun hdr->ver = IMX_SC_RPC_VERSION;
77*4882a593Smuzhiyun hdr->svc = IMX_SC_RPC_SVC_IRQ;
78*4882a593Smuzhiyun hdr->func = IMX_SC_IRQ_FUNC_STATUS;
79*4882a593Smuzhiyun hdr->size = 2;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun msg.data.req.resource = mu_resource_id;
82*4882a593Smuzhiyun msg.data.req.group = i;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun ret = imx_scu_call_rpc(imx_sc_irq_ipc_handle, &msg, true);
85*4882a593Smuzhiyun if (ret) {
86*4882a593Smuzhiyun pr_err("get irq group %d status failed, ret %d\n",
87*4882a593Smuzhiyun i, ret);
88*4882a593Smuzhiyun return;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun irq_status = msg.data.resp.status;
92*4882a593Smuzhiyun if (!irq_status)
93*4882a593Smuzhiyun continue;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun pm_system_wakeup();
96*4882a593Smuzhiyun imx_scu_irq_notifier_call_chain(irq_status, &i);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
imx_scu_irq_group_enable(u8 group,u32 mask,u8 enable)100*4882a593Smuzhiyun int imx_scu_irq_group_enable(u8 group, u32 mask, u8 enable)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct imx_sc_msg_irq_enable msg;
103*4882a593Smuzhiyun struct imx_sc_rpc_msg *hdr = &msg.hdr;
104*4882a593Smuzhiyun int ret;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun if (!imx_sc_irq_ipc_handle)
107*4882a593Smuzhiyun return -EPROBE_DEFER;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun hdr->ver = IMX_SC_RPC_VERSION;
110*4882a593Smuzhiyun hdr->svc = IMX_SC_RPC_SVC_IRQ;
111*4882a593Smuzhiyun hdr->func = IMX_SC_IRQ_FUNC_ENABLE;
112*4882a593Smuzhiyun hdr->size = 3;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun msg.resource = mu_resource_id;
115*4882a593Smuzhiyun msg.group = group;
116*4882a593Smuzhiyun msg.mask = mask;
117*4882a593Smuzhiyun msg.enable = enable;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun ret = imx_scu_call_rpc(imx_sc_irq_ipc_handle, &msg, true);
120*4882a593Smuzhiyun if (ret)
121*4882a593Smuzhiyun pr_err("enable irq failed, group %d, mask %d, ret %d\n",
122*4882a593Smuzhiyun group, mask, ret);
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun return ret;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun EXPORT_SYMBOL(imx_scu_irq_group_enable);
127*4882a593Smuzhiyun
imx_scu_irq_callback(struct mbox_client * c,void * msg)128*4882a593Smuzhiyun static void imx_scu_irq_callback(struct mbox_client *c, void *msg)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun schedule_work(&imx_sc_irq_work);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
imx_scu_enable_general_irq_channel(struct device * dev)133*4882a593Smuzhiyun int imx_scu_enable_general_irq_channel(struct device *dev)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct of_phandle_args spec;
136*4882a593Smuzhiyun struct mbox_client *cl;
137*4882a593Smuzhiyun struct mbox_chan *ch;
138*4882a593Smuzhiyun int ret = 0, i = 0;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun ret = imx_scu_get_handle(&imx_sc_irq_ipc_handle);
141*4882a593Smuzhiyun if (ret)
142*4882a593Smuzhiyun return ret;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun cl = devm_kzalloc(dev, sizeof(*cl), GFP_KERNEL);
145*4882a593Smuzhiyun if (!cl)
146*4882a593Smuzhiyun return -ENOMEM;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun cl->dev = dev;
149*4882a593Smuzhiyun cl->rx_callback = imx_scu_irq_callback;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /* SCU general IRQ uses general interrupt channel 3 */
152*4882a593Smuzhiyun ch = mbox_request_channel_byname(cl, "gip3");
153*4882a593Smuzhiyun if (IS_ERR(ch)) {
154*4882a593Smuzhiyun ret = PTR_ERR(ch);
155*4882a593Smuzhiyun dev_err(dev, "failed to request mbox chan gip3, ret %d\n", ret);
156*4882a593Smuzhiyun devm_kfree(dev, cl);
157*4882a593Smuzhiyun return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun INIT_WORK(&imx_sc_irq_work, imx_scu_irq_work_handler);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (!of_parse_phandle_with_args(dev->of_node, "mboxes",
163*4882a593Smuzhiyun "#mbox-cells", 0, &spec))
164*4882a593Smuzhiyun i = of_alias_get_id(spec.np, "mu");
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /* use mu1 as general mu irq channel if failed */
167*4882a593Smuzhiyun if (i < 0)
168*4882a593Smuzhiyun i = 1;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun mu_resource_id = IMX_SC_R_MU_0A + i;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun return ret;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun EXPORT_SYMBOL(imx_scu_enable_general_irq_channel);
175