1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * PCI-related functions used by the EFI stub on multiple
4*4882a593Smuzhiyun * architectures.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright 2019 Google, LLC
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/efi.h>
10*4882a593Smuzhiyun #include <linux/pci.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <asm/efi.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "efistub.h"
15*4882a593Smuzhiyun
efi_pci_disable_bridge_busmaster(void)16*4882a593Smuzhiyun void efi_pci_disable_bridge_busmaster(void)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun efi_guid_t pci_proto = EFI_PCI_IO_PROTOCOL_GUID;
19*4882a593Smuzhiyun unsigned long pci_handle_size = 0;
20*4882a593Smuzhiyun efi_handle_t *pci_handle = NULL;
21*4882a593Smuzhiyun efi_handle_t handle;
22*4882a593Smuzhiyun efi_status_t status;
23*4882a593Smuzhiyun u16 class, command;
24*4882a593Smuzhiyun int i;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL, &pci_proto,
27*4882a593Smuzhiyun NULL, &pci_handle_size, NULL);
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun if (status != EFI_BUFFER_TOO_SMALL) {
30*4882a593Smuzhiyun if (status != EFI_SUCCESS && status != EFI_NOT_FOUND)
31*4882a593Smuzhiyun efi_err("Failed to locate PCI I/O handles'\n");
32*4882a593Smuzhiyun return;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, pci_handle_size,
36*4882a593Smuzhiyun (void **)&pci_handle);
37*4882a593Smuzhiyun if (status != EFI_SUCCESS) {
38*4882a593Smuzhiyun efi_err("Failed to allocate memory for 'pci_handle'\n");
39*4882a593Smuzhiyun return;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun status = efi_bs_call(locate_handle, EFI_LOCATE_BY_PROTOCOL, &pci_proto,
43*4882a593Smuzhiyun NULL, &pci_handle_size, pci_handle);
44*4882a593Smuzhiyun if (status != EFI_SUCCESS) {
45*4882a593Smuzhiyun efi_err("Failed to locate PCI I/O handles'\n");
46*4882a593Smuzhiyun goto free_handle;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun for_each_efi_handle(handle, pci_handle, pci_handle_size, i) {
50*4882a593Smuzhiyun efi_pci_io_protocol_t *pci;
51*4882a593Smuzhiyun unsigned long segment_nr, bus_nr, device_nr, func_nr;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun status = efi_bs_call(handle_protocol, handle, &pci_proto,
54*4882a593Smuzhiyun (void **)&pci);
55*4882a593Smuzhiyun if (status != EFI_SUCCESS)
56*4882a593Smuzhiyun continue;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /*
59*4882a593Smuzhiyun * Disregard devices living on bus 0 - these are not behind a
60*4882a593Smuzhiyun * bridge so no point in disconnecting them from their drivers.
61*4882a593Smuzhiyun */
62*4882a593Smuzhiyun status = efi_call_proto(pci, get_location, &segment_nr, &bus_nr,
63*4882a593Smuzhiyun &device_nr, &func_nr);
64*4882a593Smuzhiyun if (status != EFI_SUCCESS || bus_nr == 0)
65*4882a593Smuzhiyun continue;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun * Don't disconnect VGA controllers so we don't risk losing
69*4882a593Smuzhiyun * access to the framebuffer. Drivers for true PCIe graphics
70*4882a593Smuzhiyun * controllers that are behind a PCIe root port do not use
71*4882a593Smuzhiyun * DMA to implement the GOP framebuffer anyway [although they
72*4882a593Smuzhiyun * may use it in their implementation of Gop->Blt()], and so
73*4882a593Smuzhiyun * disabling DMA in the PCI bridge should not interfere with
74*4882a593Smuzhiyun * normal operation of the device.
75*4882a593Smuzhiyun */
76*4882a593Smuzhiyun status = efi_call_proto(pci, pci.read, EfiPciIoWidthUint16,
77*4882a593Smuzhiyun PCI_CLASS_DEVICE, 1, &class);
78*4882a593Smuzhiyun if (status != EFI_SUCCESS || class == PCI_CLASS_DISPLAY_VGA)
79*4882a593Smuzhiyun continue;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* Disconnect this handle from all its drivers */
82*4882a593Smuzhiyun efi_bs_call(disconnect_controller, handle, NULL, NULL);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun for_each_efi_handle(handle, pci_handle, pci_handle_size, i) {
86*4882a593Smuzhiyun efi_pci_io_protocol_t *pci;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun status = efi_bs_call(handle_protocol, handle, &pci_proto,
89*4882a593Smuzhiyun (void **)&pci);
90*4882a593Smuzhiyun if (status != EFI_SUCCESS || !pci)
91*4882a593Smuzhiyun continue;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun status = efi_call_proto(pci, pci.read, EfiPciIoWidthUint16,
94*4882a593Smuzhiyun PCI_CLASS_DEVICE, 1, &class);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (status != EFI_SUCCESS || class != PCI_CLASS_BRIDGE_PCI)
97*4882a593Smuzhiyun continue;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* Disable busmastering */
100*4882a593Smuzhiyun status = efi_call_proto(pci, pci.read, EfiPciIoWidthUint16,
101*4882a593Smuzhiyun PCI_COMMAND, 1, &command);
102*4882a593Smuzhiyun if (status != EFI_SUCCESS || !(command & PCI_COMMAND_MASTER))
103*4882a593Smuzhiyun continue;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun command &= ~PCI_COMMAND_MASTER;
106*4882a593Smuzhiyun status = efi_call_proto(pci, pci.write, EfiPciIoWidthUint16,
107*4882a593Smuzhiyun PCI_COMMAND, 1, &command);
108*4882a593Smuzhiyun if (status != EFI_SUCCESS)
109*4882a593Smuzhiyun efi_err("Failed to disable PCI busmastering\n");
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun free_handle:
113*4882a593Smuzhiyun efi_bs_call(free_pool, pci_handle);
114*4882a593Smuzhiyun }
115