1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * UEFI Common Platform Error Record (CPER) support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2017, The Linux Foundation. All rights reserved.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/time.h>
11*4882a593Smuzhiyun #include <linux/cper.h>
12*4882a593Smuzhiyun #include <linux/dmi.h>
13*4882a593Smuzhiyun #include <linux/acpi.h>
14*4882a593Smuzhiyun #include <linux/pci.h>
15*4882a593Smuzhiyun #include <linux/aer.h>
16*4882a593Smuzhiyun #include <linux/printk.h>
17*4882a593Smuzhiyun #include <linux/bcd.h>
18*4882a593Smuzhiyun #include <acpi/ghes.h>
19*4882a593Smuzhiyun #include <ras/ras_event.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun static const char * const arm_reg_ctx_strs[] = {
22*4882a593Smuzhiyun "AArch32 general purpose registers",
23*4882a593Smuzhiyun "AArch32 EL1 context registers",
24*4882a593Smuzhiyun "AArch32 EL2 context registers",
25*4882a593Smuzhiyun "AArch32 secure context registers",
26*4882a593Smuzhiyun "AArch64 general purpose registers",
27*4882a593Smuzhiyun "AArch64 EL1 context registers",
28*4882a593Smuzhiyun "AArch64 EL2 context registers",
29*4882a593Smuzhiyun "AArch64 EL3 context registers",
30*4882a593Smuzhiyun "Misc. system register structure",
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static const char * const arm_err_trans_type_strs[] = {
34*4882a593Smuzhiyun "Instruction",
35*4882a593Smuzhiyun "Data Access",
36*4882a593Smuzhiyun "Generic",
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static const char * const arm_bus_err_op_strs[] = {
40*4882a593Smuzhiyun "Generic error (type cannot be determined)",
41*4882a593Smuzhiyun "Generic read (type of instruction or data request cannot be determined)",
42*4882a593Smuzhiyun "Generic write (type of instruction of data request cannot be determined)",
43*4882a593Smuzhiyun "Data read",
44*4882a593Smuzhiyun "Data write",
45*4882a593Smuzhiyun "Instruction fetch",
46*4882a593Smuzhiyun "Prefetch",
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun static const char * const arm_cache_err_op_strs[] = {
50*4882a593Smuzhiyun "Generic error (type cannot be determined)",
51*4882a593Smuzhiyun "Generic read (type of instruction or data request cannot be determined)",
52*4882a593Smuzhiyun "Generic write (type of instruction of data request cannot be determined)",
53*4882a593Smuzhiyun "Data read",
54*4882a593Smuzhiyun "Data write",
55*4882a593Smuzhiyun "Instruction fetch",
56*4882a593Smuzhiyun "Prefetch",
57*4882a593Smuzhiyun "Eviction",
58*4882a593Smuzhiyun "Snooping (processor initiated a cache snoop that resulted in an error)",
59*4882a593Smuzhiyun "Snooped (processor raised a cache error caused by another processor or device snooping its cache)",
60*4882a593Smuzhiyun "Management",
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static const char * const arm_tlb_err_op_strs[] = {
64*4882a593Smuzhiyun "Generic error (type cannot be determined)",
65*4882a593Smuzhiyun "Generic read (type of instruction or data request cannot be determined)",
66*4882a593Smuzhiyun "Generic write (type of instruction of data request cannot be determined)",
67*4882a593Smuzhiyun "Data read",
68*4882a593Smuzhiyun "Data write",
69*4882a593Smuzhiyun "Instruction fetch",
70*4882a593Smuzhiyun "Prefetch",
71*4882a593Smuzhiyun "Local management operation (processor initiated a TLB management operation that resulted in an error)",
72*4882a593Smuzhiyun "External management operation (processor raised a TLB error caused by another processor or device broadcasting TLB operations)",
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static const char * const arm_bus_err_part_type_strs[] = {
76*4882a593Smuzhiyun "Local processor originated request",
77*4882a593Smuzhiyun "Local processor responded to request",
78*4882a593Smuzhiyun "Local processor observed",
79*4882a593Smuzhiyun "Generic",
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun static const char * const arm_bus_err_addr_space_strs[] = {
83*4882a593Smuzhiyun "External Memory Access",
84*4882a593Smuzhiyun "Internal Memory Access",
85*4882a593Smuzhiyun "Unknown",
86*4882a593Smuzhiyun "Device Memory Access",
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun
cper_print_arm_err_info(const char * pfx,u32 type,u64 error_info)89*4882a593Smuzhiyun static void cper_print_arm_err_info(const char *pfx, u32 type,
90*4882a593Smuzhiyun u64 error_info)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun u8 trans_type, op_type, level, participation_type, address_space;
93*4882a593Smuzhiyun u16 mem_attributes;
94*4882a593Smuzhiyun bool proc_context_corrupt, corrected, precise_pc, restartable_pc;
95*4882a593Smuzhiyun bool time_out, access_mode;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* If the type is unknown, bail. */
98*4882a593Smuzhiyun if (type > CPER_ARM_MAX_TYPE)
99*4882a593Smuzhiyun return;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /*
102*4882a593Smuzhiyun * Vendor type errors have error information values that are vendor
103*4882a593Smuzhiyun * specific.
104*4882a593Smuzhiyun */
105*4882a593Smuzhiyun if (type == CPER_ARM_VENDOR_ERROR)
106*4882a593Smuzhiyun return;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_TRANSACTION_TYPE) {
109*4882a593Smuzhiyun trans_type = ((error_info >> CPER_ARM_ERR_TRANSACTION_SHIFT)
110*4882a593Smuzhiyun & CPER_ARM_ERR_TRANSACTION_MASK);
111*4882a593Smuzhiyun if (trans_type < ARRAY_SIZE(arm_err_trans_type_strs)) {
112*4882a593Smuzhiyun printk("%stransaction type: %s\n", pfx,
113*4882a593Smuzhiyun arm_err_trans_type_strs[trans_type]);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_OPERATION_TYPE) {
118*4882a593Smuzhiyun op_type = ((error_info >> CPER_ARM_ERR_OPERATION_SHIFT)
119*4882a593Smuzhiyun & CPER_ARM_ERR_OPERATION_MASK);
120*4882a593Smuzhiyun switch (type) {
121*4882a593Smuzhiyun case CPER_ARM_CACHE_ERROR:
122*4882a593Smuzhiyun if (op_type < ARRAY_SIZE(arm_cache_err_op_strs)) {
123*4882a593Smuzhiyun printk("%soperation type: %s\n", pfx,
124*4882a593Smuzhiyun arm_cache_err_op_strs[op_type]);
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun break;
127*4882a593Smuzhiyun case CPER_ARM_TLB_ERROR:
128*4882a593Smuzhiyun if (op_type < ARRAY_SIZE(arm_tlb_err_op_strs)) {
129*4882a593Smuzhiyun printk("%soperation type: %s\n", pfx,
130*4882a593Smuzhiyun arm_tlb_err_op_strs[op_type]);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun break;
133*4882a593Smuzhiyun case CPER_ARM_BUS_ERROR:
134*4882a593Smuzhiyun if (op_type < ARRAY_SIZE(arm_bus_err_op_strs)) {
135*4882a593Smuzhiyun printk("%soperation type: %s\n", pfx,
136*4882a593Smuzhiyun arm_bus_err_op_strs[op_type]);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun break;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_LEVEL) {
143*4882a593Smuzhiyun level = ((error_info >> CPER_ARM_ERR_LEVEL_SHIFT)
144*4882a593Smuzhiyun & CPER_ARM_ERR_LEVEL_MASK);
145*4882a593Smuzhiyun switch (type) {
146*4882a593Smuzhiyun case CPER_ARM_CACHE_ERROR:
147*4882a593Smuzhiyun printk("%scache level: %d\n", pfx, level);
148*4882a593Smuzhiyun break;
149*4882a593Smuzhiyun case CPER_ARM_TLB_ERROR:
150*4882a593Smuzhiyun printk("%sTLB level: %d\n", pfx, level);
151*4882a593Smuzhiyun break;
152*4882a593Smuzhiyun case CPER_ARM_BUS_ERROR:
153*4882a593Smuzhiyun printk("%saffinity level at which the bus error occurred: %d\n",
154*4882a593Smuzhiyun pfx, level);
155*4882a593Smuzhiyun break;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_PROC_CONTEXT_CORRUPT) {
160*4882a593Smuzhiyun proc_context_corrupt = ((error_info >> CPER_ARM_ERR_PC_CORRUPT_SHIFT)
161*4882a593Smuzhiyun & CPER_ARM_ERR_PC_CORRUPT_MASK);
162*4882a593Smuzhiyun if (proc_context_corrupt)
163*4882a593Smuzhiyun printk("%sprocessor context corrupted\n", pfx);
164*4882a593Smuzhiyun else
165*4882a593Smuzhiyun printk("%sprocessor context not corrupted\n", pfx);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_CORRECTED) {
169*4882a593Smuzhiyun corrected = ((error_info >> CPER_ARM_ERR_CORRECTED_SHIFT)
170*4882a593Smuzhiyun & CPER_ARM_ERR_CORRECTED_MASK);
171*4882a593Smuzhiyun if (corrected)
172*4882a593Smuzhiyun printk("%sthe error has been corrected\n", pfx);
173*4882a593Smuzhiyun else
174*4882a593Smuzhiyun printk("%sthe error has not been corrected\n", pfx);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_PRECISE_PC) {
178*4882a593Smuzhiyun precise_pc = ((error_info >> CPER_ARM_ERR_PRECISE_PC_SHIFT)
179*4882a593Smuzhiyun & CPER_ARM_ERR_PRECISE_PC_MASK);
180*4882a593Smuzhiyun if (precise_pc)
181*4882a593Smuzhiyun printk("%sPC is precise\n", pfx);
182*4882a593Smuzhiyun else
183*4882a593Smuzhiyun printk("%sPC is imprecise\n", pfx);
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_RESTARTABLE_PC) {
187*4882a593Smuzhiyun restartable_pc = ((error_info >> CPER_ARM_ERR_RESTARTABLE_PC_SHIFT)
188*4882a593Smuzhiyun & CPER_ARM_ERR_RESTARTABLE_PC_MASK);
189*4882a593Smuzhiyun if (restartable_pc)
190*4882a593Smuzhiyun printk("%sProgram execution can be restarted reliably at the PC associated with the error.\n", pfx);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /* The rest of the fields are specific to bus errors */
194*4882a593Smuzhiyun if (type != CPER_ARM_BUS_ERROR)
195*4882a593Smuzhiyun return;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_PARTICIPATION_TYPE) {
198*4882a593Smuzhiyun participation_type = ((error_info >> CPER_ARM_ERR_PARTICIPATION_TYPE_SHIFT)
199*4882a593Smuzhiyun & CPER_ARM_ERR_PARTICIPATION_TYPE_MASK);
200*4882a593Smuzhiyun if (participation_type < ARRAY_SIZE(arm_bus_err_part_type_strs)) {
201*4882a593Smuzhiyun printk("%sparticipation type: %s\n", pfx,
202*4882a593Smuzhiyun arm_bus_err_part_type_strs[participation_type]);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_TIME_OUT) {
207*4882a593Smuzhiyun time_out = ((error_info >> CPER_ARM_ERR_TIME_OUT_SHIFT)
208*4882a593Smuzhiyun & CPER_ARM_ERR_TIME_OUT_MASK);
209*4882a593Smuzhiyun if (time_out)
210*4882a593Smuzhiyun printk("%srequest timed out\n", pfx);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_ADDRESS_SPACE) {
214*4882a593Smuzhiyun address_space = ((error_info >> CPER_ARM_ERR_ADDRESS_SPACE_SHIFT)
215*4882a593Smuzhiyun & CPER_ARM_ERR_ADDRESS_SPACE_MASK);
216*4882a593Smuzhiyun if (address_space < ARRAY_SIZE(arm_bus_err_addr_space_strs)) {
217*4882a593Smuzhiyun printk("%saddress space: %s\n", pfx,
218*4882a593Smuzhiyun arm_bus_err_addr_space_strs[address_space]);
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_MEM_ATTRIBUTES) {
223*4882a593Smuzhiyun mem_attributes = ((error_info >> CPER_ARM_ERR_MEM_ATTRIBUTES_SHIFT)
224*4882a593Smuzhiyun & CPER_ARM_ERR_MEM_ATTRIBUTES_MASK);
225*4882a593Smuzhiyun printk("%smemory access attributes:0x%x\n", pfx, mem_attributes);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun if (error_info & CPER_ARM_ERR_VALID_ACCESS_MODE) {
229*4882a593Smuzhiyun access_mode = ((error_info >> CPER_ARM_ERR_ACCESS_MODE_SHIFT)
230*4882a593Smuzhiyun & CPER_ARM_ERR_ACCESS_MODE_MASK);
231*4882a593Smuzhiyun if (access_mode)
232*4882a593Smuzhiyun printk("%saccess mode: normal\n", pfx);
233*4882a593Smuzhiyun else
234*4882a593Smuzhiyun printk("%saccess mode: secure\n", pfx);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
cper_print_proc_arm(const char * pfx,const struct cper_sec_proc_arm * proc)238*4882a593Smuzhiyun void cper_print_proc_arm(const char *pfx,
239*4882a593Smuzhiyun const struct cper_sec_proc_arm *proc)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun int i, len, max_ctx_type;
242*4882a593Smuzhiyun struct cper_arm_err_info *err_info;
243*4882a593Smuzhiyun struct cper_arm_ctx_info *ctx_info;
244*4882a593Smuzhiyun char newpfx[64], infopfx[64];
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun printk("%sMIDR: 0x%016llx\n", pfx, proc->midr);
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun len = proc->section_length - (sizeof(*proc) +
249*4882a593Smuzhiyun proc->err_info_num * (sizeof(*err_info)));
250*4882a593Smuzhiyun if (len < 0) {
251*4882a593Smuzhiyun printk("%ssection length: %d\n", pfx, proc->section_length);
252*4882a593Smuzhiyun printk("%ssection length is too small\n", pfx);
253*4882a593Smuzhiyun printk("%sfirmware-generated error record is incorrect\n", pfx);
254*4882a593Smuzhiyun printk("%sERR_INFO_NUM is %d\n", pfx, proc->err_info_num);
255*4882a593Smuzhiyun return;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun if (proc->validation_bits & CPER_ARM_VALID_MPIDR)
259*4882a593Smuzhiyun printk("%sMultiprocessor Affinity Register (MPIDR): 0x%016llx\n",
260*4882a593Smuzhiyun pfx, proc->mpidr);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun if (proc->validation_bits & CPER_ARM_VALID_AFFINITY_LEVEL)
263*4882a593Smuzhiyun printk("%serror affinity level: %d\n", pfx,
264*4882a593Smuzhiyun proc->affinity_level);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (proc->validation_bits & CPER_ARM_VALID_RUNNING_STATE) {
267*4882a593Smuzhiyun printk("%srunning state: 0x%x\n", pfx, proc->running_state);
268*4882a593Smuzhiyun printk("%sPower State Coordination Interface state: %d\n",
269*4882a593Smuzhiyun pfx, proc->psci_state);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun err_info = (struct cper_arm_err_info *)(proc + 1);
275*4882a593Smuzhiyun for (i = 0; i < proc->err_info_num; i++) {
276*4882a593Smuzhiyun printk("%sError info structure %d:\n", pfx, i);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun printk("%snum errors: %d\n", pfx, err_info->multiple_error + 1);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun if (err_info->validation_bits & CPER_ARM_INFO_VALID_FLAGS) {
281*4882a593Smuzhiyun if (err_info->flags & CPER_ARM_INFO_FLAGS_FIRST)
282*4882a593Smuzhiyun printk("%sfirst error captured\n", newpfx);
283*4882a593Smuzhiyun if (err_info->flags & CPER_ARM_INFO_FLAGS_LAST)
284*4882a593Smuzhiyun printk("%slast error captured\n", newpfx);
285*4882a593Smuzhiyun if (err_info->flags & CPER_ARM_INFO_FLAGS_PROPAGATED)
286*4882a593Smuzhiyun printk("%spropagated error captured\n",
287*4882a593Smuzhiyun newpfx);
288*4882a593Smuzhiyun if (err_info->flags & CPER_ARM_INFO_FLAGS_OVERFLOW)
289*4882a593Smuzhiyun printk("%soverflow occurred, error info is incomplete\n",
290*4882a593Smuzhiyun newpfx);
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun printk("%serror_type: %d, %s\n", newpfx, err_info->type,
294*4882a593Smuzhiyun err_info->type < ARRAY_SIZE(cper_proc_error_type_strs) ?
295*4882a593Smuzhiyun cper_proc_error_type_strs[err_info->type] : "unknown");
296*4882a593Smuzhiyun if (err_info->validation_bits & CPER_ARM_INFO_VALID_ERR_INFO) {
297*4882a593Smuzhiyun printk("%serror_info: 0x%016llx\n", newpfx,
298*4882a593Smuzhiyun err_info->error_info);
299*4882a593Smuzhiyun snprintf(infopfx, sizeof(infopfx), "%s ", newpfx);
300*4882a593Smuzhiyun cper_print_arm_err_info(infopfx, err_info->type,
301*4882a593Smuzhiyun err_info->error_info);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun if (err_info->validation_bits & CPER_ARM_INFO_VALID_VIRT_ADDR)
304*4882a593Smuzhiyun printk("%svirtual fault address: 0x%016llx\n",
305*4882a593Smuzhiyun newpfx, err_info->virt_fault_addr);
306*4882a593Smuzhiyun if (err_info->validation_bits & CPER_ARM_INFO_VALID_PHYSICAL_ADDR)
307*4882a593Smuzhiyun printk("%sphysical fault address: 0x%016llx\n",
308*4882a593Smuzhiyun newpfx, err_info->physical_fault_addr);
309*4882a593Smuzhiyun err_info += 1;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun ctx_info = (struct cper_arm_ctx_info *)err_info;
313*4882a593Smuzhiyun max_ctx_type = ARRAY_SIZE(arm_reg_ctx_strs) - 1;
314*4882a593Smuzhiyun for (i = 0; i < proc->context_info_num; i++) {
315*4882a593Smuzhiyun int size = sizeof(*ctx_info) + ctx_info->size;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun printk("%sContext info structure %d:\n", pfx, i);
318*4882a593Smuzhiyun if (len < size) {
319*4882a593Smuzhiyun printk("%ssection length is too small\n", newpfx);
320*4882a593Smuzhiyun printk("%sfirmware-generated error record is incorrect\n", pfx);
321*4882a593Smuzhiyun return;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun if (ctx_info->type > max_ctx_type) {
324*4882a593Smuzhiyun printk("%sInvalid context type: %d (max: %d)\n",
325*4882a593Smuzhiyun newpfx, ctx_info->type, max_ctx_type);
326*4882a593Smuzhiyun return;
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun printk("%sregister context type: %s\n", newpfx,
329*4882a593Smuzhiyun arm_reg_ctx_strs[ctx_info->type]);
330*4882a593Smuzhiyun print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, 4,
331*4882a593Smuzhiyun (ctx_info + 1), ctx_info->size, 0);
332*4882a593Smuzhiyun len -= size;
333*4882a593Smuzhiyun ctx_info = (struct cper_arm_ctx_info *)((long)ctx_info + size);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun if (len > 0) {
337*4882a593Smuzhiyun printk("%sVendor specific error info has %u bytes:\n", pfx,
338*4882a593Smuzhiyun len);
339*4882a593Smuzhiyun print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, 4, ctx_info,
340*4882a593Smuzhiyun len, true);
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun }
343