1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
3*4882a593Smuzhiyun * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
4*4882a593Smuzhiyun * Copyright (C) 2006 Michael Buesch <m@bues.ch>
5*4882a593Smuzhiyun * Copyright (C) 2010 Waldemar Brodkorb <wbx@openadk.org>
6*4882a593Smuzhiyun * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify it
9*4882a593Smuzhiyun * under the terms of the GNU General Public License as published by the
10*4882a593Smuzhiyun * Free Software Foundation; either version 2 of the License, or (at your
11*4882a593Smuzhiyun * option) any later version.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14*4882a593Smuzhiyun * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16*4882a593Smuzhiyun * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17*4882a593Smuzhiyun * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18*4882a593Smuzhiyun * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19*4882a593Smuzhiyun * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20*4882a593Smuzhiyun * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22*4882a593Smuzhiyun * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * You should have received a copy of the GNU General Public License along
25*4882a593Smuzhiyun * with this program; if not, write to the Free Software Foundation, Inc.,
26*4882a593Smuzhiyun * 675 Mass Ave, Cambridge, MA 02139, USA.
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <linux/bcm47xx_nvram.h>
30*4882a593Smuzhiyun #include <linux/bcm47xx_sprom.h>
31*4882a593Smuzhiyun #include <linux/bcma/bcma.h>
32*4882a593Smuzhiyun #include <linux/etherdevice.h>
33*4882a593Smuzhiyun #include <linux/if_ether.h>
34*4882a593Smuzhiyun #include <linux/ssb/ssb.h>
35*4882a593Smuzhiyun
create_key(const char * prefix,const char * postfix,const char * name,char * buf,int len)36*4882a593Smuzhiyun static void create_key(const char *prefix, const char *postfix,
37*4882a593Smuzhiyun const char *name, char *buf, int len)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun if (prefix && postfix)
40*4882a593Smuzhiyun snprintf(buf, len, "%s%s%s", prefix, name, postfix);
41*4882a593Smuzhiyun else if (prefix)
42*4882a593Smuzhiyun snprintf(buf, len, "%s%s", prefix, name);
43*4882a593Smuzhiyun else if (postfix)
44*4882a593Smuzhiyun snprintf(buf, len, "%s%s", name, postfix);
45*4882a593Smuzhiyun else
46*4882a593Smuzhiyun snprintf(buf, len, "%s", name);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
get_nvram_var(const char * prefix,const char * postfix,const char * name,char * buf,int len,bool fallback)49*4882a593Smuzhiyun static int get_nvram_var(const char *prefix, const char *postfix,
50*4882a593Smuzhiyun const char *name, char *buf, int len, bool fallback)
51*4882a593Smuzhiyun {
52*4882a593Smuzhiyun char key[40];
53*4882a593Smuzhiyun int err;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun create_key(prefix, postfix, name, key, sizeof(key));
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun err = bcm47xx_nvram_getenv(key, buf, len);
58*4882a593Smuzhiyun if (fallback && err == -ENOENT && prefix) {
59*4882a593Smuzhiyun create_key(NULL, postfix, name, key, sizeof(key));
60*4882a593Smuzhiyun err = bcm47xx_nvram_getenv(key, buf, len);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun return err;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #define NVRAM_READ_VAL(type) \
66*4882a593Smuzhiyun static void nvram_read_ ## type(const char *prefix, \
67*4882a593Smuzhiyun const char *postfix, const char *name, \
68*4882a593Smuzhiyun type *val, type allset, bool fallback) \
69*4882a593Smuzhiyun { \
70*4882a593Smuzhiyun char buf[100]; \
71*4882a593Smuzhiyun int err; \
72*4882a593Smuzhiyun type var; \
73*4882a593Smuzhiyun \
74*4882a593Smuzhiyun err = get_nvram_var(prefix, postfix, name, buf, sizeof(buf), \
75*4882a593Smuzhiyun fallback); \
76*4882a593Smuzhiyun if (err < 0) \
77*4882a593Smuzhiyun return; \
78*4882a593Smuzhiyun err = kstrto ## type(strim(buf), 0, &var); \
79*4882a593Smuzhiyun if (err) { \
80*4882a593Smuzhiyun pr_warn("can not parse nvram name %s%s%s with value %s got %i\n", \
81*4882a593Smuzhiyun prefix, name, postfix, buf, err); \
82*4882a593Smuzhiyun return; \
83*4882a593Smuzhiyun } \
84*4882a593Smuzhiyun if (allset && var == allset) \
85*4882a593Smuzhiyun return; \
86*4882a593Smuzhiyun *val = var; \
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun NVRAM_READ_VAL(u8)
NVRAM_READ_VAL(s8)90*4882a593Smuzhiyun NVRAM_READ_VAL(s8)
91*4882a593Smuzhiyun NVRAM_READ_VAL(u16)
92*4882a593Smuzhiyun NVRAM_READ_VAL(u32)
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun #undef NVRAM_READ_VAL
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun static void nvram_read_u32_2(const char *prefix, const char *name,
97*4882a593Smuzhiyun u16 *val_lo, u16 *val_hi, bool fallback)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun char buf[100];
100*4882a593Smuzhiyun int err;
101*4882a593Smuzhiyun u32 val;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
104*4882a593Smuzhiyun if (err < 0)
105*4882a593Smuzhiyun return;
106*4882a593Smuzhiyun err = kstrtou32(strim(buf), 0, &val);
107*4882a593Smuzhiyun if (err) {
108*4882a593Smuzhiyun pr_warn("can not parse nvram name %s%s with value %s got %i\n",
109*4882a593Smuzhiyun prefix, name, buf, err);
110*4882a593Smuzhiyun return;
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun *val_lo = (val & 0x0000FFFFU);
113*4882a593Smuzhiyun *val_hi = (val & 0xFFFF0000U) >> 16;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
nvram_read_leddc(const char * prefix,const char * name,u8 * leddc_on_time,u8 * leddc_off_time,bool fallback)116*4882a593Smuzhiyun static void nvram_read_leddc(const char *prefix, const char *name,
117*4882a593Smuzhiyun u8 *leddc_on_time, u8 *leddc_off_time,
118*4882a593Smuzhiyun bool fallback)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun char buf[100];
121*4882a593Smuzhiyun int err;
122*4882a593Smuzhiyun u32 val;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
125*4882a593Smuzhiyun if (err < 0)
126*4882a593Smuzhiyun return;
127*4882a593Smuzhiyun err = kstrtou32(strim(buf), 0, &val);
128*4882a593Smuzhiyun if (err) {
129*4882a593Smuzhiyun pr_warn("can not parse nvram name %s%s with value %s got %i\n",
130*4882a593Smuzhiyun prefix, name, buf, err);
131*4882a593Smuzhiyun return;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (val == 0xffff || val == 0xffffffff)
135*4882a593Smuzhiyun return;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun *leddc_on_time = val & 0xff;
138*4882a593Smuzhiyun *leddc_off_time = (val >> 16) & 0xff;
139*4882a593Smuzhiyun }
140*4882a593Smuzhiyun
nvram_read_macaddr(const char * prefix,const char * name,u8 val[6],bool fallback)141*4882a593Smuzhiyun static void nvram_read_macaddr(const char *prefix, const char *name,
142*4882a593Smuzhiyun u8 val[6], bool fallback)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun char buf[100];
145*4882a593Smuzhiyun int err;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
148*4882a593Smuzhiyun if (err < 0)
149*4882a593Smuzhiyun return;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun strreplace(buf, '-', ':');
152*4882a593Smuzhiyun if (!mac_pton(buf, val))
153*4882a593Smuzhiyun pr_warn("Can not parse mac address: %s\n", buf);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
nvram_read_alpha2(const char * prefix,const char * name,char val[2],bool fallback)156*4882a593Smuzhiyun static void nvram_read_alpha2(const char *prefix, const char *name,
157*4882a593Smuzhiyun char val[2], bool fallback)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun char buf[10];
160*4882a593Smuzhiyun int err;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun err = get_nvram_var(prefix, NULL, name, buf, sizeof(buf), fallback);
163*4882a593Smuzhiyun if (err < 0)
164*4882a593Smuzhiyun return;
165*4882a593Smuzhiyun if (buf[0] == '0')
166*4882a593Smuzhiyun return;
167*4882a593Smuzhiyun if (strlen(buf) > 2) {
168*4882a593Smuzhiyun pr_warn("alpha2 is too long %s\n", buf);
169*4882a593Smuzhiyun return;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun memcpy(val, buf, 2);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun /* This is one-function-only macro, it uses local "sprom" variable! */
175*4882a593Smuzhiyun #define ENTRY(_revmask, _type, _prefix, _name, _val, _allset, _fallback) \
176*4882a593Smuzhiyun if (_revmask & BIT(sprom->revision)) \
177*4882a593Smuzhiyun nvram_read_ ## _type(_prefix, NULL, _name, &sprom->_val, \
178*4882a593Smuzhiyun _allset, _fallback)
179*4882a593Smuzhiyun /*
180*4882a593Smuzhiyun * Special version of filling function that can be safely called for any SPROM
181*4882a593Smuzhiyun * revision. For every NVRAM to SPROM mapping it contains bitmask of revisions
182*4882a593Smuzhiyun * for which the mapping is valid.
183*4882a593Smuzhiyun * It obviously requires some hexadecimal/bitmasks knowledge, but allows
184*4882a593Smuzhiyun * writing cleaner code (easy revisions handling).
185*4882a593Smuzhiyun * Note that while SPROM revision 0 was never used, we still keep BIT(0)
186*4882a593Smuzhiyun * reserved for it, just to keep numbering sane.
187*4882a593Smuzhiyun */
bcm47xx_sprom_fill_auto(struct ssb_sprom * sprom,const char * prefix,bool fallback)188*4882a593Smuzhiyun static void bcm47xx_sprom_fill_auto(struct ssb_sprom *sprom,
189*4882a593Smuzhiyun const char *prefix, bool fallback)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun const char *pre = prefix;
192*4882a593Smuzhiyun bool fb = fallback;
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun /* Broadcom extracts it for rev 8+ but it was found on 2 and 4 too */
195*4882a593Smuzhiyun ENTRY(0xfffffffe, u16, pre, "devid", dev_id, 0, fallback);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun ENTRY(0xfffffffe, u16, pre, "boardrev", board_rev, 0, true);
198*4882a593Smuzhiyun ENTRY(0xfffffffe, u32, pre, "boardflags", boardflags, 0, fb);
199*4882a593Smuzhiyun ENTRY(0xfffffff0, u32, pre, "boardflags2", boardflags2, 0, fb);
200*4882a593Smuzhiyun ENTRY(0xfffff800, u32, pre, "boardflags3", boardflags3, 0, fb);
201*4882a593Smuzhiyun ENTRY(0x00000002, u16, pre, "boardflags", boardflags_lo, 0, fb);
202*4882a593Smuzhiyun ENTRY(0xfffffffc, u16, pre, "boardtype", board_type, 0, true);
203*4882a593Smuzhiyun ENTRY(0xfffffffe, u16, pre, "boardnum", board_num, 0, fb);
204*4882a593Smuzhiyun ENTRY(0x00000002, u8, pre, "cc", country_code, 0, fb);
205*4882a593Smuzhiyun ENTRY(0xfffffff8, u8, pre, "regrev", regrev, 0, fb);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun ENTRY(0xfffffffe, u8, pre, "ledbh0", gpio0, 0xff, fb);
208*4882a593Smuzhiyun ENTRY(0xfffffffe, u8, pre, "ledbh1", gpio1, 0xff, fb);
209*4882a593Smuzhiyun ENTRY(0xfffffffe, u8, pre, "ledbh2", gpio2, 0xff, fb);
210*4882a593Smuzhiyun ENTRY(0xfffffffe, u8, pre, "ledbh3", gpio3, 0xff, fb);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun ENTRY(0x0000070e, u16, pre, "pa0b0", pa0b0, 0, fb);
213*4882a593Smuzhiyun ENTRY(0x0000070e, u16, pre, "pa0b1", pa0b1, 0, fb);
214*4882a593Smuzhiyun ENTRY(0x0000070e, u16, pre, "pa0b2", pa0b2, 0, fb);
215*4882a593Smuzhiyun ENTRY(0x0000070e, u8, pre, "pa0itssit", itssi_bg, 0, fb);
216*4882a593Smuzhiyun ENTRY(0x0000070e, u8, pre, "pa0maxpwr", maxpwr_bg, 0, fb);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun ENTRY(0x0000070c, u8, pre, "opo", opo, 0, fb);
219*4882a593Smuzhiyun ENTRY(0xfffffffe, u8, pre, "aa2g", ant_available_bg, 0, fb);
220*4882a593Smuzhiyun ENTRY(0xfffffffe, u8, pre, "aa5g", ant_available_a, 0, fb);
221*4882a593Smuzhiyun ENTRY(0x000007fe, s8, pre, "ag0", antenna_gain.a0, 0, fb);
222*4882a593Smuzhiyun ENTRY(0x000007fe, s8, pre, "ag1", antenna_gain.a1, 0, fb);
223*4882a593Smuzhiyun ENTRY(0x000007f0, s8, pre, "ag2", antenna_gain.a2, 0, fb);
224*4882a593Smuzhiyun ENTRY(0x000007f0, s8, pre, "ag3", antenna_gain.a3, 0, fb);
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun ENTRY(0x0000070e, u16, pre, "pa1b0", pa1b0, 0, fb);
227*4882a593Smuzhiyun ENTRY(0x0000070e, u16, pre, "pa1b1", pa1b1, 0, fb);
228*4882a593Smuzhiyun ENTRY(0x0000070e, u16, pre, "pa1b2", pa1b2, 0, fb);
229*4882a593Smuzhiyun ENTRY(0x0000070c, u16, pre, "pa1lob0", pa1lob0, 0, fb);
230*4882a593Smuzhiyun ENTRY(0x0000070c, u16, pre, "pa1lob1", pa1lob1, 0, fb);
231*4882a593Smuzhiyun ENTRY(0x0000070c, u16, pre, "pa1lob2", pa1lob2, 0, fb);
232*4882a593Smuzhiyun ENTRY(0x0000070c, u16, pre, "pa1hib0", pa1hib0, 0, fb);
233*4882a593Smuzhiyun ENTRY(0x0000070c, u16, pre, "pa1hib1", pa1hib1, 0, fb);
234*4882a593Smuzhiyun ENTRY(0x0000070c, u16, pre, "pa1hib2", pa1hib2, 0, fb);
235*4882a593Smuzhiyun ENTRY(0x0000070e, u8, pre, "pa1itssit", itssi_a, 0, fb);
236*4882a593Smuzhiyun ENTRY(0x0000070e, u8, pre, "pa1maxpwr", maxpwr_a, 0, fb);
237*4882a593Smuzhiyun ENTRY(0x0000070c, u8, pre, "pa1lomaxpwr", maxpwr_al, 0, fb);
238*4882a593Smuzhiyun ENTRY(0x0000070c, u8, pre, "pa1himaxpwr", maxpwr_ah, 0, fb);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "bxa2g", bxa2g, 0, fb);
241*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "rssisav2g", rssisav2g, 0, fb);
242*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "rssismc2g", rssismc2g, 0, fb);
243*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "rssismf2g", rssismf2g, 0, fb);
244*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "bxa5g", bxa5g, 0, fb);
245*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "rssisav5g", rssisav5g, 0, fb);
246*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "rssismc5g", rssismc5g, 0, fb);
247*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "rssismf5g", rssismf5g, 0, fb);
248*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "tri2g", tri2g, 0, fb);
249*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "tri5g", tri5g, 0, fb);
250*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "tri5gl", tri5gl, 0, fb);
251*4882a593Smuzhiyun ENTRY(0x00000708, u8, pre, "tri5gh", tri5gh, 0, fb);
252*4882a593Smuzhiyun ENTRY(0x00000708, s8, pre, "rxpo2g", rxpo2g, 0, fb);
253*4882a593Smuzhiyun ENTRY(0x00000708, s8, pre, "rxpo5g", rxpo5g, 0, fb);
254*4882a593Smuzhiyun ENTRY(0xfffffff0, u8, pre, "txchain", txchain, 0xf, fb);
255*4882a593Smuzhiyun ENTRY(0xfffffff0, u8, pre, "rxchain", rxchain, 0xf, fb);
256*4882a593Smuzhiyun ENTRY(0xfffffff0, u8, pre, "antswitch", antswitch, 0xff, fb);
257*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "tssipos2g", fem.ghz2.tssipos, 0, fb);
258*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "extpagain2g", fem.ghz2.extpa_gain, 0, fb);
259*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "pdetrange2g", fem.ghz2.pdet_range, 0, fb);
260*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "triso2g", fem.ghz2.tr_iso, 0, fb);
261*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "antswctl2g", fem.ghz2.antswlut, 0, fb);
262*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "tssipos5g", fem.ghz5.tssipos, 0, fb);
263*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "extpagain5g", fem.ghz5.extpa_gain, 0, fb);
264*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "pdetrange5g", fem.ghz5.pdet_range, 0, fb);
265*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "triso5g", fem.ghz5.tr_iso, 0, fb);
266*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "antswctl5g", fem.ghz5.antswlut, 0, fb);
267*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid2ga0", txpid2g[0], 0, fb);
268*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid2ga1", txpid2g[1], 0, fb);
269*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid2ga2", txpid2g[2], 0, fb);
270*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid2ga3", txpid2g[3], 0, fb);
271*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5ga0", txpid5g[0], 0, fb);
272*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5ga1", txpid5g[1], 0, fb);
273*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5ga2", txpid5g[2], 0, fb);
274*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5ga3", txpid5g[3], 0, fb);
275*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gla0", txpid5gl[0], 0, fb);
276*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gla1", txpid5gl[1], 0, fb);
277*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gla2", txpid5gl[2], 0, fb);
278*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gla3", txpid5gl[3], 0, fb);
279*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gha0", txpid5gh[0], 0, fb);
280*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gha1", txpid5gh[1], 0, fb);
281*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gha2", txpid5gh[2], 0, fb);
282*4882a593Smuzhiyun ENTRY(0x000000f0, u8, pre, "txpid5gha3", txpid5gh[3], 0, fb);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "tempthresh", tempthresh, 0, fb);
285*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "tempoffset", tempoffset, 0, fb);
286*4882a593Smuzhiyun ENTRY(0xffffff00, u16, pre, "rawtempsense", rawtempsense, 0, fb);
287*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "measpower", measpower, 0, fb);
288*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "tempsense_slope", tempsense_slope, 0, fb);
289*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "tempcorrx", tempcorrx, 0, fb);
290*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "tempsense_option", tempsense_option, 0, fb);
291*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "freqoffset_corr", freqoffset_corr, 0, fb);
292*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "iqcal_swp_dis", iqcal_swp_dis, 0, fb);
293*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "hw_iqcal_en", hw_iqcal_en, 0, fb);
294*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "elna2g", elna2g, 0, fb);
295*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "elna5g", elna5g, 0, fb);
296*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "phycal_tempdelta", phycal_tempdelta, 0, fb);
297*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "temps_period", temps_period, 0, fb);
298*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "temps_hysteresis", temps_hysteresis, 0, fb);
299*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "measpower1", measpower1, 0, fb);
300*4882a593Smuzhiyun ENTRY(0xffffff00, u8, pre, "measpower2", measpower2, 0, fb);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "cck2gpo", cck2gpo, 0, fb);
303*4882a593Smuzhiyun ENTRY(0x000001f0, u32, pre, "ofdm2gpo", ofdm2gpo, 0, fb);
304*4882a593Smuzhiyun ENTRY(0x000001f0, u32, pre, "ofdm5gpo", ofdm5gpo, 0, fb);
305*4882a593Smuzhiyun ENTRY(0x000001f0, u32, pre, "ofdm5glpo", ofdm5glpo, 0, fb);
306*4882a593Smuzhiyun ENTRY(0x000001f0, u32, pre, "ofdm5ghpo", ofdm5ghpo, 0, fb);
307*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo0", mcs2gpo[0], 0, fb);
308*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo1", mcs2gpo[1], 0, fb);
309*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo2", mcs2gpo[2], 0, fb);
310*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo3", mcs2gpo[3], 0, fb);
311*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo4", mcs2gpo[4], 0, fb);
312*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo5", mcs2gpo[5], 0, fb);
313*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo6", mcs2gpo[6], 0, fb);
314*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs2gpo7", mcs2gpo[7], 0, fb);
315*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo0", mcs5gpo[0], 0, fb);
316*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo1", mcs5gpo[1], 0, fb);
317*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo2", mcs5gpo[2], 0, fb);
318*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo3", mcs5gpo[3], 0, fb);
319*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo4", mcs5gpo[4], 0, fb);
320*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo5", mcs5gpo[5], 0, fb);
321*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo6", mcs5gpo[6], 0, fb);
322*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5gpo7", mcs5gpo[7], 0, fb);
323*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo0", mcs5glpo[0], 0, fb);
324*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo1", mcs5glpo[1], 0, fb);
325*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo2", mcs5glpo[2], 0, fb);
326*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo3", mcs5glpo[3], 0, fb);
327*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo4", mcs5glpo[4], 0, fb);
328*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo5", mcs5glpo[5], 0, fb);
329*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo6", mcs5glpo[6], 0, fb);
330*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5glpo7", mcs5glpo[7], 0, fb);
331*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo0", mcs5ghpo[0], 0, fb);
332*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo1", mcs5ghpo[1], 0, fb);
333*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo2", mcs5ghpo[2], 0, fb);
334*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo3", mcs5ghpo[3], 0, fb);
335*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo4", mcs5ghpo[4], 0, fb);
336*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo5", mcs5ghpo[5], 0, fb);
337*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo6", mcs5ghpo[6], 0, fb);
338*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "mcs5ghpo7", mcs5ghpo[7], 0, fb);
339*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "cddpo", cddpo, 0, fb);
340*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "stbcpo", stbcpo, 0, fb);
341*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "bw40po", bw40po, 0, fb);
342*4882a593Smuzhiyun ENTRY(0x000001f0, u16, pre, "bwduppo", bwduppo, 0, fb);
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun ENTRY(0xfffffe00, u16, pre, "cckbw202gpo", cckbw202gpo, 0, fb);
345*4882a593Smuzhiyun ENTRY(0xfffffe00, u16, pre, "cckbw20ul2gpo", cckbw20ul2gpo, 0, fb);
346*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw202gpo", legofdmbw202gpo, 0, fb);
347*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw20ul2gpo", legofdmbw20ul2gpo, 0, fb);
348*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw205glpo", legofdmbw205glpo, 0, fb);
349*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw20ul5glpo", legofdmbw20ul5glpo, 0, fb);
350*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw205gmpo", legofdmbw205gmpo, 0, fb);
351*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw20ul5gmpo", legofdmbw20ul5gmpo, 0, fb);
352*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw205ghpo", legofdmbw205ghpo, 0, fb);
353*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "legofdmbw20ul5ghpo", legofdmbw20ul5ghpo, 0, fb);
354*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw202gpo", mcsbw202gpo, 0, fb);
355*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "mcsbw20ul2gpo", mcsbw20ul2gpo, 0, fb);
356*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw402gpo", mcsbw402gpo, 0, fb);
357*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw205glpo", mcsbw205glpo, 0, fb);
358*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "mcsbw20ul5glpo", mcsbw20ul5glpo, 0, fb);
359*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw405glpo", mcsbw405glpo, 0, fb);
360*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw205gmpo", mcsbw205gmpo, 0, fb);
361*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "mcsbw20ul5gmpo", mcsbw20ul5gmpo, 0, fb);
362*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw405gmpo", mcsbw405gmpo, 0, fb);
363*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw205ghpo", mcsbw205ghpo, 0, fb);
364*4882a593Smuzhiyun ENTRY(0x00000600, u32, pre, "mcsbw20ul5ghpo", mcsbw20ul5ghpo, 0, fb);
365*4882a593Smuzhiyun ENTRY(0xfffffe00, u32, pre, "mcsbw405ghpo", mcsbw405ghpo, 0, fb);
366*4882a593Smuzhiyun ENTRY(0x00000600, u16, pre, "mcs32po", mcs32po, 0, fb);
367*4882a593Smuzhiyun ENTRY(0x00000600, u16, pre, "legofdm40duppo", legofdm40duppo, 0, fb);
368*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "pcieingress_war", pcieingress_war, 0, fb);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun /* TODO: rev 11 support */
371*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr2ga0", rxgainerr2ga[0], 0, fb);
372*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr2ga1", rxgainerr2ga[1], 0, fb);
373*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr2ga2", rxgainerr2ga[2], 0, fb);
374*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gla0", rxgainerr5gla[0], 0, fb);
375*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gla1", rxgainerr5gla[1], 0, fb);
376*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gla2", rxgainerr5gla[2], 0, fb);
377*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gma0", rxgainerr5gma[0], 0, fb);
378*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gma1", rxgainerr5gma[1], 0, fb);
379*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gma2", rxgainerr5gma[2], 0, fb);
380*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gha0", rxgainerr5gha[0], 0, fb);
381*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gha1", rxgainerr5gha[1], 0, fb);
382*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gha2", rxgainerr5gha[2], 0, fb);
383*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gua0", rxgainerr5gua[0], 0, fb);
384*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gua1", rxgainerr5gua[1], 0, fb);
385*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "rxgainerr5gua2", rxgainerr5gua[2], 0, fb);
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun ENTRY(0xfffffe00, u8, pre, "sar2g", sar2g, 0, fb);
388*4882a593Smuzhiyun ENTRY(0xfffffe00, u8, pre, "sar5g", sar5g, 0, fb);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun /* TODO: rev 11 support */
391*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl2ga0", noiselvl2ga[0], 0, fb);
392*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl2ga1", noiselvl2ga[1], 0, fb);
393*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl2ga2", noiselvl2ga[2], 0, fb);
394*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gla0", noiselvl5gla[0], 0, fb);
395*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gla1", noiselvl5gla[1], 0, fb);
396*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gla2", noiselvl5gla[2], 0, fb);
397*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gma0", noiselvl5gma[0], 0, fb);
398*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gma1", noiselvl5gma[1], 0, fb);
399*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gma2", noiselvl5gma[2], 0, fb);
400*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gha0", noiselvl5gha[0], 0, fb);
401*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gha1", noiselvl5gha[1], 0, fb);
402*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gha2", noiselvl5gha[2], 0, fb);
403*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gua0", noiselvl5gua[0], 0, fb);
404*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gua1", noiselvl5gua[1], 0, fb);
405*4882a593Smuzhiyun ENTRY(0x00000700, u8, pre, "noiselvl5gua2", noiselvl5gua[2], 0, fb);
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun #undef ENTRY /* It's specififc, uses local variable, don't use it (again). */
408*4882a593Smuzhiyun
bcm47xx_fill_sprom_path_r4589(struct ssb_sprom * sprom,const char * prefix,bool fallback)409*4882a593Smuzhiyun static void bcm47xx_fill_sprom_path_r4589(struct ssb_sprom *sprom,
410*4882a593Smuzhiyun const char *prefix, bool fallback)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun char postfix[2];
413*4882a593Smuzhiyun int i;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
416*4882a593Smuzhiyun struct ssb_sprom_core_pwr_info *pwr_info;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun pwr_info = &sprom->core_pwr_info[i];
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun snprintf(postfix, sizeof(postfix), "%i", i);
421*4882a593Smuzhiyun nvram_read_u8(prefix, postfix, "maxp2ga",
422*4882a593Smuzhiyun &pwr_info->maxpwr_2g, 0, fallback);
423*4882a593Smuzhiyun nvram_read_u8(prefix, postfix, "itt2ga",
424*4882a593Smuzhiyun &pwr_info->itssi_2g, 0, fallback);
425*4882a593Smuzhiyun nvram_read_u8(prefix, postfix, "itt5ga",
426*4882a593Smuzhiyun &pwr_info->itssi_5g, 0, fallback);
427*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa2gw0a",
428*4882a593Smuzhiyun &pwr_info->pa_2g[0], 0, fallback);
429*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa2gw1a",
430*4882a593Smuzhiyun &pwr_info->pa_2g[1], 0, fallback);
431*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa2gw2a",
432*4882a593Smuzhiyun &pwr_info->pa_2g[2], 0, fallback);
433*4882a593Smuzhiyun nvram_read_u8(prefix, postfix, "maxp5ga",
434*4882a593Smuzhiyun &pwr_info->maxpwr_5g, 0, fallback);
435*4882a593Smuzhiyun nvram_read_u8(prefix, postfix, "maxp5gha",
436*4882a593Smuzhiyun &pwr_info->maxpwr_5gh, 0, fallback);
437*4882a593Smuzhiyun nvram_read_u8(prefix, postfix, "maxp5gla",
438*4882a593Smuzhiyun &pwr_info->maxpwr_5gl, 0, fallback);
439*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5gw0a",
440*4882a593Smuzhiyun &pwr_info->pa_5g[0], 0, fallback);
441*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5gw1a",
442*4882a593Smuzhiyun &pwr_info->pa_5g[1], 0, fallback);
443*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5gw2a",
444*4882a593Smuzhiyun &pwr_info->pa_5g[2], 0, fallback);
445*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5glw0a",
446*4882a593Smuzhiyun &pwr_info->pa_5gl[0], 0, fallback);
447*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5glw1a",
448*4882a593Smuzhiyun &pwr_info->pa_5gl[1], 0, fallback);
449*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5glw2a",
450*4882a593Smuzhiyun &pwr_info->pa_5gl[2], 0, fallback);
451*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5ghw0a",
452*4882a593Smuzhiyun &pwr_info->pa_5gh[0], 0, fallback);
453*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5ghw1a",
454*4882a593Smuzhiyun &pwr_info->pa_5gh[1], 0, fallback);
455*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5ghw2a",
456*4882a593Smuzhiyun &pwr_info->pa_5gh[2], 0, fallback);
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
bcm47xx_fill_sprom_path_r45(struct ssb_sprom * sprom,const char * prefix,bool fallback)460*4882a593Smuzhiyun static void bcm47xx_fill_sprom_path_r45(struct ssb_sprom *sprom,
461*4882a593Smuzhiyun const char *prefix, bool fallback)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun char postfix[2];
464*4882a593Smuzhiyun int i;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(sprom->core_pwr_info); i++) {
467*4882a593Smuzhiyun struct ssb_sprom_core_pwr_info *pwr_info;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun pwr_info = &sprom->core_pwr_info[i];
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun snprintf(postfix, sizeof(postfix), "%i", i);
472*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa2gw3a",
473*4882a593Smuzhiyun &pwr_info->pa_2g[3], 0, fallback);
474*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5gw3a",
475*4882a593Smuzhiyun &pwr_info->pa_5g[3], 0, fallback);
476*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5glw3a",
477*4882a593Smuzhiyun &pwr_info->pa_5gl[3], 0, fallback);
478*4882a593Smuzhiyun nvram_read_u16(prefix, postfix, "pa5ghw3a",
479*4882a593Smuzhiyun &pwr_info->pa_5gh[3], 0, fallback);
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
bcm47xx_is_valid_mac(u8 * mac)483*4882a593Smuzhiyun static bool bcm47xx_is_valid_mac(u8 *mac)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun return mac && !(mac[0] == 0x00 && mac[1] == 0x90 && mac[2] == 0x4c);
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun
bcm47xx_increase_mac_addr(u8 * mac,u8 num)488*4882a593Smuzhiyun static int bcm47xx_increase_mac_addr(u8 *mac, u8 num)
489*4882a593Smuzhiyun {
490*4882a593Smuzhiyun u8 *oui = mac + ETH_ALEN/2 - 1;
491*4882a593Smuzhiyun u8 *p = mac + ETH_ALEN - 1;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun do {
494*4882a593Smuzhiyun (*p) += num;
495*4882a593Smuzhiyun if (*p > num)
496*4882a593Smuzhiyun break;
497*4882a593Smuzhiyun p--;
498*4882a593Smuzhiyun num = 1;
499*4882a593Smuzhiyun } while (p != oui);
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun if (p == oui) {
502*4882a593Smuzhiyun pr_err("unable to fetch mac address\n");
503*4882a593Smuzhiyun return -ENOENT;
504*4882a593Smuzhiyun }
505*4882a593Smuzhiyun return 0;
506*4882a593Smuzhiyun }
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun static int mac_addr_used = 2;
509*4882a593Smuzhiyun
bcm47xx_fill_sprom_ethernet(struct ssb_sprom * sprom,const char * prefix,bool fallback)510*4882a593Smuzhiyun static void bcm47xx_fill_sprom_ethernet(struct ssb_sprom *sprom,
511*4882a593Smuzhiyun const char *prefix, bool fallback)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun bool fb = fallback;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun nvram_read_macaddr(prefix, "et0macaddr", sprom->et0mac, fallback);
516*4882a593Smuzhiyun nvram_read_u8(prefix, NULL, "et0mdcport", &sprom->et0mdcport, 0,
517*4882a593Smuzhiyun fallback);
518*4882a593Smuzhiyun nvram_read_u8(prefix, NULL, "et0phyaddr", &sprom->et0phyaddr, 0,
519*4882a593Smuzhiyun fallback);
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun nvram_read_macaddr(prefix, "et1macaddr", sprom->et1mac, fallback);
522*4882a593Smuzhiyun nvram_read_u8(prefix, NULL, "et1mdcport", &sprom->et1mdcport, 0,
523*4882a593Smuzhiyun fallback);
524*4882a593Smuzhiyun nvram_read_u8(prefix, NULL, "et1phyaddr", &sprom->et1phyaddr, 0,
525*4882a593Smuzhiyun fallback);
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun nvram_read_macaddr(prefix, "et2macaddr", sprom->et2mac, fb);
528*4882a593Smuzhiyun nvram_read_u8(prefix, NULL, "et2mdcport", &sprom->et2mdcport, 0, fb);
529*4882a593Smuzhiyun nvram_read_u8(prefix, NULL, "et2phyaddr", &sprom->et2phyaddr, 0, fb);
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun nvram_read_macaddr(prefix, "macaddr", sprom->il0mac, fallback);
532*4882a593Smuzhiyun nvram_read_macaddr(prefix, "il0macaddr", sprom->il0mac, fallback);
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun /* The address prefix 00:90:4C is used by Broadcom in their initial
535*4882a593Smuzhiyun * configuration. When a mac address with the prefix 00:90:4C is used
536*4882a593Smuzhiyun * all devices from the same series are sharing the same mac address.
537*4882a593Smuzhiyun * To prevent mac address collisions we replace them with a mac address
538*4882a593Smuzhiyun * based on the base address.
539*4882a593Smuzhiyun */
540*4882a593Smuzhiyun if (!bcm47xx_is_valid_mac(sprom->il0mac)) {
541*4882a593Smuzhiyun u8 mac[6];
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun nvram_read_macaddr(NULL, "et0macaddr", mac, false);
544*4882a593Smuzhiyun if (bcm47xx_is_valid_mac(mac)) {
545*4882a593Smuzhiyun int err = bcm47xx_increase_mac_addr(mac, mac_addr_used);
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun if (!err) {
548*4882a593Smuzhiyun ether_addr_copy(sprom->il0mac, mac);
549*4882a593Smuzhiyun mac_addr_used++;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun
bcm47xx_fill_board_data(struct ssb_sprom * sprom,const char * prefix,bool fallback)555*4882a593Smuzhiyun static void bcm47xx_fill_board_data(struct ssb_sprom *sprom, const char *prefix,
556*4882a593Smuzhiyun bool fallback)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun nvram_read_u32_2(prefix, "boardflags", &sprom->boardflags_lo,
559*4882a593Smuzhiyun &sprom->boardflags_hi, fallback);
560*4882a593Smuzhiyun nvram_read_u32_2(prefix, "boardflags2", &sprom->boardflags2_lo,
561*4882a593Smuzhiyun &sprom->boardflags2_hi, fallback);
562*4882a593Smuzhiyun }
563*4882a593Smuzhiyun
bcm47xx_fill_sprom(struct ssb_sprom * sprom,const char * prefix,bool fallback)564*4882a593Smuzhiyun void bcm47xx_fill_sprom(struct ssb_sprom *sprom, const char *prefix,
565*4882a593Smuzhiyun bool fallback)
566*4882a593Smuzhiyun {
567*4882a593Smuzhiyun bcm47xx_fill_sprom_ethernet(sprom, prefix, fallback);
568*4882a593Smuzhiyun bcm47xx_fill_board_data(sprom, prefix, fallback);
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun nvram_read_u8(prefix, NULL, "sromrev", &sprom->revision, 0, fallback);
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun /* Entries requiring custom functions */
573*4882a593Smuzhiyun nvram_read_alpha2(prefix, "ccode", sprom->alpha2, fallback);
574*4882a593Smuzhiyun if (sprom->revision >= 3)
575*4882a593Smuzhiyun nvram_read_leddc(prefix, "leddc", &sprom->leddc_on_time,
576*4882a593Smuzhiyun &sprom->leddc_off_time, fallback);
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun switch (sprom->revision) {
579*4882a593Smuzhiyun case 4:
580*4882a593Smuzhiyun case 5:
581*4882a593Smuzhiyun bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
582*4882a593Smuzhiyun bcm47xx_fill_sprom_path_r45(sprom, prefix, fallback);
583*4882a593Smuzhiyun break;
584*4882a593Smuzhiyun case 8:
585*4882a593Smuzhiyun case 9:
586*4882a593Smuzhiyun bcm47xx_fill_sprom_path_r4589(sprom, prefix, fallback);
587*4882a593Smuzhiyun break;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun bcm47xx_sprom_fill_auto(sprom, prefix, fallback);
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
bcm47xx_get_sprom_ssb(struct ssb_bus * bus,struct ssb_sprom * out)594*4882a593Smuzhiyun static int bcm47xx_get_sprom_ssb(struct ssb_bus *bus, struct ssb_sprom *out)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun char prefix[10];
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun switch (bus->bustype) {
599*4882a593Smuzhiyun case SSB_BUSTYPE_SSB:
600*4882a593Smuzhiyun bcm47xx_fill_sprom(out, NULL, false);
601*4882a593Smuzhiyun return 0;
602*4882a593Smuzhiyun case SSB_BUSTYPE_PCI:
603*4882a593Smuzhiyun memset(out, 0, sizeof(struct ssb_sprom));
604*4882a593Smuzhiyun snprintf(prefix, sizeof(prefix), "pci/%u/%u/",
605*4882a593Smuzhiyun bus->host_pci->bus->number + 1,
606*4882a593Smuzhiyun PCI_SLOT(bus->host_pci->devfn));
607*4882a593Smuzhiyun bcm47xx_fill_sprom(out, prefix, false);
608*4882a593Smuzhiyun return 0;
609*4882a593Smuzhiyun default:
610*4882a593Smuzhiyun pr_warn("Unable to fill SPROM for given bustype.\n");
611*4882a593Smuzhiyun return -EINVAL;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun #endif
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun #if IS_BUILTIN(CONFIG_BCMA)
617*4882a593Smuzhiyun /*
618*4882a593Smuzhiyun * Having many NVRAM entries for PCI devices led to repeating prefixes like
619*4882a593Smuzhiyun * pci/1/1/ all the time and wasting flash space. So at some point Broadcom
620*4882a593Smuzhiyun * decided to introduce prefixes like 0: 1: 2: etc.
621*4882a593Smuzhiyun * If we find e.g. devpath0=pci/2/1 or devpath0=pci/2/1/ we should use 0:
622*4882a593Smuzhiyun * instead of pci/2/1/.
623*4882a593Smuzhiyun */
bcm47xx_sprom_apply_prefix_alias(char * prefix,size_t prefix_size)624*4882a593Smuzhiyun static void bcm47xx_sprom_apply_prefix_alias(char *prefix, size_t prefix_size)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun size_t prefix_len = strlen(prefix);
627*4882a593Smuzhiyun size_t short_len = prefix_len - 1;
628*4882a593Smuzhiyun char nvram_var[10];
629*4882a593Smuzhiyun char buf[20];
630*4882a593Smuzhiyun int i;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun /* Passed prefix has to end with a slash */
633*4882a593Smuzhiyun if (prefix_len <= 0 || prefix[prefix_len - 1] != '/')
634*4882a593Smuzhiyun return;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun for (i = 0; i < 3; i++) {
637*4882a593Smuzhiyun if (snprintf(nvram_var, sizeof(nvram_var), "devpath%d", i) <= 0)
638*4882a593Smuzhiyun continue;
639*4882a593Smuzhiyun if (bcm47xx_nvram_getenv(nvram_var, buf, sizeof(buf)) < 0)
640*4882a593Smuzhiyun continue;
641*4882a593Smuzhiyun if (!strcmp(buf, prefix) ||
642*4882a593Smuzhiyun (short_len && strlen(buf) == short_len && !strncmp(buf, prefix, short_len))) {
643*4882a593Smuzhiyun snprintf(prefix, prefix_size, "%d:", i);
644*4882a593Smuzhiyun return;
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
bcm47xx_get_sprom_bcma(struct bcma_bus * bus,struct ssb_sprom * out)649*4882a593Smuzhiyun static int bcm47xx_get_sprom_bcma(struct bcma_bus *bus, struct ssb_sprom *out)
650*4882a593Smuzhiyun {
651*4882a593Smuzhiyun struct bcma_boardinfo *binfo = &bus->boardinfo;
652*4882a593Smuzhiyun struct bcma_device *core;
653*4882a593Smuzhiyun char buf[10];
654*4882a593Smuzhiyun char *prefix;
655*4882a593Smuzhiyun bool fallback = false;
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun switch (bus->hosttype) {
658*4882a593Smuzhiyun case BCMA_HOSTTYPE_PCI:
659*4882a593Smuzhiyun memset(out, 0, sizeof(struct ssb_sprom));
660*4882a593Smuzhiyun /* On BCM47XX all PCI buses share the same domain */
661*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_BCM47XX))
662*4882a593Smuzhiyun snprintf(buf, sizeof(buf), "pci/%u/%u/",
663*4882a593Smuzhiyun bus->host_pci->bus->number + 1,
664*4882a593Smuzhiyun PCI_SLOT(bus->host_pci->devfn));
665*4882a593Smuzhiyun else
666*4882a593Smuzhiyun snprintf(buf, sizeof(buf), "pci/%u/%u/",
667*4882a593Smuzhiyun pci_domain_nr(bus->host_pci->bus) + 1,
668*4882a593Smuzhiyun bus->host_pci->bus->number);
669*4882a593Smuzhiyun bcm47xx_sprom_apply_prefix_alias(buf, sizeof(buf));
670*4882a593Smuzhiyun prefix = buf;
671*4882a593Smuzhiyun break;
672*4882a593Smuzhiyun case BCMA_HOSTTYPE_SOC:
673*4882a593Smuzhiyun memset(out, 0, sizeof(struct ssb_sprom));
674*4882a593Smuzhiyun core = bcma_find_core(bus, BCMA_CORE_80211);
675*4882a593Smuzhiyun if (core) {
676*4882a593Smuzhiyun snprintf(buf, sizeof(buf), "sb/%u/",
677*4882a593Smuzhiyun core->core_index);
678*4882a593Smuzhiyun prefix = buf;
679*4882a593Smuzhiyun fallback = true;
680*4882a593Smuzhiyun } else {
681*4882a593Smuzhiyun prefix = NULL;
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun break;
684*4882a593Smuzhiyun default:
685*4882a593Smuzhiyun pr_warn("Unable to fill SPROM for given bustype.\n");
686*4882a593Smuzhiyun return -EINVAL;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun nvram_read_u16(prefix, NULL, "boardvendor", &binfo->vendor, 0, true);
690*4882a593Smuzhiyun if (!binfo->vendor)
691*4882a593Smuzhiyun binfo->vendor = SSB_BOARDVENDOR_BCM;
692*4882a593Smuzhiyun nvram_read_u16(prefix, NULL, "boardtype", &binfo->type, 0, true);
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun bcm47xx_fill_sprom(out, prefix, fallback);
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun return 0;
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun #endif
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun static unsigned int bcm47xx_sprom_registered;
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun /*
703*4882a593Smuzhiyun * On bcm47xx we need to register SPROM fallback handler very early, so we can't
704*4882a593Smuzhiyun * use anything like platform device / driver for this.
705*4882a593Smuzhiyun */
bcm47xx_sprom_register_fallbacks(void)706*4882a593Smuzhiyun int bcm47xx_sprom_register_fallbacks(void)
707*4882a593Smuzhiyun {
708*4882a593Smuzhiyun if (bcm47xx_sprom_registered)
709*4882a593Smuzhiyun return 0;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun #if IS_BUILTIN(CONFIG_SSB) && IS_ENABLED(CONFIG_SSB_SPROM)
712*4882a593Smuzhiyun if (ssb_arch_register_fallback_sprom(&bcm47xx_get_sprom_ssb))
713*4882a593Smuzhiyun pr_warn("Failed to register ssb SPROM handler\n");
714*4882a593Smuzhiyun #endif
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun #if IS_BUILTIN(CONFIG_BCMA)
717*4882a593Smuzhiyun if (bcma_arch_register_fallback_sprom(&bcm47xx_get_sprom_bcma))
718*4882a593Smuzhiyun pr_warn("Failed to register bcma SPROM handler\n");
719*4882a593Smuzhiyun #endif
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun bcm47xx_sprom_registered = 1;
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun return 0;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun
726*4882a593Smuzhiyun fs_initcall(bcm47xx_sprom_register_fallbacks);
727