xref: /OK3568_Linux_fs/kernel/drivers/firewire/core-iso.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Isochronous I/O functionality:
4*4882a593Smuzhiyun  *   - Isochronous DMA context management
5*4882a593Smuzhiyun  *   - Isochronous bus resource management (channels, bandwidth), client side
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright (C) 2006 Kristian Hoegsberg <krh@bitplanet.net>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/dma-mapping.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/firewire.h>
13*4882a593Smuzhiyun #include <linux/firewire-constants.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/mm.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/spinlock.h>
18*4882a593Smuzhiyun #include <linux/vmalloc.h>
19*4882a593Smuzhiyun #include <linux/export.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <asm/byteorder.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "core.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun  * Isochronous DMA context management
27*4882a593Smuzhiyun  */
28*4882a593Smuzhiyun 
fw_iso_buffer_alloc(struct fw_iso_buffer * buffer,int page_count)29*4882a593Smuzhiyun int fw_iso_buffer_alloc(struct fw_iso_buffer *buffer, int page_count)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun 	int i;
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 	buffer->page_count = 0;
34*4882a593Smuzhiyun 	buffer->page_count_mapped = 0;
35*4882a593Smuzhiyun 	buffer->pages = kmalloc_array(page_count, sizeof(buffer->pages[0]),
36*4882a593Smuzhiyun 				      GFP_KERNEL);
37*4882a593Smuzhiyun 	if (buffer->pages == NULL)
38*4882a593Smuzhiyun 		return -ENOMEM;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	for (i = 0; i < page_count; i++) {
41*4882a593Smuzhiyun 		buffer->pages[i] = alloc_page(GFP_KERNEL | GFP_DMA32 | __GFP_ZERO);
42*4882a593Smuzhiyun 		if (buffer->pages[i] == NULL)
43*4882a593Smuzhiyun 			break;
44*4882a593Smuzhiyun 	}
45*4882a593Smuzhiyun 	buffer->page_count = i;
46*4882a593Smuzhiyun 	if (i < page_count) {
47*4882a593Smuzhiyun 		fw_iso_buffer_destroy(buffer, NULL);
48*4882a593Smuzhiyun 		return -ENOMEM;
49*4882a593Smuzhiyun 	}
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	return 0;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
fw_iso_buffer_map_dma(struct fw_iso_buffer * buffer,struct fw_card * card,enum dma_data_direction direction)54*4882a593Smuzhiyun int fw_iso_buffer_map_dma(struct fw_iso_buffer *buffer, struct fw_card *card,
55*4882a593Smuzhiyun 			  enum dma_data_direction direction)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	dma_addr_t address;
58*4882a593Smuzhiyun 	int i;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	buffer->direction = direction;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	for (i = 0; i < buffer->page_count; i++) {
63*4882a593Smuzhiyun 		address = dma_map_page(card->device, buffer->pages[i],
64*4882a593Smuzhiyun 				       0, PAGE_SIZE, direction);
65*4882a593Smuzhiyun 		if (dma_mapping_error(card->device, address))
66*4882a593Smuzhiyun 			break;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 		set_page_private(buffer->pages[i], address);
69*4882a593Smuzhiyun 	}
70*4882a593Smuzhiyun 	buffer->page_count_mapped = i;
71*4882a593Smuzhiyun 	if (i < buffer->page_count)
72*4882a593Smuzhiyun 		return -ENOMEM;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
fw_iso_buffer_init(struct fw_iso_buffer * buffer,struct fw_card * card,int page_count,enum dma_data_direction direction)77*4882a593Smuzhiyun int fw_iso_buffer_init(struct fw_iso_buffer *buffer, struct fw_card *card,
78*4882a593Smuzhiyun 		       int page_count, enum dma_data_direction direction)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	int ret;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	ret = fw_iso_buffer_alloc(buffer, page_count);
83*4882a593Smuzhiyun 	if (ret < 0)
84*4882a593Smuzhiyun 		return ret;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	ret = fw_iso_buffer_map_dma(buffer, card, direction);
87*4882a593Smuzhiyun 	if (ret < 0)
88*4882a593Smuzhiyun 		fw_iso_buffer_destroy(buffer, card);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	return ret;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_buffer_init);
93*4882a593Smuzhiyun 
fw_iso_buffer_destroy(struct fw_iso_buffer * buffer,struct fw_card * card)94*4882a593Smuzhiyun void fw_iso_buffer_destroy(struct fw_iso_buffer *buffer,
95*4882a593Smuzhiyun 			   struct fw_card *card)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	int i;
98*4882a593Smuzhiyun 	dma_addr_t address;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	for (i = 0; i < buffer->page_count_mapped; i++) {
101*4882a593Smuzhiyun 		address = page_private(buffer->pages[i]);
102*4882a593Smuzhiyun 		dma_unmap_page(card->device, address,
103*4882a593Smuzhiyun 			       PAGE_SIZE, buffer->direction);
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 	for (i = 0; i < buffer->page_count; i++)
106*4882a593Smuzhiyun 		__free_page(buffer->pages[i]);
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	kfree(buffer->pages);
109*4882a593Smuzhiyun 	buffer->pages = NULL;
110*4882a593Smuzhiyun 	buffer->page_count = 0;
111*4882a593Smuzhiyun 	buffer->page_count_mapped = 0;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_buffer_destroy);
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun /* Convert DMA address to offset into virtually contiguous buffer. */
fw_iso_buffer_lookup(struct fw_iso_buffer * buffer,dma_addr_t completed)116*4882a593Smuzhiyun size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	size_t i;
119*4882a593Smuzhiyun 	dma_addr_t address;
120*4882a593Smuzhiyun 	ssize_t offset;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	for (i = 0; i < buffer->page_count; i++) {
123*4882a593Smuzhiyun 		address = page_private(buffer->pages[i]);
124*4882a593Smuzhiyun 		offset = (ssize_t)completed - (ssize_t)address;
125*4882a593Smuzhiyun 		if (offset > 0 && offset <= PAGE_SIZE)
126*4882a593Smuzhiyun 			return (i << PAGE_SHIFT) + offset;
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	return 0;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
fw_iso_context_create(struct fw_card * card,int type,int channel,int speed,size_t header_size,fw_iso_callback_t callback,void * callback_data)132*4882a593Smuzhiyun struct fw_iso_context *fw_iso_context_create(struct fw_card *card,
133*4882a593Smuzhiyun 		int type, int channel, int speed, size_t header_size,
134*4882a593Smuzhiyun 		fw_iso_callback_t callback, void *callback_data)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	struct fw_iso_context *ctx;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	ctx = card->driver->allocate_iso_context(card,
139*4882a593Smuzhiyun 						 type, channel, header_size);
140*4882a593Smuzhiyun 	if (IS_ERR(ctx))
141*4882a593Smuzhiyun 		return ctx;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	ctx->card = card;
144*4882a593Smuzhiyun 	ctx->type = type;
145*4882a593Smuzhiyun 	ctx->channel = channel;
146*4882a593Smuzhiyun 	ctx->speed = speed;
147*4882a593Smuzhiyun 	ctx->header_size = header_size;
148*4882a593Smuzhiyun 	ctx->callback.sc = callback;
149*4882a593Smuzhiyun 	ctx->callback_data = callback_data;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	return ctx;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_context_create);
154*4882a593Smuzhiyun 
fw_iso_context_destroy(struct fw_iso_context * ctx)155*4882a593Smuzhiyun void fw_iso_context_destroy(struct fw_iso_context *ctx)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	ctx->card->driver->free_iso_context(ctx);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_context_destroy);
160*4882a593Smuzhiyun 
fw_iso_context_start(struct fw_iso_context * ctx,int cycle,int sync,int tags)161*4882a593Smuzhiyun int fw_iso_context_start(struct fw_iso_context *ctx,
162*4882a593Smuzhiyun 			 int cycle, int sync, int tags)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	return ctx->card->driver->start_iso(ctx, cycle, sync, tags);
165*4882a593Smuzhiyun }
166*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_context_start);
167*4882a593Smuzhiyun 
fw_iso_context_set_channels(struct fw_iso_context * ctx,u64 * channels)168*4882a593Smuzhiyun int fw_iso_context_set_channels(struct fw_iso_context *ctx, u64 *channels)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	return ctx->card->driver->set_iso_channels(ctx, channels);
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
fw_iso_context_queue(struct fw_iso_context * ctx,struct fw_iso_packet * packet,struct fw_iso_buffer * buffer,unsigned long payload)173*4882a593Smuzhiyun int fw_iso_context_queue(struct fw_iso_context *ctx,
174*4882a593Smuzhiyun 			 struct fw_iso_packet *packet,
175*4882a593Smuzhiyun 			 struct fw_iso_buffer *buffer,
176*4882a593Smuzhiyun 			 unsigned long payload)
177*4882a593Smuzhiyun {
178*4882a593Smuzhiyun 	return ctx->card->driver->queue_iso(ctx, packet, buffer, payload);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_context_queue);
181*4882a593Smuzhiyun 
fw_iso_context_queue_flush(struct fw_iso_context * ctx)182*4882a593Smuzhiyun void fw_iso_context_queue_flush(struct fw_iso_context *ctx)
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun 	ctx->card->driver->flush_queue_iso(ctx);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_context_queue_flush);
187*4882a593Smuzhiyun 
fw_iso_context_flush_completions(struct fw_iso_context * ctx)188*4882a593Smuzhiyun int fw_iso_context_flush_completions(struct fw_iso_context *ctx)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	return ctx->card->driver->flush_iso_completions(ctx);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_context_flush_completions);
193*4882a593Smuzhiyun 
fw_iso_context_stop(struct fw_iso_context * ctx)194*4882a593Smuzhiyun int fw_iso_context_stop(struct fw_iso_context *ctx)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun 	return ctx->card->driver->stop_iso(ctx);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_context_stop);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun /*
201*4882a593Smuzhiyun  * Isochronous bus resource management (channels, bandwidth), client side
202*4882a593Smuzhiyun  */
203*4882a593Smuzhiyun 
manage_bandwidth(struct fw_card * card,int irm_id,int generation,int bandwidth,bool allocate)204*4882a593Smuzhiyun static int manage_bandwidth(struct fw_card *card, int irm_id, int generation,
205*4882a593Smuzhiyun 			    int bandwidth, bool allocate)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0;
208*4882a593Smuzhiyun 	__be32 data[2];
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	/*
211*4882a593Smuzhiyun 	 * On a 1394a IRM with low contention, try < 1 is enough.
212*4882a593Smuzhiyun 	 * On a 1394-1995 IRM, we need at least try < 2.
213*4882a593Smuzhiyun 	 * Let's just do try < 5.
214*4882a593Smuzhiyun 	 */
215*4882a593Smuzhiyun 	for (try = 0; try < 5; try++) {
216*4882a593Smuzhiyun 		new = allocate ? old - bandwidth : old + bandwidth;
217*4882a593Smuzhiyun 		if (new < 0 || new > BANDWIDTH_AVAILABLE_INITIAL)
218*4882a593Smuzhiyun 			return -EBUSY;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 		data[0] = cpu_to_be32(old);
221*4882a593Smuzhiyun 		data[1] = cpu_to_be32(new);
222*4882a593Smuzhiyun 		switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
223*4882a593Smuzhiyun 				irm_id, generation, SCODE_100,
224*4882a593Smuzhiyun 				CSR_REGISTER_BASE + CSR_BANDWIDTH_AVAILABLE,
225*4882a593Smuzhiyun 				data, 8)) {
226*4882a593Smuzhiyun 		case RCODE_GENERATION:
227*4882a593Smuzhiyun 			/* A generation change frees all bandwidth. */
228*4882a593Smuzhiyun 			return allocate ? -EAGAIN : bandwidth;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 		case RCODE_COMPLETE:
231*4882a593Smuzhiyun 			if (be32_to_cpup(data) == old)
232*4882a593Smuzhiyun 				return bandwidth;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 			old = be32_to_cpup(data);
235*4882a593Smuzhiyun 			/* Fall through. */
236*4882a593Smuzhiyun 		}
237*4882a593Smuzhiyun 	}
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	return -EIO;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun 
manage_channel(struct fw_card * card,int irm_id,int generation,u32 channels_mask,u64 offset,bool allocate)242*4882a593Smuzhiyun static int manage_channel(struct fw_card *card, int irm_id, int generation,
243*4882a593Smuzhiyun 		u32 channels_mask, u64 offset, bool allocate)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	__be32 bit, all, old;
246*4882a593Smuzhiyun 	__be32 data[2];
247*4882a593Smuzhiyun 	int channel, ret = -EIO, retry = 5;
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	old = all = allocate ? cpu_to_be32(~0) : 0;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	for (channel = 0; channel < 32; channel++) {
252*4882a593Smuzhiyun 		if (!(channels_mask & 1 << channel))
253*4882a593Smuzhiyun 			continue;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 		ret = -EBUSY;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 		bit = cpu_to_be32(1 << (31 - channel));
258*4882a593Smuzhiyun 		if ((old & bit) != (all & bit))
259*4882a593Smuzhiyun 			continue;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 		data[0] = old;
262*4882a593Smuzhiyun 		data[1] = old ^ bit;
263*4882a593Smuzhiyun 		switch (fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP,
264*4882a593Smuzhiyun 					   irm_id, generation, SCODE_100,
265*4882a593Smuzhiyun 					   offset, data, 8)) {
266*4882a593Smuzhiyun 		case RCODE_GENERATION:
267*4882a593Smuzhiyun 			/* A generation change frees all channels. */
268*4882a593Smuzhiyun 			return allocate ? -EAGAIN : channel;
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 		case RCODE_COMPLETE:
271*4882a593Smuzhiyun 			if (data[0] == old)
272*4882a593Smuzhiyun 				return channel;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 			old = data[0];
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 			/* Is the IRM 1394a-2000 compliant? */
277*4882a593Smuzhiyun 			if ((data[0] & bit) == (data[1] & bit))
278*4882a593Smuzhiyun 				continue;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 			fallthrough;	/* It's a 1394-1995 IRM, retry */
281*4882a593Smuzhiyun 		default:
282*4882a593Smuzhiyun 			if (retry) {
283*4882a593Smuzhiyun 				retry--;
284*4882a593Smuzhiyun 				channel--;
285*4882a593Smuzhiyun 			} else {
286*4882a593Smuzhiyun 				ret = -EIO;
287*4882a593Smuzhiyun 			}
288*4882a593Smuzhiyun 		}
289*4882a593Smuzhiyun 	}
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	return ret;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun 
deallocate_channel(struct fw_card * card,int irm_id,int generation,int channel)294*4882a593Smuzhiyun static void deallocate_channel(struct fw_card *card, int irm_id,
295*4882a593Smuzhiyun 			       int generation, int channel)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun 	u32 mask;
298*4882a593Smuzhiyun 	u64 offset;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	mask = channel < 32 ? 1 << channel : 1 << (channel - 32);
301*4882a593Smuzhiyun 	offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI :
302*4882a593Smuzhiyun 				CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO;
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	manage_channel(card, irm_id, generation, mask, offset, false);
305*4882a593Smuzhiyun }
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun /**
308*4882a593Smuzhiyun  * fw_iso_resource_manage() - Allocate or deallocate a channel and/or bandwidth
309*4882a593Smuzhiyun  * @card: card interface for this action
310*4882a593Smuzhiyun  * @generation: bus generation
311*4882a593Smuzhiyun  * @channels_mask: bitmask for channel allocation
312*4882a593Smuzhiyun  * @channel: pointer for returning channel allocation result
313*4882a593Smuzhiyun  * @bandwidth: pointer for returning bandwidth allocation result
314*4882a593Smuzhiyun  * @allocate: whether to allocate (true) or deallocate (false)
315*4882a593Smuzhiyun  *
316*4882a593Smuzhiyun  * In parameters: card, generation, channels_mask, bandwidth, allocate
317*4882a593Smuzhiyun  * Out parameters: channel, bandwidth
318*4882a593Smuzhiyun  *
319*4882a593Smuzhiyun  * This function blocks (sleeps) during communication with the IRM.
320*4882a593Smuzhiyun  *
321*4882a593Smuzhiyun  * Allocates or deallocates at most one channel out of channels_mask.
322*4882a593Smuzhiyun  * channels_mask is a bitfield with MSB for channel 63 and LSB for channel 0.
323*4882a593Smuzhiyun  * (Note, the IRM's CHANNELS_AVAILABLE is a big-endian bitfield with MSB for
324*4882a593Smuzhiyun  * channel 0 and LSB for channel 63.)
325*4882a593Smuzhiyun  * Allocates or deallocates as many bandwidth allocation units as specified.
326*4882a593Smuzhiyun  *
327*4882a593Smuzhiyun  * Returns channel < 0 if no channel was allocated or deallocated.
328*4882a593Smuzhiyun  * Returns bandwidth = 0 if no bandwidth was allocated or deallocated.
329*4882a593Smuzhiyun  *
330*4882a593Smuzhiyun  * If generation is stale, deallocations succeed but allocations fail with
331*4882a593Smuzhiyun  * channel = -EAGAIN.
332*4882a593Smuzhiyun  *
333*4882a593Smuzhiyun  * If channel allocation fails, no bandwidth will be allocated either.
334*4882a593Smuzhiyun  * If bandwidth allocation fails, no channel will be allocated either.
335*4882a593Smuzhiyun  * But deallocations of channel and bandwidth are tried independently
336*4882a593Smuzhiyun  * of each other's success.
337*4882a593Smuzhiyun  */
fw_iso_resource_manage(struct fw_card * card,int generation,u64 channels_mask,int * channel,int * bandwidth,bool allocate)338*4882a593Smuzhiyun void fw_iso_resource_manage(struct fw_card *card, int generation,
339*4882a593Smuzhiyun 			    u64 channels_mask, int *channel, int *bandwidth,
340*4882a593Smuzhiyun 			    bool allocate)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	u32 channels_hi = channels_mask;	/* channels 31...0 */
343*4882a593Smuzhiyun 	u32 channels_lo = channels_mask >> 32;	/* channels 63...32 */
344*4882a593Smuzhiyun 	int irm_id, ret, c = -EINVAL;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	spin_lock_irq(&card->lock);
347*4882a593Smuzhiyun 	irm_id = card->irm_node->node_id;
348*4882a593Smuzhiyun 	spin_unlock_irq(&card->lock);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	if (channels_hi)
351*4882a593Smuzhiyun 		c = manage_channel(card, irm_id, generation, channels_hi,
352*4882a593Smuzhiyun 				CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI,
353*4882a593Smuzhiyun 				allocate);
354*4882a593Smuzhiyun 	if (channels_lo && c < 0) {
355*4882a593Smuzhiyun 		c = manage_channel(card, irm_id, generation, channels_lo,
356*4882a593Smuzhiyun 				CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO,
357*4882a593Smuzhiyun 				allocate);
358*4882a593Smuzhiyun 		if (c >= 0)
359*4882a593Smuzhiyun 			c += 32;
360*4882a593Smuzhiyun 	}
361*4882a593Smuzhiyun 	*channel = c;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	if (allocate && channels_mask != 0 && c < 0)
364*4882a593Smuzhiyun 		*bandwidth = 0;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	if (*bandwidth == 0)
367*4882a593Smuzhiyun 		return;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate);
370*4882a593Smuzhiyun 	if (ret < 0)
371*4882a593Smuzhiyun 		*bandwidth = 0;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	if (allocate && ret < 0) {
374*4882a593Smuzhiyun 		if (c >= 0)
375*4882a593Smuzhiyun 			deallocate_channel(card, irm_id, generation, c);
376*4882a593Smuzhiyun 		*channel = ret;
377*4882a593Smuzhiyun 	}
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun EXPORT_SYMBOL(fw_iso_resource_manage);
380