1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) 2005, 2006 Linux Networx (http://lnxi.com)
3*4882a593Smuzhiyun * This file may be distributed under the terms of the
4*4882a593Smuzhiyun * GNU General Public License.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Written Doug Thompson <norsk5@xmission.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/edac.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/ctype.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "edac_pci.h"
15*4882a593Smuzhiyun #include "edac_module.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define EDAC_PCI_SYMLINK "device"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /* data variables exported via sysfs */
20*4882a593Smuzhiyun static int check_pci_errors; /* default NO check PCI parity */
21*4882a593Smuzhiyun static int edac_pci_panic_on_pe; /* default NO panic on PCI Parity */
22*4882a593Smuzhiyun static int edac_pci_log_pe = 1; /* log PCI parity errors */
23*4882a593Smuzhiyun static int edac_pci_log_npe = 1; /* log PCI non-parity error errors */
24*4882a593Smuzhiyun static int edac_pci_poll_msec = 1000; /* one second workq period */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun static atomic_t pci_parity_count = ATOMIC_INIT(0);
27*4882a593Smuzhiyun static atomic_t pci_nonparity_count = ATOMIC_INIT(0);
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun static struct kobject *edac_pci_top_main_kobj;
30*4882a593Smuzhiyun static atomic_t edac_pci_sysfs_refcount = ATOMIC_INIT(0);
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun /* getter functions for the data variables */
edac_pci_get_check_errors(void)33*4882a593Smuzhiyun int edac_pci_get_check_errors(void)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun return check_pci_errors;
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
edac_pci_get_log_pe(void)38*4882a593Smuzhiyun static int edac_pci_get_log_pe(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun return edac_pci_log_pe;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
edac_pci_get_log_npe(void)43*4882a593Smuzhiyun static int edac_pci_get_log_npe(void)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return edac_pci_log_npe;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
edac_pci_get_panic_on_pe(void)48*4882a593Smuzhiyun static int edac_pci_get_panic_on_pe(void)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun return edac_pci_panic_on_pe;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
edac_pci_get_poll_msec(void)53*4882a593Smuzhiyun int edac_pci_get_poll_msec(void)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun return edac_pci_poll_msec;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /**************************** EDAC PCI sysfs instance *******************/
instance_pe_count_show(struct edac_pci_ctl_info * pci,char * data)59*4882a593Smuzhiyun static ssize_t instance_pe_count_show(struct edac_pci_ctl_info *pci, char *data)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun return sprintf(data, "%u\n", atomic_read(&pci->counters.pe_count));
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
instance_npe_count_show(struct edac_pci_ctl_info * pci,char * data)64*4882a593Smuzhiyun static ssize_t instance_npe_count_show(struct edac_pci_ctl_info *pci,
65*4882a593Smuzhiyun char *data)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun return sprintf(data, "%u\n", atomic_read(&pci->counters.npe_count));
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun #define to_instance(k) container_of(k, struct edac_pci_ctl_info, kobj)
71*4882a593Smuzhiyun #define to_instance_attr(a) container_of(a, struct instance_attribute, attr)
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /* DEVICE instance kobject release() function */
edac_pci_instance_release(struct kobject * kobj)74*4882a593Smuzhiyun static void edac_pci_instance_release(struct kobject *kobj)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun struct edac_pci_ctl_info *pci;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun edac_dbg(0, "\n");
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun /* Form pointer to containing struct, the pci control struct */
81*4882a593Smuzhiyun pci = to_instance(kobj);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* decrement reference count on top main kobj */
84*4882a593Smuzhiyun kobject_put(edac_pci_top_main_kobj);
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun kfree(pci); /* Free the control struct */
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun /* instance specific attribute structure */
90*4882a593Smuzhiyun struct instance_attribute {
91*4882a593Smuzhiyun struct attribute attr;
92*4882a593Smuzhiyun ssize_t(*show) (struct edac_pci_ctl_info *, char *);
93*4882a593Smuzhiyun ssize_t(*store) (struct edac_pci_ctl_info *, const char *, size_t);
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun /* Function to 'show' fields from the edac_pci 'instance' structure */
edac_pci_instance_show(struct kobject * kobj,struct attribute * attr,char * buffer)97*4882a593Smuzhiyun static ssize_t edac_pci_instance_show(struct kobject *kobj,
98*4882a593Smuzhiyun struct attribute *attr, char *buffer)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun struct edac_pci_ctl_info *pci = to_instance(kobj);
101*4882a593Smuzhiyun struct instance_attribute *instance_attr = to_instance_attr(attr);
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun if (instance_attr->show)
104*4882a593Smuzhiyun return instance_attr->show(pci, buffer);
105*4882a593Smuzhiyun return -EIO;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* Function to 'store' fields into the edac_pci 'instance' structure */
edac_pci_instance_store(struct kobject * kobj,struct attribute * attr,const char * buffer,size_t count)109*4882a593Smuzhiyun static ssize_t edac_pci_instance_store(struct kobject *kobj,
110*4882a593Smuzhiyun struct attribute *attr,
111*4882a593Smuzhiyun const char *buffer, size_t count)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun struct edac_pci_ctl_info *pci = to_instance(kobj);
114*4882a593Smuzhiyun struct instance_attribute *instance_attr = to_instance_attr(attr);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun if (instance_attr->store)
117*4882a593Smuzhiyun return instance_attr->store(pci, buffer, count);
118*4882a593Smuzhiyun return -EIO;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* fs_ops table */
122*4882a593Smuzhiyun static const struct sysfs_ops pci_instance_ops = {
123*4882a593Smuzhiyun .show = edac_pci_instance_show,
124*4882a593Smuzhiyun .store = edac_pci_instance_store
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #define INSTANCE_ATTR(_name, _mode, _show, _store) \
128*4882a593Smuzhiyun static struct instance_attribute attr_instance_##_name = { \
129*4882a593Smuzhiyun .attr = {.name = __stringify(_name), .mode = _mode }, \
130*4882a593Smuzhiyun .show = _show, \
131*4882a593Smuzhiyun .store = _store, \
132*4882a593Smuzhiyun };
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun INSTANCE_ATTR(pe_count, S_IRUGO, instance_pe_count_show, NULL);
135*4882a593Smuzhiyun INSTANCE_ATTR(npe_count, S_IRUGO, instance_npe_count_show, NULL);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* pci instance attributes */
138*4882a593Smuzhiyun static struct instance_attribute *pci_instance_attr[] = {
139*4882a593Smuzhiyun &attr_instance_pe_count,
140*4882a593Smuzhiyun &attr_instance_npe_count,
141*4882a593Smuzhiyun NULL
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* the ktype for a pci instance */
145*4882a593Smuzhiyun static struct kobj_type ktype_pci_instance = {
146*4882a593Smuzhiyun .release = edac_pci_instance_release,
147*4882a593Smuzhiyun .sysfs_ops = &pci_instance_ops,
148*4882a593Smuzhiyun .default_attrs = (struct attribute **)pci_instance_attr,
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun * edac_pci_create_instance_kobj
153*4882a593Smuzhiyun *
154*4882a593Smuzhiyun * construct one EDAC PCI instance's kobject for use
155*4882a593Smuzhiyun */
edac_pci_create_instance_kobj(struct edac_pci_ctl_info * pci,int idx)156*4882a593Smuzhiyun static int edac_pci_create_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun struct kobject *main_kobj;
159*4882a593Smuzhiyun int err;
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun edac_dbg(0, "\n");
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun /* First bump the ref count on the top main kobj, which will
164*4882a593Smuzhiyun * track the number of PCI instances we have, and thus nest
165*4882a593Smuzhiyun * properly on keeping the module loaded
166*4882a593Smuzhiyun */
167*4882a593Smuzhiyun main_kobj = kobject_get(edac_pci_top_main_kobj);
168*4882a593Smuzhiyun if (!main_kobj) {
169*4882a593Smuzhiyun err = -ENODEV;
170*4882a593Smuzhiyun goto error_out;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* And now register this new kobject under the main kobj */
174*4882a593Smuzhiyun err = kobject_init_and_add(&pci->kobj, &ktype_pci_instance,
175*4882a593Smuzhiyun edac_pci_top_main_kobj, "pci%d", idx);
176*4882a593Smuzhiyun if (err != 0) {
177*4882a593Smuzhiyun edac_dbg(2, "failed to register instance pci%d\n", idx);
178*4882a593Smuzhiyun kobject_put(edac_pci_top_main_kobj);
179*4882a593Smuzhiyun goto error_out;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun kobject_uevent(&pci->kobj, KOBJ_ADD);
183*4882a593Smuzhiyun edac_dbg(1, "Register instance 'pci%d' kobject\n", idx);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return 0;
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* Error unwind statck */
188*4882a593Smuzhiyun error_out:
189*4882a593Smuzhiyun return err;
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /*
193*4882a593Smuzhiyun * edac_pci_unregister_sysfs_instance_kobj
194*4882a593Smuzhiyun *
195*4882a593Smuzhiyun * unregister the kobj for the EDAC PCI instance
196*4882a593Smuzhiyun */
edac_pci_unregister_sysfs_instance_kobj(struct edac_pci_ctl_info * pci)197*4882a593Smuzhiyun static void edac_pci_unregister_sysfs_instance_kobj(
198*4882a593Smuzhiyun struct edac_pci_ctl_info *pci)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun edac_dbg(0, "\n");
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /* Unregister the instance kobject and allow its release
203*4882a593Smuzhiyun * function release the main reference count and then
204*4882a593Smuzhiyun * kfree the memory
205*4882a593Smuzhiyun */
206*4882a593Smuzhiyun kobject_put(&pci->kobj);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /***************************** EDAC PCI sysfs root **********************/
210*4882a593Smuzhiyun #define to_edacpci(k) container_of(k, struct edac_pci_ctl_info, kobj)
211*4882a593Smuzhiyun #define to_edacpci_attr(a) container_of(a, struct edac_pci_attr, attr)
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /* simple show/store functions for attributes */
edac_pci_int_show(void * ptr,char * buffer)214*4882a593Smuzhiyun static ssize_t edac_pci_int_show(void *ptr, char *buffer)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun int *value = ptr;
217*4882a593Smuzhiyun return sprintf(buffer, "%d\n", *value);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun
edac_pci_int_store(void * ptr,const char * buffer,size_t count)220*4882a593Smuzhiyun static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun int *value = ptr;
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun if (isdigit(*buffer))
225*4882a593Smuzhiyun *value = simple_strtoul(buffer, NULL, 0);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun return count;
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun struct edac_pci_dev_attribute {
231*4882a593Smuzhiyun struct attribute attr;
232*4882a593Smuzhiyun void *value;
233*4882a593Smuzhiyun ssize_t(*show) (void *, char *);
234*4882a593Smuzhiyun ssize_t(*store) (void *, const char *, size_t);
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /* Set of show/store abstract level functions for PCI Parity object */
edac_pci_dev_show(struct kobject * kobj,struct attribute * attr,char * buffer)238*4882a593Smuzhiyun static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
239*4882a593Smuzhiyun char *buffer)
240*4882a593Smuzhiyun {
241*4882a593Smuzhiyun struct edac_pci_dev_attribute *edac_pci_dev;
242*4882a593Smuzhiyun edac_pci_dev = (struct edac_pci_dev_attribute *)attr;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun if (edac_pci_dev->show)
245*4882a593Smuzhiyun return edac_pci_dev->show(edac_pci_dev->value, buffer);
246*4882a593Smuzhiyun return -EIO;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
edac_pci_dev_store(struct kobject * kobj,struct attribute * attr,const char * buffer,size_t count)249*4882a593Smuzhiyun static ssize_t edac_pci_dev_store(struct kobject *kobj,
250*4882a593Smuzhiyun struct attribute *attr, const char *buffer,
251*4882a593Smuzhiyun size_t count)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun struct edac_pci_dev_attribute *edac_pci_dev;
254*4882a593Smuzhiyun edac_pci_dev = (struct edac_pci_dev_attribute *)attr;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (edac_pci_dev->store)
257*4882a593Smuzhiyun return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
258*4882a593Smuzhiyun return -EIO;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun static const struct sysfs_ops edac_pci_sysfs_ops = {
262*4882a593Smuzhiyun .show = edac_pci_dev_show,
263*4882a593Smuzhiyun .store = edac_pci_dev_store
264*4882a593Smuzhiyun };
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
267*4882a593Smuzhiyun static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
268*4882a593Smuzhiyun .attr = {.name = __stringify(_name), .mode = _mode }, \
269*4882a593Smuzhiyun .value = &_name, \
270*4882a593Smuzhiyun .show = _show, \
271*4882a593Smuzhiyun .store = _store, \
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
275*4882a593Smuzhiyun static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
276*4882a593Smuzhiyun .attr = {.name = __stringify(_name), .mode = _mode }, \
277*4882a593Smuzhiyun .value = _data, \
278*4882a593Smuzhiyun .show = _show, \
279*4882a593Smuzhiyun .store = _store, \
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* PCI Parity control files */
283*4882a593Smuzhiyun EDAC_PCI_ATTR(check_pci_errors, S_IRUGO | S_IWUSR, edac_pci_int_show,
284*4882a593Smuzhiyun edac_pci_int_store);
285*4882a593Smuzhiyun EDAC_PCI_ATTR(edac_pci_log_pe, S_IRUGO | S_IWUSR, edac_pci_int_show,
286*4882a593Smuzhiyun edac_pci_int_store);
287*4882a593Smuzhiyun EDAC_PCI_ATTR(edac_pci_log_npe, S_IRUGO | S_IWUSR, edac_pci_int_show,
288*4882a593Smuzhiyun edac_pci_int_store);
289*4882a593Smuzhiyun EDAC_PCI_ATTR(edac_pci_panic_on_pe, S_IRUGO | S_IWUSR, edac_pci_int_show,
290*4882a593Smuzhiyun edac_pci_int_store);
291*4882a593Smuzhiyun EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
292*4882a593Smuzhiyun EDAC_PCI_ATTR(pci_nonparity_count, S_IRUGO, edac_pci_int_show, NULL);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun /* Base Attributes of the memory ECC object */
295*4882a593Smuzhiyun static struct edac_pci_dev_attribute *edac_pci_attr[] = {
296*4882a593Smuzhiyun &edac_pci_attr_check_pci_errors,
297*4882a593Smuzhiyun &edac_pci_attr_edac_pci_log_pe,
298*4882a593Smuzhiyun &edac_pci_attr_edac_pci_log_npe,
299*4882a593Smuzhiyun &edac_pci_attr_edac_pci_panic_on_pe,
300*4882a593Smuzhiyun &edac_pci_attr_pci_parity_count,
301*4882a593Smuzhiyun &edac_pci_attr_pci_nonparity_count,
302*4882a593Smuzhiyun NULL,
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun /*
306*4882a593Smuzhiyun * edac_pci_release_main_kobj
307*4882a593Smuzhiyun *
308*4882a593Smuzhiyun * This release function is called when the reference count to the
309*4882a593Smuzhiyun * passed kobj goes to zero.
310*4882a593Smuzhiyun *
311*4882a593Smuzhiyun * This kobj is the 'main' kobject that EDAC PCI instances
312*4882a593Smuzhiyun * link to, and thus provide for proper nesting counts
313*4882a593Smuzhiyun */
edac_pci_release_main_kobj(struct kobject * kobj)314*4882a593Smuzhiyun static void edac_pci_release_main_kobj(struct kobject *kobj)
315*4882a593Smuzhiyun {
316*4882a593Smuzhiyun edac_dbg(0, "here to module_put(THIS_MODULE)\n");
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun kfree(kobj);
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun /* last reference to top EDAC PCI kobject has been removed,
321*4882a593Smuzhiyun * NOW release our ref count on the core module
322*4882a593Smuzhiyun */
323*4882a593Smuzhiyun module_put(THIS_MODULE);
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun /* ktype struct for the EDAC PCI main kobj */
327*4882a593Smuzhiyun static struct kobj_type ktype_edac_pci_main_kobj = {
328*4882a593Smuzhiyun .release = edac_pci_release_main_kobj,
329*4882a593Smuzhiyun .sysfs_ops = &edac_pci_sysfs_ops,
330*4882a593Smuzhiyun .default_attrs = (struct attribute **)edac_pci_attr,
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun /**
334*4882a593Smuzhiyun * edac_pci_main_kobj_setup: Setup the sysfs for EDAC PCI attributes.
335*4882a593Smuzhiyun */
edac_pci_main_kobj_setup(void)336*4882a593Smuzhiyun static int edac_pci_main_kobj_setup(void)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun int err;
339*4882a593Smuzhiyun struct bus_type *edac_subsys;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun edac_dbg(0, "\n");
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /* check and count if we have already created the main kobject */
344*4882a593Smuzhiyun if (atomic_inc_return(&edac_pci_sysfs_refcount) != 1)
345*4882a593Smuzhiyun return 0;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun /* First time, so create the main kobject and its
348*4882a593Smuzhiyun * controls and attributes
349*4882a593Smuzhiyun */
350*4882a593Smuzhiyun edac_subsys = edac_get_sysfs_subsys();
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /* Bump the reference count on this module to ensure the
353*4882a593Smuzhiyun * modules isn't unloaded until we deconstruct the top
354*4882a593Smuzhiyun * level main kobj for EDAC PCI
355*4882a593Smuzhiyun */
356*4882a593Smuzhiyun if (!try_module_get(THIS_MODULE)) {
357*4882a593Smuzhiyun edac_dbg(1, "try_module_get() failed\n");
358*4882a593Smuzhiyun err = -ENODEV;
359*4882a593Smuzhiyun goto decrement_count_fail;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun edac_pci_top_main_kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
363*4882a593Smuzhiyun if (!edac_pci_top_main_kobj) {
364*4882a593Smuzhiyun edac_dbg(1, "Failed to allocate\n");
365*4882a593Smuzhiyun err = -ENOMEM;
366*4882a593Smuzhiyun goto kzalloc_fail;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /* Instanstiate the pci object */
370*4882a593Smuzhiyun err = kobject_init_and_add(edac_pci_top_main_kobj,
371*4882a593Smuzhiyun &ktype_edac_pci_main_kobj,
372*4882a593Smuzhiyun &edac_subsys->dev_root->kobj, "pci");
373*4882a593Smuzhiyun if (err) {
374*4882a593Smuzhiyun edac_dbg(1, "Failed to register '.../edac/pci'\n");
375*4882a593Smuzhiyun goto kobject_init_and_add_fail;
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /* At this point, to 'release' the top level kobject
379*4882a593Smuzhiyun * for EDAC PCI, then edac_pci_main_kobj_teardown()
380*4882a593Smuzhiyun * must be used, for resources to be cleaned up properly
381*4882a593Smuzhiyun */
382*4882a593Smuzhiyun kobject_uevent(edac_pci_top_main_kobj, KOBJ_ADD);
383*4882a593Smuzhiyun edac_dbg(1, "Registered '.../edac/pci' kobject\n");
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun return 0;
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun /* Error unwind statck */
388*4882a593Smuzhiyun kobject_init_and_add_fail:
389*4882a593Smuzhiyun kobject_put(edac_pci_top_main_kobj);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun kzalloc_fail:
392*4882a593Smuzhiyun module_put(THIS_MODULE);
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun decrement_count_fail:
395*4882a593Smuzhiyun /* if are on this error exit, nothing to tear down */
396*4882a593Smuzhiyun atomic_dec(&edac_pci_sysfs_refcount);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun return err;
399*4882a593Smuzhiyun }
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun /*
402*4882a593Smuzhiyun * edac_pci_main_kobj_teardown()
403*4882a593Smuzhiyun *
404*4882a593Smuzhiyun * if no longer linked (needed) remove the top level EDAC PCI
405*4882a593Smuzhiyun * kobject with its controls and attributes
406*4882a593Smuzhiyun */
edac_pci_main_kobj_teardown(void)407*4882a593Smuzhiyun static void edac_pci_main_kobj_teardown(void)
408*4882a593Smuzhiyun {
409*4882a593Smuzhiyun edac_dbg(0, "\n");
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun /* Decrement the count and only if no more controller instances
412*4882a593Smuzhiyun * are connected perform the unregisteration of the top level
413*4882a593Smuzhiyun * main kobj
414*4882a593Smuzhiyun */
415*4882a593Smuzhiyun if (atomic_dec_return(&edac_pci_sysfs_refcount) == 0) {
416*4882a593Smuzhiyun edac_dbg(0, "called kobject_put on main kobj\n");
417*4882a593Smuzhiyun kobject_put(edac_pci_top_main_kobj);
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
edac_pci_create_sysfs(struct edac_pci_ctl_info * pci)421*4882a593Smuzhiyun int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun int err;
424*4882a593Smuzhiyun struct kobject *edac_kobj = &pci->kobj;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun edac_dbg(0, "idx=%d\n", pci->pci_idx);
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun /* create the top main EDAC PCI kobject, IF needed */
429*4882a593Smuzhiyun err = edac_pci_main_kobj_setup();
430*4882a593Smuzhiyun if (err)
431*4882a593Smuzhiyun return err;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun /* Create this instance's kobject under the MAIN kobject */
434*4882a593Smuzhiyun err = edac_pci_create_instance_kobj(pci, pci->pci_idx);
435*4882a593Smuzhiyun if (err)
436*4882a593Smuzhiyun goto unregister_cleanup;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun err = sysfs_create_link(edac_kobj, &pci->dev->kobj, EDAC_PCI_SYMLINK);
439*4882a593Smuzhiyun if (err) {
440*4882a593Smuzhiyun edac_dbg(0, "sysfs_create_link() returned err= %d\n", err);
441*4882a593Smuzhiyun goto symlink_fail;
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun return 0;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun /* Error unwind stack */
447*4882a593Smuzhiyun symlink_fail:
448*4882a593Smuzhiyun edac_pci_unregister_sysfs_instance_kobj(pci);
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun unregister_cleanup:
451*4882a593Smuzhiyun edac_pci_main_kobj_teardown();
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun return err;
454*4882a593Smuzhiyun }
455*4882a593Smuzhiyun
edac_pci_remove_sysfs(struct edac_pci_ctl_info * pci)456*4882a593Smuzhiyun void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun edac_dbg(0, "index=%d\n", pci->pci_idx);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun /* Remove the symlink */
461*4882a593Smuzhiyun sysfs_remove_link(&pci->kobj, EDAC_PCI_SYMLINK);
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun /* remove this PCI instance's sysfs entries */
464*4882a593Smuzhiyun edac_pci_unregister_sysfs_instance_kobj(pci);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun /* Call the main unregister function, which will determine
467*4882a593Smuzhiyun * if this 'pci' is the last instance.
468*4882a593Smuzhiyun * If it is, the main kobject will be unregistered as a result
469*4882a593Smuzhiyun */
470*4882a593Smuzhiyun edac_dbg(0, "calling edac_pci_main_kobj_teardown()\n");
471*4882a593Smuzhiyun edac_pci_main_kobj_teardown();
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun /************************ PCI error handling *************************/
get_pci_parity_status(struct pci_dev * dev,int secondary)475*4882a593Smuzhiyun static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
476*4882a593Smuzhiyun {
477*4882a593Smuzhiyun int where;
478*4882a593Smuzhiyun u16 status;
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
481*4882a593Smuzhiyun pci_read_config_word(dev, where, &status);
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /* If we get back 0xFFFF then we must suspect that the card has been
484*4882a593Smuzhiyun * pulled but the Linux PCI layer has not yet finished cleaning up.
485*4882a593Smuzhiyun * We don't want to report on such devices
486*4882a593Smuzhiyun */
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun if (status == 0xFFFF) {
489*4882a593Smuzhiyun u32 sanity;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun pci_read_config_dword(dev, 0, &sanity);
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun if (sanity == 0xFFFFFFFF)
494*4882a593Smuzhiyun return 0;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
498*4882a593Smuzhiyun PCI_STATUS_PARITY;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun if (status)
501*4882a593Smuzhiyun /* reset only the bits we are interested in */
502*4882a593Smuzhiyun pci_write_config_word(dev, where, status);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun return status;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun /* Clear any PCI parity errors logged by this device. */
edac_pci_dev_parity_clear(struct pci_dev * dev)509*4882a593Smuzhiyun static void edac_pci_dev_parity_clear(struct pci_dev *dev)
510*4882a593Smuzhiyun {
511*4882a593Smuzhiyun u8 header_type;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun get_pci_parity_status(dev, 0);
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun /* read the device TYPE, looking for bridges */
516*4882a593Smuzhiyun pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
519*4882a593Smuzhiyun get_pci_parity_status(dev, 1);
520*4882a593Smuzhiyun }
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun /*
523*4882a593Smuzhiyun * PCI Parity polling
524*4882a593Smuzhiyun *
525*4882a593Smuzhiyun * Function to retrieve the current parity status
526*4882a593Smuzhiyun * and decode it
527*4882a593Smuzhiyun *
528*4882a593Smuzhiyun */
edac_pci_dev_parity_test(struct pci_dev * dev)529*4882a593Smuzhiyun static void edac_pci_dev_parity_test(struct pci_dev *dev)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun unsigned long flags;
532*4882a593Smuzhiyun u16 status;
533*4882a593Smuzhiyun u8 header_type;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun /* stop any interrupts until we can acquire the status */
536*4882a593Smuzhiyun local_irq_save(flags);
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun /* read the STATUS register on this device */
539*4882a593Smuzhiyun status = get_pci_parity_status(dev, 0);
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun /* read the device TYPE, looking for bridges */
542*4882a593Smuzhiyun pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun local_irq_restore(flags);
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun edac_dbg(4, "PCI STATUS= 0x%04x %s\n", status, dev_name(&dev->dev));
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun /* check the status reg for errors on boards NOT marked as broken
549*4882a593Smuzhiyun * if broken, we cannot trust any of the status bits
550*4882a593Smuzhiyun */
551*4882a593Smuzhiyun if (status && !dev->broken_parity_status) {
552*4882a593Smuzhiyun if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
553*4882a593Smuzhiyun edac_printk(KERN_CRIT, EDAC_PCI,
554*4882a593Smuzhiyun "Signaled System Error on %s\n",
555*4882a593Smuzhiyun pci_name(dev));
556*4882a593Smuzhiyun atomic_inc(&pci_nonparity_count);
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun if (status & (PCI_STATUS_PARITY)) {
560*4882a593Smuzhiyun edac_printk(KERN_CRIT, EDAC_PCI,
561*4882a593Smuzhiyun "Master Data Parity Error on %s\n",
562*4882a593Smuzhiyun pci_name(dev));
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun atomic_inc(&pci_parity_count);
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
567*4882a593Smuzhiyun if (status & (PCI_STATUS_DETECTED_PARITY)) {
568*4882a593Smuzhiyun edac_printk(KERN_CRIT, EDAC_PCI,
569*4882a593Smuzhiyun "Detected Parity Error on %s\n",
570*4882a593Smuzhiyun pci_name(dev));
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun atomic_inc(&pci_parity_count);
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun edac_dbg(4, "PCI HEADER TYPE= 0x%02x %s\n",
578*4882a593Smuzhiyun header_type, dev_name(&dev->dev));
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
581*4882a593Smuzhiyun /* On bridges, need to examine secondary status register */
582*4882a593Smuzhiyun status = get_pci_parity_status(dev, 1);
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun edac_dbg(4, "PCI SEC_STATUS= 0x%04x %s\n",
585*4882a593Smuzhiyun status, dev_name(&dev->dev));
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun /* check the secondary status reg for errors,
588*4882a593Smuzhiyun * on NOT broken boards
589*4882a593Smuzhiyun */
590*4882a593Smuzhiyun if (status && !dev->broken_parity_status) {
591*4882a593Smuzhiyun if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
592*4882a593Smuzhiyun edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
593*4882a593Smuzhiyun "Signaled System Error on %s\n",
594*4882a593Smuzhiyun pci_name(dev));
595*4882a593Smuzhiyun atomic_inc(&pci_nonparity_count);
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun if (status & (PCI_STATUS_PARITY)) {
599*4882a593Smuzhiyun edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
600*4882a593Smuzhiyun "Master Data Parity Error on "
601*4882a593Smuzhiyun "%s\n", pci_name(dev));
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun atomic_inc(&pci_parity_count);
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun if (status & (PCI_STATUS_DETECTED_PARITY)) {
607*4882a593Smuzhiyun edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
608*4882a593Smuzhiyun "Detected Parity Error on %s\n",
609*4882a593Smuzhiyun pci_name(dev));
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun atomic_inc(&pci_parity_count);
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun }
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun /* reduce some complexity in definition of the iterator */
618*4882a593Smuzhiyun typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun /*
621*4882a593Smuzhiyun * pci_dev parity list iterator
622*4882a593Smuzhiyun *
623*4882a593Smuzhiyun * Scan the PCI device list looking for SERRORs, Master Parity ERRORS or
624*4882a593Smuzhiyun * Parity ERRORs on primary or secondary devices.
625*4882a593Smuzhiyun */
edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)626*4882a593Smuzhiyun static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
627*4882a593Smuzhiyun {
628*4882a593Smuzhiyun struct pci_dev *dev = NULL;
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun for_each_pci_dev(dev)
631*4882a593Smuzhiyun fn(dev);
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun /*
635*4882a593Smuzhiyun * edac_pci_do_parity_check
636*4882a593Smuzhiyun *
637*4882a593Smuzhiyun * performs the actual PCI parity check operation
638*4882a593Smuzhiyun */
edac_pci_do_parity_check(void)639*4882a593Smuzhiyun void edac_pci_do_parity_check(void)
640*4882a593Smuzhiyun {
641*4882a593Smuzhiyun int before_count;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun edac_dbg(3, "\n");
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun /* if policy has PCI check off, leave now */
646*4882a593Smuzhiyun if (!check_pci_errors)
647*4882a593Smuzhiyun return;
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun before_count = atomic_read(&pci_parity_count);
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun /* scan all PCI devices looking for a Parity Error on devices and
652*4882a593Smuzhiyun * bridges.
653*4882a593Smuzhiyun * The iterator calls pci_get_device() which might sleep, thus
654*4882a593Smuzhiyun * we cannot disable interrupts in this scan.
655*4882a593Smuzhiyun */
656*4882a593Smuzhiyun edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun /* Only if operator has selected panic on PCI Error */
659*4882a593Smuzhiyun if (edac_pci_get_panic_on_pe()) {
660*4882a593Smuzhiyun /* If the count is different 'after' from 'before' */
661*4882a593Smuzhiyun if (before_count != atomic_read(&pci_parity_count))
662*4882a593Smuzhiyun panic("EDAC: PCI Parity Error");
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun }
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun /*
667*4882a593Smuzhiyun * edac_pci_clear_parity_errors
668*4882a593Smuzhiyun *
669*4882a593Smuzhiyun * function to perform an iteration over the PCI devices
670*4882a593Smuzhiyun * and clearn their current status
671*4882a593Smuzhiyun */
edac_pci_clear_parity_errors(void)672*4882a593Smuzhiyun void edac_pci_clear_parity_errors(void)
673*4882a593Smuzhiyun {
674*4882a593Smuzhiyun /* Clear any PCI bus parity errors that devices initially have logged
675*4882a593Smuzhiyun * in their registers.
676*4882a593Smuzhiyun */
677*4882a593Smuzhiyun edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun /*
681*4882a593Smuzhiyun * edac_pci_handle_pe
682*4882a593Smuzhiyun *
683*4882a593Smuzhiyun * Called to handle a PARITY ERROR event
684*4882a593Smuzhiyun */
edac_pci_handle_pe(struct edac_pci_ctl_info * pci,const char * msg)685*4882a593Smuzhiyun void edac_pci_handle_pe(struct edac_pci_ctl_info *pci, const char *msg)
686*4882a593Smuzhiyun {
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun /* global PE counter incremented by edac_pci_do_parity_check() */
689*4882a593Smuzhiyun atomic_inc(&pci->counters.pe_count);
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun if (edac_pci_get_log_pe())
692*4882a593Smuzhiyun edac_pci_printk(pci, KERN_WARNING,
693*4882a593Smuzhiyun "Parity Error ctl: %s %d: %s\n",
694*4882a593Smuzhiyun pci->ctl_name, pci->pci_idx, msg);
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun /*
697*4882a593Smuzhiyun * poke all PCI devices and see which one is the troublemaker
698*4882a593Smuzhiyun * panic() is called if set
699*4882a593Smuzhiyun */
700*4882a593Smuzhiyun edac_pci_do_parity_check();
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(edac_pci_handle_pe);
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun /*
706*4882a593Smuzhiyun * edac_pci_handle_npe
707*4882a593Smuzhiyun *
708*4882a593Smuzhiyun * Called to handle a NON-PARITY ERROR event
709*4882a593Smuzhiyun */
edac_pci_handle_npe(struct edac_pci_ctl_info * pci,const char * msg)710*4882a593Smuzhiyun void edac_pci_handle_npe(struct edac_pci_ctl_info *pci, const char *msg)
711*4882a593Smuzhiyun {
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun /* global NPE counter incremented by edac_pci_do_parity_check() */
714*4882a593Smuzhiyun atomic_inc(&pci->counters.npe_count);
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun if (edac_pci_get_log_npe())
717*4882a593Smuzhiyun edac_pci_printk(pci, KERN_WARNING,
718*4882a593Smuzhiyun "Non-Parity Error ctl: %s %d: %s\n",
719*4882a593Smuzhiyun pci->ctl_name, pci->pci_idx, msg);
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun /*
722*4882a593Smuzhiyun * poke all PCI devices and see which one is the troublemaker
723*4882a593Smuzhiyun * panic() is called if set
724*4882a593Smuzhiyun */
725*4882a593Smuzhiyun edac_pci_do_parity_check();
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(edac_pci_handle_npe);
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun /*
730*4882a593Smuzhiyun * Define the PCI parameter to the module
731*4882a593Smuzhiyun */
732*4882a593Smuzhiyun module_param(check_pci_errors, int, 0644);
733*4882a593Smuzhiyun MODULE_PARM_DESC(check_pci_errors,
734*4882a593Smuzhiyun "Check for PCI bus parity errors: 0=off 1=on");
735*4882a593Smuzhiyun module_param(edac_pci_panic_on_pe, int, 0644);
736*4882a593Smuzhiyun MODULE_PARM_DESC(edac_pci_panic_on_pe,
737*4882a593Smuzhiyun "Panic on PCI Bus Parity error: 0=off 1=on");
738