1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
4*4882a593Smuzhiyun * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
xudma_navss_psil_pair(struct udma_dev * ud,u32 src_thread,u32 dst_thread)7*4882a593Smuzhiyun int xudma_navss_psil_pair(struct udma_dev *ud, u32 src_thread, u32 dst_thread)
8*4882a593Smuzhiyun {
9*4882a593Smuzhiyun return navss_psil_pair(ud, src_thread, dst_thread);
10*4882a593Smuzhiyun }
11*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_navss_psil_pair);
12*4882a593Smuzhiyun
xudma_navss_psil_unpair(struct udma_dev * ud,u32 src_thread,u32 dst_thread)13*4882a593Smuzhiyun int xudma_navss_psil_unpair(struct udma_dev *ud, u32 src_thread, u32 dst_thread)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun return navss_psil_unpair(ud, src_thread, dst_thread);
16*4882a593Smuzhiyun }
17*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_navss_psil_unpair);
18*4882a593Smuzhiyun
of_xudma_dev_get(struct device_node * np,const char * property)19*4882a593Smuzhiyun struct udma_dev *of_xudma_dev_get(struct device_node *np, const char *property)
20*4882a593Smuzhiyun {
21*4882a593Smuzhiyun struct device_node *udma_node = np;
22*4882a593Smuzhiyun struct platform_device *pdev;
23*4882a593Smuzhiyun struct udma_dev *ud;
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun if (property) {
26*4882a593Smuzhiyun udma_node = of_parse_phandle(np, property, 0);
27*4882a593Smuzhiyun if (!udma_node) {
28*4882a593Smuzhiyun pr_err("UDMA node is not found\n");
29*4882a593Smuzhiyun return ERR_PTR(-ENODEV);
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun pdev = of_find_device_by_node(udma_node);
34*4882a593Smuzhiyun if (np != udma_node)
35*4882a593Smuzhiyun of_node_put(udma_node);
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun if (!pdev) {
38*4882a593Smuzhiyun pr_debug("UDMA device not found\n");
39*4882a593Smuzhiyun return ERR_PTR(-EPROBE_DEFER);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun ud = platform_get_drvdata(pdev);
43*4882a593Smuzhiyun if (!ud) {
44*4882a593Smuzhiyun pr_debug("UDMA has not been probed\n");
45*4882a593Smuzhiyun put_device(&pdev->dev);
46*4882a593Smuzhiyun return ERR_PTR(-EPROBE_DEFER);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun return ud;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun EXPORT_SYMBOL(of_xudma_dev_get);
52*4882a593Smuzhiyun
xudma_dev_get_psil_base(struct udma_dev * ud)53*4882a593Smuzhiyun u32 xudma_dev_get_psil_base(struct udma_dev *ud)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun return ud->psil_base;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_dev_get_psil_base);
58*4882a593Smuzhiyun
xudma_dev_get_tisci_rm(struct udma_dev * ud)59*4882a593Smuzhiyun struct udma_tisci_rm *xudma_dev_get_tisci_rm(struct udma_dev *ud)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun return &ud->tisci_rm;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_dev_get_tisci_rm);
64*4882a593Smuzhiyun
xudma_alloc_gp_rflow_range(struct udma_dev * ud,int from,int cnt)65*4882a593Smuzhiyun int xudma_alloc_gp_rflow_range(struct udma_dev *ud, int from, int cnt)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun return __udma_alloc_gp_rflow_range(ud, from, cnt);
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_alloc_gp_rflow_range);
70*4882a593Smuzhiyun
xudma_free_gp_rflow_range(struct udma_dev * ud,int from,int cnt)71*4882a593Smuzhiyun int xudma_free_gp_rflow_range(struct udma_dev *ud, int from, int cnt)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun return __udma_free_gp_rflow_range(ud, from, cnt);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_free_gp_rflow_range);
76*4882a593Smuzhiyun
xudma_rflow_is_gp(struct udma_dev * ud,int id)77*4882a593Smuzhiyun bool xudma_rflow_is_gp(struct udma_dev *ud, int id)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun return !test_bit(id, ud->rflow_gp_map);
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_rflow_is_gp);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #define XUDMA_GET_PUT_RESOURCE(res) \
84*4882a593Smuzhiyun struct udma_##res *xudma_##res##_get(struct udma_dev *ud, int id) \
85*4882a593Smuzhiyun { \
86*4882a593Smuzhiyun return __udma_reserve_##res(ud, UDMA_TP_NORMAL, id); \
87*4882a593Smuzhiyun } \
88*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_##res##_get); \
89*4882a593Smuzhiyun \
90*4882a593Smuzhiyun void xudma_##res##_put(struct udma_dev *ud, struct udma_##res *p) \
91*4882a593Smuzhiyun { \
92*4882a593Smuzhiyun clear_bit(p->id, ud->res##_map); \
93*4882a593Smuzhiyun } \
94*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_##res##_put)
95*4882a593Smuzhiyun XUDMA_GET_PUT_RESOURCE(tchan);
96*4882a593Smuzhiyun XUDMA_GET_PUT_RESOURCE(rchan);
97*4882a593Smuzhiyun
xudma_rflow_get(struct udma_dev * ud,int id)98*4882a593Smuzhiyun struct udma_rflow *xudma_rflow_get(struct udma_dev *ud, int id)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun return __udma_get_rflow(ud, id);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_rflow_get);
103*4882a593Smuzhiyun
xudma_rflow_put(struct udma_dev * ud,struct udma_rflow * p)104*4882a593Smuzhiyun void xudma_rflow_put(struct udma_dev *ud, struct udma_rflow *p)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun __udma_put_rflow(ud, p);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_rflow_put);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun #define XUDMA_GET_RESOURCE_ID(res) \
111*4882a593Smuzhiyun int xudma_##res##_get_id(struct udma_##res *p) \
112*4882a593Smuzhiyun { \
113*4882a593Smuzhiyun return p->id; \
114*4882a593Smuzhiyun } \
115*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_##res##_get_id)
116*4882a593Smuzhiyun XUDMA_GET_RESOURCE_ID(tchan);
117*4882a593Smuzhiyun XUDMA_GET_RESOURCE_ID(rchan);
118*4882a593Smuzhiyun XUDMA_GET_RESOURCE_ID(rflow);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun /* Exported register access functions */
121*4882a593Smuzhiyun #define XUDMA_RT_IO_FUNCTIONS(res) \
122*4882a593Smuzhiyun u32 xudma_##res##rt_read(struct udma_##res *p, int reg) \
123*4882a593Smuzhiyun { \
124*4882a593Smuzhiyun if (!p) \
125*4882a593Smuzhiyun return 0; \
126*4882a593Smuzhiyun return udma_read(p->reg_rt, reg); \
127*4882a593Smuzhiyun } \
128*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_##res##rt_read); \
129*4882a593Smuzhiyun \
130*4882a593Smuzhiyun void xudma_##res##rt_write(struct udma_##res *p, int reg, u32 val) \
131*4882a593Smuzhiyun { \
132*4882a593Smuzhiyun if (!p) \
133*4882a593Smuzhiyun return; \
134*4882a593Smuzhiyun udma_write(p->reg_rt, reg, val); \
135*4882a593Smuzhiyun } \
136*4882a593Smuzhiyun EXPORT_SYMBOL(xudma_##res##rt_write)
137*4882a593Smuzhiyun XUDMA_RT_IO_FUNCTIONS(tchan);
138*4882a593Smuzhiyun XUDMA_RT_IO_FUNCTIONS(rchan);
139