xref: /OK3568_Linux_fs/kernel/drivers/dma/ti/k3-psil-j7200.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
4*4882a593Smuzhiyun  *  Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include "k3-psil-priv.h"
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define PSIL_PDMA_XY_TR(x)				\
12*4882a593Smuzhiyun 	{						\
13*4882a593Smuzhiyun 		.thread_id = x,				\
14*4882a593Smuzhiyun 		.ep_config = {				\
15*4882a593Smuzhiyun 			.ep_type = PSIL_EP_PDMA_XY,	\
16*4882a593Smuzhiyun 		},					\
17*4882a593Smuzhiyun 	}
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #define PSIL_PDMA_XY_PKT(x)				\
20*4882a593Smuzhiyun 	{						\
21*4882a593Smuzhiyun 		.thread_id = x,				\
22*4882a593Smuzhiyun 		.ep_config = {				\
23*4882a593Smuzhiyun 			.ep_type = PSIL_EP_PDMA_XY,	\
24*4882a593Smuzhiyun 			.pkt_mode = 1,			\
25*4882a593Smuzhiyun 		},					\
26*4882a593Smuzhiyun 	}
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #define PSIL_PDMA_MCASP(x)				\
29*4882a593Smuzhiyun 	{						\
30*4882a593Smuzhiyun 		.thread_id = x,				\
31*4882a593Smuzhiyun 		.ep_config = {				\
32*4882a593Smuzhiyun 			.ep_type = PSIL_EP_PDMA_XY,	\
33*4882a593Smuzhiyun 			.pdma_acc32 = 1,		\
34*4882a593Smuzhiyun 			.pdma_burst = 1,		\
35*4882a593Smuzhiyun 		},					\
36*4882a593Smuzhiyun 	}
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define PSIL_ETHERNET(x)				\
39*4882a593Smuzhiyun 	{						\
40*4882a593Smuzhiyun 		.thread_id = x,				\
41*4882a593Smuzhiyun 		.ep_config = {				\
42*4882a593Smuzhiyun 			.ep_type = PSIL_EP_NATIVE,	\
43*4882a593Smuzhiyun 			.pkt_mode = 1,			\
44*4882a593Smuzhiyun 			.needs_epib = 1,		\
45*4882a593Smuzhiyun 			.psd_size = 16,			\
46*4882a593Smuzhiyun 		},					\
47*4882a593Smuzhiyun 	}
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define PSIL_SA2UL(x, tx)				\
50*4882a593Smuzhiyun 	{						\
51*4882a593Smuzhiyun 		.thread_id = x,				\
52*4882a593Smuzhiyun 		.ep_config = {				\
53*4882a593Smuzhiyun 			.ep_type = PSIL_EP_NATIVE,	\
54*4882a593Smuzhiyun 			.pkt_mode = 1,			\
55*4882a593Smuzhiyun 			.needs_epib = 1,		\
56*4882a593Smuzhiyun 			.psd_size = 64,			\
57*4882a593Smuzhiyun 			.notdpkt = tx,			\
58*4882a593Smuzhiyun 		},					\
59*4882a593Smuzhiyun 	}
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
62*4882a593Smuzhiyun static struct psil_ep j7200_src_ep_map[] = {
63*4882a593Smuzhiyun 	/* PDMA_MCASP - McASP0-2 */
64*4882a593Smuzhiyun 	PSIL_PDMA_MCASP(0x4400),
65*4882a593Smuzhiyun 	PSIL_PDMA_MCASP(0x4401),
66*4882a593Smuzhiyun 	PSIL_PDMA_MCASP(0x4402),
67*4882a593Smuzhiyun 	/* PDMA_SPI_G0 - SPI0-3 */
68*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4600),
69*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4601),
70*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4602),
71*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4603),
72*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4604),
73*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4605),
74*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4606),
75*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4607),
76*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4608),
77*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4609),
78*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x460a),
79*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x460b),
80*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x460c),
81*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x460d),
82*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x460e),
83*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x460f),
84*4882a593Smuzhiyun 	/* PDMA_SPI_G1 - SPI4-7 */
85*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4610),
86*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4611),
87*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4612),
88*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4613),
89*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4614),
90*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4615),
91*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4616),
92*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4617),
93*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4618),
94*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4619),
95*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x461a),
96*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x461b),
97*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x461c),
98*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x461d),
99*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x461e),
100*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x461f),
101*4882a593Smuzhiyun 	/* PDMA_USART_G0 - UART0-1 */
102*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4700),
103*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4701),
104*4882a593Smuzhiyun 	/* PDMA_USART_G1 - UART2-3 */
105*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4702),
106*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4703),
107*4882a593Smuzhiyun 	/* PDMA_USART_G2 - UART4-9 */
108*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4704),
109*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4705),
110*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4706),
111*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4707),
112*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4708),
113*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x4709),
114*4882a593Smuzhiyun 	/* CPSW5 */
115*4882a593Smuzhiyun 	PSIL_ETHERNET(0x4a00),
116*4882a593Smuzhiyun 	/* CPSW0 */
117*4882a593Smuzhiyun 	PSIL_ETHERNET(0x7000),
118*4882a593Smuzhiyun 	/* MCU_PDMA_MISC_G0 - SPI0 */
119*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7100),
120*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7101),
121*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7102),
122*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7103),
123*4882a593Smuzhiyun 	/* MCU_PDMA_MISC_G1 - SPI1-2 */
124*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7200),
125*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7201),
126*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7202),
127*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7203),
128*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7204),
129*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7205),
130*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7206),
131*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7207),
132*4882a593Smuzhiyun 	/* MCU_PDMA_MISC_G2 - UART0 */
133*4882a593Smuzhiyun 	PSIL_PDMA_XY_PKT(0x7300),
134*4882a593Smuzhiyun 	/* MCU_PDMA_ADC - ADC0-1 */
135*4882a593Smuzhiyun 	PSIL_PDMA_XY_TR(0x7400),
136*4882a593Smuzhiyun 	PSIL_PDMA_XY_TR(0x7401),
137*4882a593Smuzhiyun 	/* SA2UL */
138*4882a593Smuzhiyun 	PSIL_SA2UL(0x7500, 0),
139*4882a593Smuzhiyun 	PSIL_SA2UL(0x7501, 0),
140*4882a593Smuzhiyun 	PSIL_SA2UL(0x7502, 0),
141*4882a593Smuzhiyun 	PSIL_SA2UL(0x7503, 0),
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
145*4882a593Smuzhiyun static struct psil_ep j7200_dst_ep_map[] = {
146*4882a593Smuzhiyun 	/* CPSW5 */
147*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca00),
148*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca01),
149*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca02),
150*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca03),
151*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca04),
152*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca05),
153*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca06),
154*4882a593Smuzhiyun 	PSIL_ETHERNET(0xca07),
155*4882a593Smuzhiyun 	/* CPSW0 */
156*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf000),
157*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf001),
158*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf002),
159*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf003),
160*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf004),
161*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf005),
162*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf006),
163*4882a593Smuzhiyun 	PSIL_ETHERNET(0xf007),
164*4882a593Smuzhiyun 	/* SA2UL */
165*4882a593Smuzhiyun 	PSIL_SA2UL(0xf500, 1),
166*4882a593Smuzhiyun 	PSIL_SA2UL(0xf501, 1),
167*4882a593Smuzhiyun };
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun struct psil_ep_map j7200_ep_map = {
170*4882a593Smuzhiyun 	.name = "j7200",
171*4882a593Smuzhiyun 	.src = j7200_src_ep_map,
172*4882a593Smuzhiyun 	.src_count = ARRAY_SIZE(j7200_src_ep_map),
173*4882a593Smuzhiyun 	.dst = j7200_dst_ep_map,
174*4882a593Smuzhiyun 	.dst_count = ARRAY_SIZE(j7200_dst_ep_map),
175*4882a593Smuzhiyun };
176