1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * PCI driver for the Synopsys DesignWare DMA Controller
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Intel Corporation
6*4882a593Smuzhiyun * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/pci.h>
11*4882a593Smuzhiyun #include <linux/device.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include "internal.h"
14*4882a593Smuzhiyun
dw_pci_probe(struct pci_dev * pdev,const struct pci_device_id * pid)15*4882a593Smuzhiyun static int dw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pid)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun const struct dw_dma_chip_pdata *drv_data = (void *)pid->driver_data;
18*4882a593Smuzhiyun struct dw_dma_chip_pdata *data;
19*4882a593Smuzhiyun struct dw_dma_chip *chip;
20*4882a593Smuzhiyun int ret;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun ret = pcim_enable_device(pdev);
23*4882a593Smuzhiyun if (ret)
24*4882a593Smuzhiyun return ret;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun ret = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
27*4882a593Smuzhiyun if (ret) {
28*4882a593Smuzhiyun dev_err(&pdev->dev, "I/O memory remapping failed\n");
29*4882a593Smuzhiyun return ret;
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun pci_set_master(pdev);
33*4882a593Smuzhiyun pci_try_set_mwi(pdev);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
36*4882a593Smuzhiyun if (ret)
37*4882a593Smuzhiyun return ret;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
40*4882a593Smuzhiyun if (ret)
41*4882a593Smuzhiyun return ret;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun data = devm_kmemdup(&pdev->dev, drv_data, sizeof(*drv_data), GFP_KERNEL);
44*4882a593Smuzhiyun if (!data)
45*4882a593Smuzhiyun return -ENOMEM;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
48*4882a593Smuzhiyun if (!chip)
49*4882a593Smuzhiyun return -ENOMEM;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun chip->dev = &pdev->dev;
52*4882a593Smuzhiyun chip->id = pdev->devfn;
53*4882a593Smuzhiyun chip->regs = pcim_iomap_table(pdev)[0];
54*4882a593Smuzhiyun chip->irq = pdev->irq;
55*4882a593Smuzhiyun chip->pdata = data->pdata;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun data->chip = chip;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun ret = data->probe(chip);
60*4882a593Smuzhiyun if (ret)
61*4882a593Smuzhiyun return ret;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun dw_dma_acpi_controller_register(chip->dw);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun pci_set_drvdata(pdev, data);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun return 0;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun
dw_pci_remove(struct pci_dev * pdev)70*4882a593Smuzhiyun static void dw_pci_remove(struct pci_dev *pdev)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun struct dw_dma_chip_pdata *data = pci_get_drvdata(pdev);
73*4882a593Smuzhiyun struct dw_dma_chip *chip = data->chip;
74*4882a593Smuzhiyun int ret;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun dw_dma_acpi_controller_free(chip->dw);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun ret = data->remove(chip);
79*4882a593Smuzhiyun if (ret)
80*4882a593Smuzhiyun dev_warn(&pdev->dev, "can't remove device properly: %d\n", ret);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
84*4882a593Smuzhiyun
dw_pci_suspend_late(struct device * dev)85*4882a593Smuzhiyun static int dw_pci_suspend_late(struct device *dev)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
88*4882a593Smuzhiyun struct dw_dma_chip *chip = data->chip;
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun return do_dw_dma_disable(chip);
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun
dw_pci_resume_early(struct device * dev)93*4882a593Smuzhiyun static int dw_pci_resume_early(struct device *dev)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun struct dw_dma_chip_pdata *data = dev_get_drvdata(dev);
96*4882a593Smuzhiyun struct dw_dma_chip *chip = data->chip;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun return do_dw_dma_enable(chip);
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun static const struct dev_pm_ops dw_pci_dev_pm_ops = {
104*4882a593Smuzhiyun SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_pci_suspend_late, dw_pci_resume_early)
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun static const struct pci_device_id dw_pci_id_table[] = {
108*4882a593Smuzhiyun /* Medfield (GPDMA) */
109*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x0827), (kernel_ulong_t)&dw_dma_chip_pdata },
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /* BayTrail */
112*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x0f06), (kernel_ulong_t)&dw_dma_chip_pdata },
113*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x0f40), (kernel_ulong_t)&dw_dma_chip_pdata },
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /* Merrifield */
116*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x11a2), (kernel_ulong_t)&idma32_chip_pdata },
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* Braswell */
119*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x2286), (kernel_ulong_t)&dw_dma_chip_pdata },
120*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x22c0), (kernel_ulong_t)&dw_dma_chip_pdata },
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /* Elkhart Lake iDMA 32-bit (PSE DMA) */
123*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x4bb4), (kernel_ulong_t)&idma32_chip_pdata },
124*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x4bb5), (kernel_ulong_t)&idma32_chip_pdata },
125*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x4bb6), (kernel_ulong_t)&idma32_chip_pdata },
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun /* Haswell */
128*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x9c60), (kernel_ulong_t)&dw_dma_chip_pdata },
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* Broadwell */
131*4882a593Smuzhiyun { PCI_VDEVICE(INTEL, 0x9ce0), (kernel_ulong_t)&dw_dma_chip_pdata },
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun { }
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, dw_pci_id_table);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun static struct pci_driver dw_pci_driver = {
138*4882a593Smuzhiyun .name = "dw_dmac_pci",
139*4882a593Smuzhiyun .id_table = dw_pci_id_table,
140*4882a593Smuzhiyun .probe = dw_pci_probe,
141*4882a593Smuzhiyun .remove = dw_pci_remove,
142*4882a593Smuzhiyun .driver = {
143*4882a593Smuzhiyun .pm = &dw_pci_dev_pm_ops,
144*4882a593Smuzhiyun },
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun module_pci_driver(dw_pci_driver);
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
150*4882a593Smuzhiyun MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller PCI driver");
151*4882a593Smuzhiyun MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
152