1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * DMA Engine test module
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2007 Atmel Corporation
6*4882a593Smuzhiyun * Copyright (C) 2013 Intel Corporation
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/dma-mapping.h>
13*4882a593Smuzhiyun #include <linux/dmaengine.h>
14*4882a593Smuzhiyun #include <linux/freezer.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/kthread.h>
17*4882a593Smuzhiyun #include <linux/sched/task.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/moduleparam.h>
20*4882a593Smuzhiyun #include <linux/random.h>
21*4882a593Smuzhiyun #include <linux/slab.h>
22*4882a593Smuzhiyun #include <linux/wait.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static unsigned int test_buf_size = 16384;
25*4882a593Smuzhiyun module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
26*4882a593Smuzhiyun MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static char test_device[32];
29*4882a593Smuzhiyun module_param_string(device, test_device, sizeof(test_device),
30*4882a593Smuzhiyun S_IRUGO | S_IWUSR);
31*4882a593Smuzhiyun MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static unsigned int threads_per_chan = 1;
34*4882a593Smuzhiyun module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
35*4882a593Smuzhiyun MODULE_PARM_DESC(threads_per_chan,
36*4882a593Smuzhiyun "Number of threads to start per channel (default: 1)");
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static unsigned int max_channels;
39*4882a593Smuzhiyun module_param(max_channels, uint, S_IRUGO | S_IWUSR);
40*4882a593Smuzhiyun MODULE_PARM_DESC(max_channels,
41*4882a593Smuzhiyun "Maximum number of channels to use (default: all)");
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static unsigned int iterations;
44*4882a593Smuzhiyun module_param(iterations, uint, S_IRUGO | S_IWUSR);
45*4882a593Smuzhiyun MODULE_PARM_DESC(iterations,
46*4882a593Smuzhiyun "Iterations before stopping test (default: infinite)");
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static unsigned int dmatest;
49*4882a593Smuzhiyun module_param(dmatest, uint, S_IRUGO | S_IWUSR);
50*4882a593Smuzhiyun MODULE_PARM_DESC(dmatest,
51*4882a593Smuzhiyun "dmatest 0-memcpy 1-memset (default: 0)");
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static unsigned int xor_sources = 3;
54*4882a593Smuzhiyun module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
55*4882a593Smuzhiyun MODULE_PARM_DESC(xor_sources,
56*4882a593Smuzhiyun "Number of xor source buffers (default: 3)");
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static unsigned int pq_sources = 3;
59*4882a593Smuzhiyun module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
60*4882a593Smuzhiyun MODULE_PARM_DESC(pq_sources,
61*4882a593Smuzhiyun "Number of p+q source buffers (default: 3)");
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static int timeout = 3000;
64*4882a593Smuzhiyun module_param(timeout, int, S_IRUGO | S_IWUSR);
65*4882a593Smuzhiyun MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
66*4882a593Smuzhiyun "Pass -1 for infinite timeout");
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun static bool noverify;
69*4882a593Smuzhiyun module_param(noverify, bool, S_IRUGO | S_IWUSR);
70*4882a593Smuzhiyun MODULE_PARM_DESC(noverify, "Disable data verification (default: verify)");
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static bool norandom;
73*4882a593Smuzhiyun module_param(norandom, bool, 0644);
74*4882a593Smuzhiyun MODULE_PARM_DESC(norandom, "Disable random offset setup (default: random)");
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun static bool verbose;
77*4882a593Smuzhiyun module_param(verbose, bool, S_IRUGO | S_IWUSR);
78*4882a593Smuzhiyun MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun static int alignment = -1;
81*4882a593Smuzhiyun module_param(alignment, int, 0644);
82*4882a593Smuzhiyun MODULE_PARM_DESC(alignment, "Custom data address alignment taken as 2^(alignment) (default: not used (-1))");
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun static unsigned int transfer_size;
85*4882a593Smuzhiyun module_param(transfer_size, uint, 0644);
86*4882a593Smuzhiyun MODULE_PARM_DESC(transfer_size, "Optional custom transfer size in bytes (default: not used (0))");
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static bool polled;
89*4882a593Smuzhiyun module_param(polled, bool, S_IRUGO | S_IWUSR);
90*4882a593Smuzhiyun MODULE_PARM_DESC(polled, "Use polling for completion instead of interrupts");
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /**
93*4882a593Smuzhiyun * struct dmatest_params - test parameters.
94*4882a593Smuzhiyun * @buf_size: size of the memcpy test buffer
95*4882a593Smuzhiyun * @channel: bus ID of the channel to test
96*4882a593Smuzhiyun * @device: bus ID of the DMA Engine to test
97*4882a593Smuzhiyun * @threads_per_chan: number of threads to start per channel
98*4882a593Smuzhiyun * @max_channels: maximum number of channels to use
99*4882a593Smuzhiyun * @iterations: iterations before stopping test
100*4882a593Smuzhiyun * @xor_sources: number of xor source buffers
101*4882a593Smuzhiyun * @pq_sources: number of p+q source buffers
102*4882a593Smuzhiyun * @timeout: transfer timeout in msec, -1 for infinite timeout
103*4882a593Smuzhiyun * @noverify: disable data verification
104*4882a593Smuzhiyun * @norandom: disable random offset setup
105*4882a593Smuzhiyun * @alignment: custom data address alignment taken as 2^alignment
106*4882a593Smuzhiyun * @transfer_size: custom transfer size in bytes
107*4882a593Smuzhiyun * @polled: use polling for completion instead of interrupts
108*4882a593Smuzhiyun */
109*4882a593Smuzhiyun struct dmatest_params {
110*4882a593Smuzhiyun unsigned int buf_size;
111*4882a593Smuzhiyun char channel[20];
112*4882a593Smuzhiyun char device[32];
113*4882a593Smuzhiyun unsigned int threads_per_chan;
114*4882a593Smuzhiyun unsigned int max_channels;
115*4882a593Smuzhiyun unsigned int iterations;
116*4882a593Smuzhiyun unsigned int xor_sources;
117*4882a593Smuzhiyun unsigned int pq_sources;
118*4882a593Smuzhiyun int timeout;
119*4882a593Smuzhiyun bool noverify;
120*4882a593Smuzhiyun bool norandom;
121*4882a593Smuzhiyun int alignment;
122*4882a593Smuzhiyun unsigned int transfer_size;
123*4882a593Smuzhiyun bool polled;
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /**
127*4882a593Smuzhiyun * struct dmatest_info - test information.
128*4882a593Smuzhiyun * @params: test parameters
129*4882a593Smuzhiyun * @channels: channels under test
130*4882a593Smuzhiyun * @nr_channels: number of channels under test
131*4882a593Smuzhiyun * @lock: access protection to the fields of this structure
132*4882a593Smuzhiyun * @did_init: module has been initialized completely
133*4882a593Smuzhiyun * @last_error: test has faced configuration issues
134*4882a593Smuzhiyun */
135*4882a593Smuzhiyun static struct dmatest_info {
136*4882a593Smuzhiyun /* Test parameters */
137*4882a593Smuzhiyun struct dmatest_params params;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /* Internal state */
140*4882a593Smuzhiyun struct list_head channels;
141*4882a593Smuzhiyun unsigned int nr_channels;
142*4882a593Smuzhiyun int last_error;
143*4882a593Smuzhiyun struct mutex lock;
144*4882a593Smuzhiyun bool did_init;
145*4882a593Smuzhiyun } test_info = {
146*4882a593Smuzhiyun .channels = LIST_HEAD_INIT(test_info.channels),
147*4882a593Smuzhiyun .lock = __MUTEX_INITIALIZER(test_info.lock),
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun static int dmatest_run_set(const char *val, const struct kernel_param *kp);
151*4882a593Smuzhiyun static int dmatest_run_get(char *val, const struct kernel_param *kp);
152*4882a593Smuzhiyun static const struct kernel_param_ops run_ops = {
153*4882a593Smuzhiyun .set = dmatest_run_set,
154*4882a593Smuzhiyun .get = dmatest_run_get,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun static bool dmatest_run;
157*4882a593Smuzhiyun module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
158*4882a593Smuzhiyun MODULE_PARM_DESC(run, "Run the test (default: false)");
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun static int dmatest_chan_set(const char *val, const struct kernel_param *kp);
161*4882a593Smuzhiyun static int dmatest_chan_get(char *val, const struct kernel_param *kp);
162*4882a593Smuzhiyun static const struct kernel_param_ops multi_chan_ops = {
163*4882a593Smuzhiyun .set = dmatest_chan_set,
164*4882a593Smuzhiyun .get = dmatest_chan_get,
165*4882a593Smuzhiyun };
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun static char test_channel[20];
168*4882a593Smuzhiyun static struct kparam_string newchan_kps = {
169*4882a593Smuzhiyun .string = test_channel,
170*4882a593Smuzhiyun .maxlen = 20,
171*4882a593Smuzhiyun };
172*4882a593Smuzhiyun module_param_cb(channel, &multi_chan_ops, &newchan_kps, 0644);
173*4882a593Smuzhiyun MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun static int dmatest_test_list_get(char *val, const struct kernel_param *kp);
176*4882a593Smuzhiyun static const struct kernel_param_ops test_list_ops = {
177*4882a593Smuzhiyun .get = dmatest_test_list_get,
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun module_param_cb(test_list, &test_list_ops, NULL, 0444);
180*4882a593Smuzhiyun MODULE_PARM_DESC(test_list, "Print current test list");
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* Maximum amount of mismatched bytes in buffer to print */
183*4882a593Smuzhiyun #define MAX_ERROR_COUNT 32
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /*
186*4882a593Smuzhiyun * Initialization patterns. All bytes in the source buffer has bit 7
187*4882a593Smuzhiyun * set, all bytes in the destination buffer has bit 7 cleared.
188*4882a593Smuzhiyun *
189*4882a593Smuzhiyun * Bit 6 is set for all bytes which are to be copied by the DMA
190*4882a593Smuzhiyun * engine. Bit 5 is set for all bytes which are to be overwritten by
191*4882a593Smuzhiyun * the DMA engine.
192*4882a593Smuzhiyun *
193*4882a593Smuzhiyun * The remaining bits are the inverse of a counter which increments by
194*4882a593Smuzhiyun * one for each byte address.
195*4882a593Smuzhiyun */
196*4882a593Smuzhiyun #define PATTERN_SRC 0x80
197*4882a593Smuzhiyun #define PATTERN_DST 0x00
198*4882a593Smuzhiyun #define PATTERN_COPY 0x40
199*4882a593Smuzhiyun #define PATTERN_OVERWRITE 0x20
200*4882a593Smuzhiyun #define PATTERN_COUNT_MASK 0x1f
201*4882a593Smuzhiyun #define PATTERN_MEMSET_IDX 0x01
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /* Fixed point arithmetic ops */
204*4882a593Smuzhiyun #define FIXPT_SHIFT 8
205*4882a593Smuzhiyun #define FIXPNT_MASK 0xFF
206*4882a593Smuzhiyun #define FIXPT_TO_INT(a) ((a) >> FIXPT_SHIFT)
207*4882a593Smuzhiyun #define INT_TO_FIXPT(a) ((a) << FIXPT_SHIFT)
208*4882a593Smuzhiyun #define FIXPT_GET_FRAC(a) ((((a) & FIXPNT_MASK) * 100) >> FIXPT_SHIFT)
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun /* poor man's completion - we want to use wait_event_freezable() on it */
211*4882a593Smuzhiyun struct dmatest_done {
212*4882a593Smuzhiyun bool done;
213*4882a593Smuzhiyun wait_queue_head_t *wait;
214*4882a593Smuzhiyun };
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun struct dmatest_data {
217*4882a593Smuzhiyun u8 **raw;
218*4882a593Smuzhiyun u8 **aligned;
219*4882a593Smuzhiyun unsigned int cnt;
220*4882a593Smuzhiyun unsigned int off;
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun struct dmatest_thread {
224*4882a593Smuzhiyun struct list_head node;
225*4882a593Smuzhiyun struct dmatest_info *info;
226*4882a593Smuzhiyun struct task_struct *task;
227*4882a593Smuzhiyun struct dma_chan *chan;
228*4882a593Smuzhiyun struct dmatest_data src;
229*4882a593Smuzhiyun struct dmatest_data dst;
230*4882a593Smuzhiyun enum dma_transaction_type type;
231*4882a593Smuzhiyun wait_queue_head_t done_wait;
232*4882a593Smuzhiyun struct dmatest_done test_done;
233*4882a593Smuzhiyun bool done;
234*4882a593Smuzhiyun bool pending;
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun struct dmatest_chan {
238*4882a593Smuzhiyun struct list_head node;
239*4882a593Smuzhiyun struct dma_chan *chan;
240*4882a593Smuzhiyun struct list_head threads;
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
244*4882a593Smuzhiyun static bool wait;
245*4882a593Smuzhiyun
is_threaded_test_run(struct dmatest_info * info)246*4882a593Smuzhiyun static bool is_threaded_test_run(struct dmatest_info *info)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun struct dmatest_chan *dtc;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun list_for_each_entry(dtc, &info->channels, node) {
251*4882a593Smuzhiyun struct dmatest_thread *thread;
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun list_for_each_entry(thread, &dtc->threads, node) {
254*4882a593Smuzhiyun if (!thread->done && !thread->pending)
255*4882a593Smuzhiyun return true;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun return false;
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
is_threaded_test_pending(struct dmatest_info * info)262*4882a593Smuzhiyun static bool is_threaded_test_pending(struct dmatest_info *info)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun struct dmatest_chan *dtc;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun list_for_each_entry(dtc, &info->channels, node) {
267*4882a593Smuzhiyun struct dmatest_thread *thread;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun list_for_each_entry(thread, &dtc->threads, node) {
270*4882a593Smuzhiyun if (thread->pending)
271*4882a593Smuzhiyun return true;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun return false;
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
dmatest_wait_get(char * val,const struct kernel_param * kp)278*4882a593Smuzhiyun static int dmatest_wait_get(char *val, const struct kernel_param *kp)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
281*4882a593Smuzhiyun struct dmatest_params *params = &info->params;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun if (params->iterations)
284*4882a593Smuzhiyun wait_event(thread_wait, !is_threaded_test_run(info));
285*4882a593Smuzhiyun wait = true;
286*4882a593Smuzhiyun return param_get_bool(val, kp);
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun static const struct kernel_param_ops wait_ops = {
290*4882a593Smuzhiyun .get = dmatest_wait_get,
291*4882a593Smuzhiyun .set = param_set_bool,
292*4882a593Smuzhiyun };
293*4882a593Smuzhiyun module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
294*4882a593Smuzhiyun MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
295*4882a593Smuzhiyun
dmatest_match_channel(struct dmatest_params * params,struct dma_chan * chan)296*4882a593Smuzhiyun static bool dmatest_match_channel(struct dmatest_params *params,
297*4882a593Smuzhiyun struct dma_chan *chan)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun if (params->channel[0] == '\0')
300*4882a593Smuzhiyun return true;
301*4882a593Smuzhiyun return strcmp(dma_chan_name(chan), params->channel) == 0;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
dmatest_match_device(struct dmatest_params * params,struct dma_device * device)304*4882a593Smuzhiyun static bool dmatest_match_device(struct dmatest_params *params,
305*4882a593Smuzhiyun struct dma_device *device)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun if (params->device[0] == '\0')
308*4882a593Smuzhiyun return true;
309*4882a593Smuzhiyun return strcmp(dev_name(device->dev), params->device) == 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
dmatest_random(void)312*4882a593Smuzhiyun static unsigned long dmatest_random(void)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun unsigned long buf;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun prandom_bytes(&buf, sizeof(buf));
317*4882a593Smuzhiyun return buf;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun
gen_inv_idx(u8 index,bool is_memset)320*4882a593Smuzhiyun static inline u8 gen_inv_idx(u8 index, bool is_memset)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun u8 val = is_memset ? PATTERN_MEMSET_IDX : index;
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun return ~val & PATTERN_COUNT_MASK;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
gen_src_value(u8 index,bool is_memset)327*4882a593Smuzhiyun static inline u8 gen_src_value(u8 index, bool is_memset)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun return PATTERN_SRC | gen_inv_idx(index, is_memset);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
gen_dst_value(u8 index,bool is_memset)332*4882a593Smuzhiyun static inline u8 gen_dst_value(u8 index, bool is_memset)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun return PATTERN_DST | gen_inv_idx(index, is_memset);
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
dmatest_init_srcs(u8 ** bufs,unsigned int start,unsigned int len,unsigned int buf_size,bool is_memset)337*4882a593Smuzhiyun static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
338*4882a593Smuzhiyun unsigned int buf_size, bool is_memset)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun unsigned int i;
341*4882a593Smuzhiyun u8 *buf;
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun for (; (buf = *bufs); bufs++) {
344*4882a593Smuzhiyun for (i = 0; i < start; i++)
345*4882a593Smuzhiyun buf[i] = gen_src_value(i, is_memset);
346*4882a593Smuzhiyun for ( ; i < start + len; i++)
347*4882a593Smuzhiyun buf[i] = gen_src_value(i, is_memset) | PATTERN_COPY;
348*4882a593Smuzhiyun for ( ; i < buf_size; i++)
349*4882a593Smuzhiyun buf[i] = gen_src_value(i, is_memset);
350*4882a593Smuzhiyun buf++;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
dmatest_init_dsts(u8 ** bufs,unsigned int start,unsigned int len,unsigned int buf_size,bool is_memset)354*4882a593Smuzhiyun static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
355*4882a593Smuzhiyun unsigned int buf_size, bool is_memset)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun unsigned int i;
358*4882a593Smuzhiyun u8 *buf;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun for (; (buf = *bufs); bufs++) {
361*4882a593Smuzhiyun for (i = 0; i < start; i++)
362*4882a593Smuzhiyun buf[i] = gen_dst_value(i, is_memset);
363*4882a593Smuzhiyun for ( ; i < start + len; i++)
364*4882a593Smuzhiyun buf[i] = gen_dst_value(i, is_memset) |
365*4882a593Smuzhiyun PATTERN_OVERWRITE;
366*4882a593Smuzhiyun for ( ; i < buf_size; i++)
367*4882a593Smuzhiyun buf[i] = gen_dst_value(i, is_memset);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
dmatest_mismatch(u8 actual,u8 pattern,unsigned int index,unsigned int counter,bool is_srcbuf,bool is_memset)371*4882a593Smuzhiyun static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
372*4882a593Smuzhiyun unsigned int counter, bool is_srcbuf, bool is_memset)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun u8 diff = actual ^ pattern;
375*4882a593Smuzhiyun u8 expected = pattern | gen_inv_idx(counter, is_memset);
376*4882a593Smuzhiyun const char *thread_name = current->comm;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun if (is_srcbuf)
379*4882a593Smuzhiyun pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
380*4882a593Smuzhiyun thread_name, index, expected, actual);
381*4882a593Smuzhiyun else if ((pattern & PATTERN_COPY)
382*4882a593Smuzhiyun && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
383*4882a593Smuzhiyun pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
384*4882a593Smuzhiyun thread_name, index, expected, actual);
385*4882a593Smuzhiyun else if (diff & PATTERN_SRC)
386*4882a593Smuzhiyun pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
387*4882a593Smuzhiyun thread_name, index, expected, actual);
388*4882a593Smuzhiyun else
389*4882a593Smuzhiyun pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
390*4882a593Smuzhiyun thread_name, index, expected, actual);
391*4882a593Smuzhiyun }
392*4882a593Smuzhiyun
dmatest_verify(u8 ** bufs,unsigned int start,unsigned int end,unsigned int counter,u8 pattern,bool is_srcbuf,bool is_memset)393*4882a593Smuzhiyun static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
394*4882a593Smuzhiyun unsigned int end, unsigned int counter, u8 pattern,
395*4882a593Smuzhiyun bool is_srcbuf, bool is_memset)
396*4882a593Smuzhiyun {
397*4882a593Smuzhiyun unsigned int i;
398*4882a593Smuzhiyun unsigned int error_count = 0;
399*4882a593Smuzhiyun u8 actual;
400*4882a593Smuzhiyun u8 expected;
401*4882a593Smuzhiyun u8 *buf;
402*4882a593Smuzhiyun unsigned int counter_orig = counter;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun for (; (buf = *bufs); bufs++) {
405*4882a593Smuzhiyun counter = counter_orig;
406*4882a593Smuzhiyun for (i = start; i < end; i++) {
407*4882a593Smuzhiyun actual = buf[i];
408*4882a593Smuzhiyun expected = pattern | gen_inv_idx(counter, is_memset);
409*4882a593Smuzhiyun if (actual != expected) {
410*4882a593Smuzhiyun if (error_count < MAX_ERROR_COUNT)
411*4882a593Smuzhiyun dmatest_mismatch(actual, pattern, i,
412*4882a593Smuzhiyun counter, is_srcbuf,
413*4882a593Smuzhiyun is_memset);
414*4882a593Smuzhiyun error_count++;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun counter++;
417*4882a593Smuzhiyun }
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun if (error_count > MAX_ERROR_COUNT)
421*4882a593Smuzhiyun pr_warn("%s: %u errors suppressed\n",
422*4882a593Smuzhiyun current->comm, error_count - MAX_ERROR_COUNT);
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun return error_count;
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun
dmatest_callback(void * arg)428*4882a593Smuzhiyun static void dmatest_callback(void *arg)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun struct dmatest_done *done = arg;
431*4882a593Smuzhiyun struct dmatest_thread *thread =
432*4882a593Smuzhiyun container_of(done, struct dmatest_thread, test_done);
433*4882a593Smuzhiyun if (!thread->done) {
434*4882a593Smuzhiyun done->done = true;
435*4882a593Smuzhiyun wake_up_all(done->wait);
436*4882a593Smuzhiyun } else {
437*4882a593Smuzhiyun /*
438*4882a593Smuzhiyun * If thread->done, it means that this callback occurred
439*4882a593Smuzhiyun * after the parent thread has cleaned up. This can
440*4882a593Smuzhiyun * happen in the case that driver doesn't implement
441*4882a593Smuzhiyun * the terminate_all() functionality and a dma operation
442*4882a593Smuzhiyun * did not occur within the timeout period
443*4882a593Smuzhiyun */
444*4882a593Smuzhiyun WARN(1, "dmatest: Kernel memory may be corrupted!!\n");
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun
min_odd(unsigned int x,unsigned int y)448*4882a593Smuzhiyun static unsigned int min_odd(unsigned int x, unsigned int y)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun unsigned int val = min(x, y);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun return val % 2 ? val : val - 1;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun
result(const char * err,unsigned int n,unsigned int src_off,unsigned int dst_off,unsigned int len,unsigned long data)455*4882a593Smuzhiyun static void result(const char *err, unsigned int n, unsigned int src_off,
456*4882a593Smuzhiyun unsigned int dst_off, unsigned int len, unsigned long data)
457*4882a593Smuzhiyun {
458*4882a593Smuzhiyun if (IS_ERR_VALUE(data)) {
459*4882a593Smuzhiyun pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%ld)\n",
460*4882a593Smuzhiyun current->comm, n, err, src_off, dst_off, len, data);
461*4882a593Smuzhiyun } else {
462*4882a593Smuzhiyun pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
463*4882a593Smuzhiyun current->comm, n, err, src_off, dst_off, len, data);
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun }
466*4882a593Smuzhiyun
dbg_result(const char * err,unsigned int n,unsigned int src_off,unsigned int dst_off,unsigned int len,unsigned long data)467*4882a593Smuzhiyun static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
468*4882a593Smuzhiyun unsigned int dst_off, unsigned int len,
469*4882a593Smuzhiyun unsigned long data)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
472*4882a593Smuzhiyun current->comm, n, err, src_off, dst_off, len, data);
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
476*4882a593Smuzhiyun if (verbose) \
477*4882a593Smuzhiyun result(err, n, src_off, dst_off, len, data); \
478*4882a593Smuzhiyun else \
479*4882a593Smuzhiyun dbg_result(err, n, src_off, dst_off, len, data);\
480*4882a593Smuzhiyun })
481*4882a593Smuzhiyun
dmatest_persec(s64 runtime,unsigned int val)482*4882a593Smuzhiyun static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun unsigned long long per_sec = 1000000;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun if (runtime <= 0)
487*4882a593Smuzhiyun return 0;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun /* drop precision until runtime is 32-bits */
490*4882a593Smuzhiyun while (runtime > UINT_MAX) {
491*4882a593Smuzhiyun runtime >>= 1;
492*4882a593Smuzhiyun per_sec <<= 1;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun per_sec *= val;
496*4882a593Smuzhiyun per_sec = INT_TO_FIXPT(per_sec);
497*4882a593Smuzhiyun do_div(per_sec, runtime);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun return per_sec;
500*4882a593Smuzhiyun }
501*4882a593Smuzhiyun
dmatest_KBs(s64 runtime,unsigned long long len)502*4882a593Smuzhiyun static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun return FIXPT_TO_INT(dmatest_persec(runtime, len >> 10));
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
__dmatest_free_test_data(struct dmatest_data * d,unsigned int cnt)507*4882a593Smuzhiyun static void __dmatest_free_test_data(struct dmatest_data *d, unsigned int cnt)
508*4882a593Smuzhiyun {
509*4882a593Smuzhiyun unsigned int i;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun for (i = 0; i < cnt; i++)
512*4882a593Smuzhiyun kfree(d->raw[i]);
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun kfree(d->aligned);
515*4882a593Smuzhiyun kfree(d->raw);
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun
dmatest_free_test_data(struct dmatest_data * d)518*4882a593Smuzhiyun static void dmatest_free_test_data(struct dmatest_data *d)
519*4882a593Smuzhiyun {
520*4882a593Smuzhiyun __dmatest_free_test_data(d, d->cnt);
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
dmatest_alloc_test_data(struct dmatest_data * d,unsigned int buf_size,u8 align)523*4882a593Smuzhiyun static int dmatest_alloc_test_data(struct dmatest_data *d,
524*4882a593Smuzhiyun unsigned int buf_size, u8 align)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun unsigned int i = 0;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun d->raw = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL);
529*4882a593Smuzhiyun if (!d->raw)
530*4882a593Smuzhiyun return -ENOMEM;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun d->aligned = kcalloc(d->cnt + 1, sizeof(u8 *), GFP_KERNEL);
533*4882a593Smuzhiyun if (!d->aligned)
534*4882a593Smuzhiyun goto err;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun for (i = 0; i < d->cnt; i++) {
537*4882a593Smuzhiyun d->raw[i] = kmalloc(buf_size + align, GFP_KERNEL);
538*4882a593Smuzhiyun if (!d->raw[i])
539*4882a593Smuzhiyun goto err;
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun /* align to alignment restriction */
542*4882a593Smuzhiyun if (align)
543*4882a593Smuzhiyun d->aligned[i] = PTR_ALIGN(d->raw[i], align);
544*4882a593Smuzhiyun else
545*4882a593Smuzhiyun d->aligned[i] = d->raw[i];
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun return 0;
549*4882a593Smuzhiyun err:
550*4882a593Smuzhiyun __dmatest_free_test_data(d, i);
551*4882a593Smuzhiyun return -ENOMEM;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /*
555*4882a593Smuzhiyun * This function repeatedly tests DMA transfers of various lengths and
556*4882a593Smuzhiyun * offsets for a given operation type until it is told to exit by
557*4882a593Smuzhiyun * kthread_stop(). There may be multiple threads running this function
558*4882a593Smuzhiyun * in parallel for a single channel, and there may be multiple channels
559*4882a593Smuzhiyun * being tested in parallel.
560*4882a593Smuzhiyun *
561*4882a593Smuzhiyun * Before each test, the source and destination buffer is initialized
562*4882a593Smuzhiyun * with a known pattern. This pattern is different depending on
563*4882a593Smuzhiyun * whether it's in an area which is supposed to be copied or
564*4882a593Smuzhiyun * overwritten, and different in the source and destination buffers.
565*4882a593Smuzhiyun * So if the DMA engine doesn't copy exactly what we tell it to copy,
566*4882a593Smuzhiyun * we'll notice.
567*4882a593Smuzhiyun */
dmatest_func(void * data)568*4882a593Smuzhiyun static int dmatest_func(void *data)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun struct dmatest_thread *thread = data;
571*4882a593Smuzhiyun struct dmatest_done *done = &thread->test_done;
572*4882a593Smuzhiyun struct dmatest_info *info;
573*4882a593Smuzhiyun struct dmatest_params *params;
574*4882a593Smuzhiyun struct dma_chan *chan;
575*4882a593Smuzhiyun struct dma_device *dev;
576*4882a593Smuzhiyun unsigned int error_count;
577*4882a593Smuzhiyun unsigned int failed_tests = 0;
578*4882a593Smuzhiyun unsigned int total_tests = 0;
579*4882a593Smuzhiyun dma_cookie_t cookie;
580*4882a593Smuzhiyun enum dma_status status;
581*4882a593Smuzhiyun enum dma_ctrl_flags flags;
582*4882a593Smuzhiyun u8 *pq_coefs = NULL;
583*4882a593Smuzhiyun int ret;
584*4882a593Smuzhiyun unsigned int buf_size;
585*4882a593Smuzhiyun struct dmatest_data *src;
586*4882a593Smuzhiyun struct dmatest_data *dst;
587*4882a593Smuzhiyun int i;
588*4882a593Smuzhiyun ktime_t ktime, start, diff;
589*4882a593Smuzhiyun ktime_t filltime = 0;
590*4882a593Smuzhiyun ktime_t comparetime = 0;
591*4882a593Smuzhiyun s64 runtime = 0;
592*4882a593Smuzhiyun unsigned long long total_len = 0;
593*4882a593Smuzhiyun unsigned long long iops = 0;
594*4882a593Smuzhiyun u8 align = 0;
595*4882a593Smuzhiyun bool is_memset = false;
596*4882a593Smuzhiyun dma_addr_t *srcs;
597*4882a593Smuzhiyun dma_addr_t *dma_pq;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun set_freezable();
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun ret = -ENOMEM;
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun smp_rmb();
604*4882a593Smuzhiyun thread->pending = false;
605*4882a593Smuzhiyun info = thread->info;
606*4882a593Smuzhiyun params = &info->params;
607*4882a593Smuzhiyun chan = thread->chan;
608*4882a593Smuzhiyun dev = chan->device;
609*4882a593Smuzhiyun src = &thread->src;
610*4882a593Smuzhiyun dst = &thread->dst;
611*4882a593Smuzhiyun if (thread->type == DMA_MEMCPY) {
612*4882a593Smuzhiyun align = params->alignment < 0 ? dev->copy_align :
613*4882a593Smuzhiyun params->alignment;
614*4882a593Smuzhiyun src->cnt = dst->cnt = 1;
615*4882a593Smuzhiyun } else if (thread->type == DMA_MEMSET) {
616*4882a593Smuzhiyun align = params->alignment < 0 ? dev->fill_align :
617*4882a593Smuzhiyun params->alignment;
618*4882a593Smuzhiyun src->cnt = dst->cnt = 1;
619*4882a593Smuzhiyun is_memset = true;
620*4882a593Smuzhiyun } else if (thread->type == DMA_XOR) {
621*4882a593Smuzhiyun /* force odd to ensure dst = src */
622*4882a593Smuzhiyun src->cnt = min_odd(params->xor_sources | 1, dev->max_xor);
623*4882a593Smuzhiyun dst->cnt = 1;
624*4882a593Smuzhiyun align = params->alignment < 0 ? dev->xor_align :
625*4882a593Smuzhiyun params->alignment;
626*4882a593Smuzhiyun } else if (thread->type == DMA_PQ) {
627*4882a593Smuzhiyun /* force odd to ensure dst = src */
628*4882a593Smuzhiyun src->cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
629*4882a593Smuzhiyun dst->cnt = 2;
630*4882a593Smuzhiyun align = params->alignment < 0 ? dev->pq_align :
631*4882a593Smuzhiyun params->alignment;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
634*4882a593Smuzhiyun if (!pq_coefs)
635*4882a593Smuzhiyun goto err_thread_type;
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun for (i = 0; i < src->cnt; i++)
638*4882a593Smuzhiyun pq_coefs[i] = 1;
639*4882a593Smuzhiyun } else
640*4882a593Smuzhiyun goto err_thread_type;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun /* Check if buffer count fits into map count variable (u8) */
643*4882a593Smuzhiyun if ((src->cnt + dst->cnt) >= 255) {
644*4882a593Smuzhiyun pr_err("too many buffers (%d of 255 supported)\n",
645*4882a593Smuzhiyun src->cnt + dst->cnt);
646*4882a593Smuzhiyun goto err_free_coefs;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun buf_size = params->buf_size;
650*4882a593Smuzhiyun if (1 << align > buf_size) {
651*4882a593Smuzhiyun pr_err("%u-byte buffer too small for %d-byte alignment\n",
652*4882a593Smuzhiyun buf_size, 1 << align);
653*4882a593Smuzhiyun goto err_free_coefs;
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun if (dmatest_alloc_test_data(src, buf_size, align) < 0)
657*4882a593Smuzhiyun goto err_free_coefs;
658*4882a593Smuzhiyun
659*4882a593Smuzhiyun if (dmatest_alloc_test_data(dst, buf_size, align) < 0)
660*4882a593Smuzhiyun goto err_src;
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun set_user_nice(current, 10);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun srcs = kcalloc(src->cnt, sizeof(dma_addr_t), GFP_KERNEL);
665*4882a593Smuzhiyun if (!srcs)
666*4882a593Smuzhiyun goto err_dst;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun dma_pq = kcalloc(dst->cnt, sizeof(dma_addr_t), GFP_KERNEL);
669*4882a593Smuzhiyun if (!dma_pq)
670*4882a593Smuzhiyun goto err_srcs_array;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun /*
673*4882a593Smuzhiyun * src and dst buffers are freed by ourselves below
674*4882a593Smuzhiyun */
675*4882a593Smuzhiyun if (params->polled)
676*4882a593Smuzhiyun flags = DMA_CTRL_ACK;
677*4882a593Smuzhiyun else
678*4882a593Smuzhiyun flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun ktime = ktime_get();
681*4882a593Smuzhiyun while (!(kthread_should_stop() ||
682*4882a593Smuzhiyun (params->iterations && total_tests >= params->iterations))) {
683*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx = NULL;
684*4882a593Smuzhiyun struct dmaengine_unmap_data *um;
685*4882a593Smuzhiyun dma_addr_t *dsts;
686*4882a593Smuzhiyun unsigned int len;
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun total_tests++;
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun if (params->transfer_size) {
691*4882a593Smuzhiyun if (params->transfer_size >= buf_size) {
692*4882a593Smuzhiyun pr_err("%u-byte transfer size must be lower than %u-buffer size\n",
693*4882a593Smuzhiyun params->transfer_size, buf_size);
694*4882a593Smuzhiyun break;
695*4882a593Smuzhiyun }
696*4882a593Smuzhiyun len = params->transfer_size;
697*4882a593Smuzhiyun } else if (params->norandom) {
698*4882a593Smuzhiyun len = buf_size;
699*4882a593Smuzhiyun } else {
700*4882a593Smuzhiyun len = dmatest_random() % buf_size + 1;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun /* Do not alter transfer size explicitly defined by user */
704*4882a593Smuzhiyun if (!params->transfer_size) {
705*4882a593Smuzhiyun len = (len >> align) << align;
706*4882a593Smuzhiyun if (!len)
707*4882a593Smuzhiyun len = 1 << align;
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun total_len += len;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun if (params->norandom) {
712*4882a593Smuzhiyun src->off = 0;
713*4882a593Smuzhiyun dst->off = 0;
714*4882a593Smuzhiyun } else {
715*4882a593Smuzhiyun src->off = dmatest_random() % (buf_size - len + 1);
716*4882a593Smuzhiyun dst->off = dmatest_random() % (buf_size - len + 1);
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun src->off = (src->off >> align) << align;
719*4882a593Smuzhiyun dst->off = (dst->off >> align) << align;
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun if (!params->noverify) {
723*4882a593Smuzhiyun start = ktime_get();
724*4882a593Smuzhiyun dmatest_init_srcs(src->aligned, src->off, len,
725*4882a593Smuzhiyun buf_size, is_memset);
726*4882a593Smuzhiyun dmatest_init_dsts(dst->aligned, dst->off, len,
727*4882a593Smuzhiyun buf_size, is_memset);
728*4882a593Smuzhiyun
729*4882a593Smuzhiyun diff = ktime_sub(ktime_get(), start);
730*4882a593Smuzhiyun filltime = ktime_add(filltime, diff);
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun um = dmaengine_get_unmap_data(dev->dev, src->cnt + dst->cnt,
734*4882a593Smuzhiyun GFP_KERNEL);
735*4882a593Smuzhiyun if (!um) {
736*4882a593Smuzhiyun failed_tests++;
737*4882a593Smuzhiyun result("unmap data NULL", total_tests,
738*4882a593Smuzhiyun src->off, dst->off, len, ret);
739*4882a593Smuzhiyun continue;
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun um->len = buf_size;
743*4882a593Smuzhiyun for (i = 0; i < src->cnt; i++) {
744*4882a593Smuzhiyun void *buf = src->aligned[i];
745*4882a593Smuzhiyun struct page *pg = virt_to_page(buf);
746*4882a593Smuzhiyun unsigned long pg_off = offset_in_page(buf);
747*4882a593Smuzhiyun
748*4882a593Smuzhiyun um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
749*4882a593Smuzhiyun um->len, DMA_TO_DEVICE);
750*4882a593Smuzhiyun srcs[i] = um->addr[i] + src->off;
751*4882a593Smuzhiyun ret = dma_mapping_error(dev->dev, um->addr[i]);
752*4882a593Smuzhiyun if (ret) {
753*4882a593Smuzhiyun result("src mapping error", total_tests,
754*4882a593Smuzhiyun src->off, dst->off, len, ret);
755*4882a593Smuzhiyun goto error_unmap_continue;
756*4882a593Smuzhiyun }
757*4882a593Smuzhiyun um->to_cnt++;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
760*4882a593Smuzhiyun dsts = &um->addr[src->cnt];
761*4882a593Smuzhiyun for (i = 0; i < dst->cnt; i++) {
762*4882a593Smuzhiyun void *buf = dst->aligned[i];
763*4882a593Smuzhiyun struct page *pg = virt_to_page(buf);
764*4882a593Smuzhiyun unsigned long pg_off = offset_in_page(buf);
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
767*4882a593Smuzhiyun DMA_BIDIRECTIONAL);
768*4882a593Smuzhiyun ret = dma_mapping_error(dev->dev, dsts[i]);
769*4882a593Smuzhiyun if (ret) {
770*4882a593Smuzhiyun result("dst mapping error", total_tests,
771*4882a593Smuzhiyun src->off, dst->off, len, ret);
772*4882a593Smuzhiyun goto error_unmap_continue;
773*4882a593Smuzhiyun }
774*4882a593Smuzhiyun um->bidi_cnt++;
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun if (thread->type == DMA_MEMCPY)
778*4882a593Smuzhiyun tx = dev->device_prep_dma_memcpy(chan,
779*4882a593Smuzhiyun dsts[0] + dst->off,
780*4882a593Smuzhiyun srcs[0], len, flags);
781*4882a593Smuzhiyun else if (thread->type == DMA_MEMSET)
782*4882a593Smuzhiyun tx = dev->device_prep_dma_memset(chan,
783*4882a593Smuzhiyun dsts[0] + dst->off,
784*4882a593Smuzhiyun *(src->aligned[0] + src->off),
785*4882a593Smuzhiyun len, flags);
786*4882a593Smuzhiyun else if (thread->type == DMA_XOR)
787*4882a593Smuzhiyun tx = dev->device_prep_dma_xor(chan,
788*4882a593Smuzhiyun dsts[0] + dst->off,
789*4882a593Smuzhiyun srcs, src->cnt,
790*4882a593Smuzhiyun len, flags);
791*4882a593Smuzhiyun else if (thread->type == DMA_PQ) {
792*4882a593Smuzhiyun for (i = 0; i < dst->cnt; i++)
793*4882a593Smuzhiyun dma_pq[i] = dsts[i] + dst->off;
794*4882a593Smuzhiyun tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
795*4882a593Smuzhiyun src->cnt, pq_coefs,
796*4882a593Smuzhiyun len, flags);
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun if (!tx) {
800*4882a593Smuzhiyun result("prep error", total_tests, src->off,
801*4882a593Smuzhiyun dst->off, len, ret);
802*4882a593Smuzhiyun msleep(100);
803*4882a593Smuzhiyun goto error_unmap_continue;
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun done->done = false;
807*4882a593Smuzhiyun if (!params->polled) {
808*4882a593Smuzhiyun tx->callback = dmatest_callback;
809*4882a593Smuzhiyun tx->callback_param = done;
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun cookie = tx->tx_submit(tx);
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun if (dma_submit_error(cookie)) {
814*4882a593Smuzhiyun result("submit error", total_tests, src->off,
815*4882a593Smuzhiyun dst->off, len, ret);
816*4882a593Smuzhiyun msleep(100);
817*4882a593Smuzhiyun goto error_unmap_continue;
818*4882a593Smuzhiyun }
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun if (params->polled) {
821*4882a593Smuzhiyun status = dma_sync_wait(chan, cookie);
822*4882a593Smuzhiyun dmaengine_terminate_sync(chan);
823*4882a593Smuzhiyun if (status == DMA_COMPLETE)
824*4882a593Smuzhiyun done->done = true;
825*4882a593Smuzhiyun } else {
826*4882a593Smuzhiyun dma_async_issue_pending(chan);
827*4882a593Smuzhiyun
828*4882a593Smuzhiyun wait_event_freezable_timeout(thread->done_wait,
829*4882a593Smuzhiyun done->done,
830*4882a593Smuzhiyun msecs_to_jiffies(params->timeout));
831*4882a593Smuzhiyun
832*4882a593Smuzhiyun status = dma_async_is_tx_complete(chan, cookie, NULL,
833*4882a593Smuzhiyun NULL);
834*4882a593Smuzhiyun }
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun if (!done->done) {
837*4882a593Smuzhiyun result("test timed out", total_tests, src->off, dst->off,
838*4882a593Smuzhiyun len, 0);
839*4882a593Smuzhiyun goto error_unmap_continue;
840*4882a593Smuzhiyun } else if (status != DMA_COMPLETE &&
841*4882a593Smuzhiyun !(dma_has_cap(DMA_COMPLETION_NO_ORDER,
842*4882a593Smuzhiyun dev->cap_mask) &&
843*4882a593Smuzhiyun status == DMA_OUT_OF_ORDER)) {
844*4882a593Smuzhiyun result(status == DMA_ERROR ?
845*4882a593Smuzhiyun "completion error status" :
846*4882a593Smuzhiyun "completion busy status", total_tests, src->off,
847*4882a593Smuzhiyun dst->off, len, ret);
848*4882a593Smuzhiyun goto error_unmap_continue;
849*4882a593Smuzhiyun }
850*4882a593Smuzhiyun
851*4882a593Smuzhiyun dmaengine_unmap_put(um);
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun if (params->noverify) {
854*4882a593Smuzhiyun verbose_result("test passed", total_tests, src->off,
855*4882a593Smuzhiyun dst->off, len, 0);
856*4882a593Smuzhiyun continue;
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun start = ktime_get();
860*4882a593Smuzhiyun pr_debug("%s: verifying source buffer...\n", current->comm);
861*4882a593Smuzhiyun error_count = dmatest_verify(src->aligned, 0, src->off,
862*4882a593Smuzhiyun 0, PATTERN_SRC, true, is_memset);
863*4882a593Smuzhiyun error_count += dmatest_verify(src->aligned, src->off,
864*4882a593Smuzhiyun src->off + len, src->off,
865*4882a593Smuzhiyun PATTERN_SRC | PATTERN_COPY, true, is_memset);
866*4882a593Smuzhiyun error_count += dmatest_verify(src->aligned, src->off + len,
867*4882a593Smuzhiyun buf_size, src->off + len,
868*4882a593Smuzhiyun PATTERN_SRC, true, is_memset);
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun pr_debug("%s: verifying dest buffer...\n", current->comm);
871*4882a593Smuzhiyun error_count += dmatest_verify(dst->aligned, 0, dst->off,
872*4882a593Smuzhiyun 0, PATTERN_DST, false, is_memset);
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun error_count += dmatest_verify(dst->aligned, dst->off,
875*4882a593Smuzhiyun dst->off + len, src->off,
876*4882a593Smuzhiyun PATTERN_SRC | PATTERN_COPY, false, is_memset);
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun error_count += dmatest_verify(dst->aligned, dst->off + len,
879*4882a593Smuzhiyun buf_size, dst->off + len,
880*4882a593Smuzhiyun PATTERN_DST, false, is_memset);
881*4882a593Smuzhiyun
882*4882a593Smuzhiyun diff = ktime_sub(ktime_get(), start);
883*4882a593Smuzhiyun comparetime = ktime_add(comparetime, diff);
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun if (error_count) {
886*4882a593Smuzhiyun result("data error", total_tests, src->off, dst->off,
887*4882a593Smuzhiyun len, error_count);
888*4882a593Smuzhiyun failed_tests++;
889*4882a593Smuzhiyun } else {
890*4882a593Smuzhiyun verbose_result("test passed", total_tests, src->off,
891*4882a593Smuzhiyun dst->off, len, 0);
892*4882a593Smuzhiyun }
893*4882a593Smuzhiyun
894*4882a593Smuzhiyun continue;
895*4882a593Smuzhiyun
896*4882a593Smuzhiyun error_unmap_continue:
897*4882a593Smuzhiyun dmaengine_unmap_put(um);
898*4882a593Smuzhiyun failed_tests++;
899*4882a593Smuzhiyun }
900*4882a593Smuzhiyun ktime = ktime_sub(ktime_get(), ktime);
901*4882a593Smuzhiyun ktime = ktime_sub(ktime, comparetime);
902*4882a593Smuzhiyun ktime = ktime_sub(ktime, filltime);
903*4882a593Smuzhiyun runtime = ktime_to_us(ktime);
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun ret = 0;
906*4882a593Smuzhiyun kfree(dma_pq);
907*4882a593Smuzhiyun err_srcs_array:
908*4882a593Smuzhiyun kfree(srcs);
909*4882a593Smuzhiyun err_dst:
910*4882a593Smuzhiyun dmatest_free_test_data(dst);
911*4882a593Smuzhiyun err_src:
912*4882a593Smuzhiyun dmatest_free_test_data(src);
913*4882a593Smuzhiyun err_free_coefs:
914*4882a593Smuzhiyun kfree(pq_coefs);
915*4882a593Smuzhiyun err_thread_type:
916*4882a593Smuzhiyun iops = dmatest_persec(runtime, total_tests);
917*4882a593Smuzhiyun pr_info("%s: summary %u tests, %u failures %llu.%02llu iops %llu KB/s (%d)\n",
918*4882a593Smuzhiyun current->comm, total_tests, failed_tests,
919*4882a593Smuzhiyun FIXPT_TO_INT(iops), FIXPT_GET_FRAC(iops),
920*4882a593Smuzhiyun dmatest_KBs(runtime, total_len), ret);
921*4882a593Smuzhiyun
922*4882a593Smuzhiyun /* terminate all transfers on specified channels */
923*4882a593Smuzhiyun if (ret || failed_tests)
924*4882a593Smuzhiyun dmaengine_terminate_sync(chan);
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun thread->done = true;
927*4882a593Smuzhiyun wake_up(&thread_wait);
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun return ret;
930*4882a593Smuzhiyun }
931*4882a593Smuzhiyun
dmatest_cleanup_channel(struct dmatest_chan * dtc)932*4882a593Smuzhiyun static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
933*4882a593Smuzhiyun {
934*4882a593Smuzhiyun struct dmatest_thread *thread;
935*4882a593Smuzhiyun struct dmatest_thread *_thread;
936*4882a593Smuzhiyun int ret;
937*4882a593Smuzhiyun
938*4882a593Smuzhiyun list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
939*4882a593Smuzhiyun ret = kthread_stop(thread->task);
940*4882a593Smuzhiyun pr_debug("thread %s exited with status %d\n",
941*4882a593Smuzhiyun thread->task->comm, ret);
942*4882a593Smuzhiyun list_del(&thread->node);
943*4882a593Smuzhiyun put_task_struct(thread->task);
944*4882a593Smuzhiyun kfree(thread);
945*4882a593Smuzhiyun }
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun /* terminate all transfers on specified channels */
948*4882a593Smuzhiyun dmaengine_terminate_sync(dtc->chan);
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun kfree(dtc);
951*4882a593Smuzhiyun }
952*4882a593Smuzhiyun
dmatest_add_threads(struct dmatest_info * info,struct dmatest_chan * dtc,enum dma_transaction_type type)953*4882a593Smuzhiyun static int dmatest_add_threads(struct dmatest_info *info,
954*4882a593Smuzhiyun struct dmatest_chan *dtc, enum dma_transaction_type type)
955*4882a593Smuzhiyun {
956*4882a593Smuzhiyun struct dmatest_params *params = &info->params;
957*4882a593Smuzhiyun struct dmatest_thread *thread;
958*4882a593Smuzhiyun struct dma_chan *chan = dtc->chan;
959*4882a593Smuzhiyun char *op;
960*4882a593Smuzhiyun unsigned int i;
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun if (type == DMA_MEMCPY)
963*4882a593Smuzhiyun op = "copy";
964*4882a593Smuzhiyun else if (type == DMA_MEMSET)
965*4882a593Smuzhiyun op = "set";
966*4882a593Smuzhiyun else if (type == DMA_XOR)
967*4882a593Smuzhiyun op = "xor";
968*4882a593Smuzhiyun else if (type == DMA_PQ)
969*4882a593Smuzhiyun op = "pq";
970*4882a593Smuzhiyun else
971*4882a593Smuzhiyun return -EINVAL;
972*4882a593Smuzhiyun
973*4882a593Smuzhiyun for (i = 0; i < params->threads_per_chan; i++) {
974*4882a593Smuzhiyun thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
975*4882a593Smuzhiyun if (!thread) {
976*4882a593Smuzhiyun pr_warn("No memory for %s-%s%u\n",
977*4882a593Smuzhiyun dma_chan_name(chan), op, i);
978*4882a593Smuzhiyun break;
979*4882a593Smuzhiyun }
980*4882a593Smuzhiyun thread->info = info;
981*4882a593Smuzhiyun thread->chan = dtc->chan;
982*4882a593Smuzhiyun thread->type = type;
983*4882a593Smuzhiyun thread->test_done.wait = &thread->done_wait;
984*4882a593Smuzhiyun init_waitqueue_head(&thread->done_wait);
985*4882a593Smuzhiyun smp_wmb();
986*4882a593Smuzhiyun thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
987*4882a593Smuzhiyun dma_chan_name(chan), op, i);
988*4882a593Smuzhiyun if (IS_ERR(thread->task)) {
989*4882a593Smuzhiyun pr_warn("Failed to create thread %s-%s%u\n",
990*4882a593Smuzhiyun dma_chan_name(chan), op, i);
991*4882a593Smuzhiyun kfree(thread);
992*4882a593Smuzhiyun break;
993*4882a593Smuzhiyun }
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun /* srcbuf and dstbuf are allocated by the thread itself */
996*4882a593Smuzhiyun get_task_struct(thread->task);
997*4882a593Smuzhiyun list_add_tail(&thread->node, &dtc->threads);
998*4882a593Smuzhiyun thread->pending = true;
999*4882a593Smuzhiyun }
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun return i;
1002*4882a593Smuzhiyun }
1003*4882a593Smuzhiyun
dmatest_add_channel(struct dmatest_info * info,struct dma_chan * chan)1004*4882a593Smuzhiyun static int dmatest_add_channel(struct dmatest_info *info,
1005*4882a593Smuzhiyun struct dma_chan *chan)
1006*4882a593Smuzhiyun {
1007*4882a593Smuzhiyun struct dmatest_chan *dtc;
1008*4882a593Smuzhiyun struct dma_device *dma_dev = chan->device;
1009*4882a593Smuzhiyun unsigned int thread_count = 0;
1010*4882a593Smuzhiyun int cnt;
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
1013*4882a593Smuzhiyun if (!dtc) {
1014*4882a593Smuzhiyun pr_warn("No memory for %s\n", dma_chan_name(chan));
1015*4882a593Smuzhiyun return -ENOMEM;
1016*4882a593Smuzhiyun }
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun dtc->chan = chan;
1019*4882a593Smuzhiyun INIT_LIST_HEAD(&dtc->threads);
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun if (dma_has_cap(DMA_COMPLETION_NO_ORDER, dma_dev->cap_mask) &&
1022*4882a593Smuzhiyun info->params.polled) {
1023*4882a593Smuzhiyun info->params.polled = false;
1024*4882a593Smuzhiyun pr_warn("DMA_COMPLETION_NO_ORDER, polled disabled\n");
1025*4882a593Smuzhiyun }
1026*4882a593Smuzhiyun
1027*4882a593Smuzhiyun if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
1028*4882a593Smuzhiyun if (dmatest == 0) {
1029*4882a593Smuzhiyun cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
1030*4882a593Smuzhiyun thread_count += cnt > 0 ? cnt : 0;
1031*4882a593Smuzhiyun }
1032*4882a593Smuzhiyun }
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) {
1035*4882a593Smuzhiyun if (dmatest == 1) {
1036*4882a593Smuzhiyun cnt = dmatest_add_threads(info, dtc, DMA_MEMSET);
1037*4882a593Smuzhiyun thread_count += cnt > 0 ? cnt : 0;
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun }
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
1042*4882a593Smuzhiyun cnt = dmatest_add_threads(info, dtc, DMA_XOR);
1043*4882a593Smuzhiyun thread_count += cnt > 0 ? cnt : 0;
1044*4882a593Smuzhiyun }
1045*4882a593Smuzhiyun if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
1046*4882a593Smuzhiyun cnt = dmatest_add_threads(info, dtc, DMA_PQ);
1047*4882a593Smuzhiyun thread_count += cnt > 0 ? cnt : 0;
1048*4882a593Smuzhiyun }
1049*4882a593Smuzhiyun
1050*4882a593Smuzhiyun pr_info("Added %u threads using %s\n",
1051*4882a593Smuzhiyun thread_count, dma_chan_name(chan));
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun list_add_tail(&dtc->node, &info->channels);
1054*4882a593Smuzhiyun info->nr_channels++;
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun return 0;
1057*4882a593Smuzhiyun }
1058*4882a593Smuzhiyun
filter(struct dma_chan * chan,void * param)1059*4882a593Smuzhiyun static bool filter(struct dma_chan *chan, void *param)
1060*4882a593Smuzhiyun {
1061*4882a593Smuzhiyun return dmatest_match_channel(param, chan) && dmatest_match_device(param, chan->device);
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun
request_channels(struct dmatest_info * info,enum dma_transaction_type type)1064*4882a593Smuzhiyun static void request_channels(struct dmatest_info *info,
1065*4882a593Smuzhiyun enum dma_transaction_type type)
1066*4882a593Smuzhiyun {
1067*4882a593Smuzhiyun dma_cap_mask_t mask;
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun dma_cap_zero(mask);
1070*4882a593Smuzhiyun dma_cap_set(type, mask);
1071*4882a593Smuzhiyun for (;;) {
1072*4882a593Smuzhiyun struct dmatest_params *params = &info->params;
1073*4882a593Smuzhiyun struct dma_chan *chan;
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun chan = dma_request_channel(mask, filter, params);
1076*4882a593Smuzhiyun if (chan) {
1077*4882a593Smuzhiyun if (dmatest_add_channel(info, chan)) {
1078*4882a593Smuzhiyun dma_release_channel(chan);
1079*4882a593Smuzhiyun break; /* add_channel failed, punt */
1080*4882a593Smuzhiyun }
1081*4882a593Smuzhiyun } else
1082*4882a593Smuzhiyun break; /* no more channels available */
1083*4882a593Smuzhiyun if (params->max_channels &&
1084*4882a593Smuzhiyun info->nr_channels >= params->max_channels)
1085*4882a593Smuzhiyun break; /* we have all we need */
1086*4882a593Smuzhiyun }
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun
add_threaded_test(struct dmatest_info * info)1089*4882a593Smuzhiyun static void add_threaded_test(struct dmatest_info *info)
1090*4882a593Smuzhiyun {
1091*4882a593Smuzhiyun struct dmatest_params *params = &info->params;
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun /* Copy test parameters */
1094*4882a593Smuzhiyun params->buf_size = test_buf_size;
1095*4882a593Smuzhiyun strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
1096*4882a593Smuzhiyun strlcpy(params->device, strim(test_device), sizeof(params->device));
1097*4882a593Smuzhiyun params->threads_per_chan = threads_per_chan;
1098*4882a593Smuzhiyun params->max_channels = max_channels;
1099*4882a593Smuzhiyun params->iterations = iterations;
1100*4882a593Smuzhiyun params->xor_sources = xor_sources;
1101*4882a593Smuzhiyun params->pq_sources = pq_sources;
1102*4882a593Smuzhiyun params->timeout = timeout;
1103*4882a593Smuzhiyun params->noverify = noverify;
1104*4882a593Smuzhiyun params->norandom = norandom;
1105*4882a593Smuzhiyun params->alignment = alignment;
1106*4882a593Smuzhiyun params->transfer_size = transfer_size;
1107*4882a593Smuzhiyun params->polled = polled;
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun request_channels(info, DMA_MEMCPY);
1110*4882a593Smuzhiyun request_channels(info, DMA_MEMSET);
1111*4882a593Smuzhiyun request_channels(info, DMA_XOR);
1112*4882a593Smuzhiyun request_channels(info, DMA_PQ);
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun
run_pending_tests(struct dmatest_info * info)1115*4882a593Smuzhiyun static void run_pending_tests(struct dmatest_info *info)
1116*4882a593Smuzhiyun {
1117*4882a593Smuzhiyun struct dmatest_chan *dtc;
1118*4882a593Smuzhiyun unsigned int thread_count = 0;
1119*4882a593Smuzhiyun
1120*4882a593Smuzhiyun list_for_each_entry(dtc, &info->channels, node) {
1121*4882a593Smuzhiyun struct dmatest_thread *thread;
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun thread_count = 0;
1124*4882a593Smuzhiyun list_for_each_entry(thread, &dtc->threads, node) {
1125*4882a593Smuzhiyun wake_up_process(thread->task);
1126*4882a593Smuzhiyun thread_count++;
1127*4882a593Smuzhiyun }
1128*4882a593Smuzhiyun pr_info("Started %u threads using %s\n",
1129*4882a593Smuzhiyun thread_count, dma_chan_name(dtc->chan));
1130*4882a593Smuzhiyun }
1131*4882a593Smuzhiyun }
1132*4882a593Smuzhiyun
stop_threaded_test(struct dmatest_info * info)1133*4882a593Smuzhiyun static void stop_threaded_test(struct dmatest_info *info)
1134*4882a593Smuzhiyun {
1135*4882a593Smuzhiyun struct dmatest_chan *dtc, *_dtc;
1136*4882a593Smuzhiyun struct dma_chan *chan;
1137*4882a593Smuzhiyun
1138*4882a593Smuzhiyun list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
1139*4882a593Smuzhiyun list_del(&dtc->node);
1140*4882a593Smuzhiyun chan = dtc->chan;
1141*4882a593Smuzhiyun dmatest_cleanup_channel(dtc);
1142*4882a593Smuzhiyun pr_debug("dropped channel %s\n", dma_chan_name(chan));
1143*4882a593Smuzhiyun dma_release_channel(chan);
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun
1146*4882a593Smuzhiyun info->nr_channels = 0;
1147*4882a593Smuzhiyun }
1148*4882a593Smuzhiyun
start_threaded_tests(struct dmatest_info * info)1149*4882a593Smuzhiyun static void start_threaded_tests(struct dmatest_info *info)
1150*4882a593Smuzhiyun {
1151*4882a593Smuzhiyun /* we might be called early to set run=, defer running until all
1152*4882a593Smuzhiyun * parameters have been evaluated
1153*4882a593Smuzhiyun */
1154*4882a593Smuzhiyun if (!info->did_init)
1155*4882a593Smuzhiyun return;
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun run_pending_tests(info);
1158*4882a593Smuzhiyun }
1159*4882a593Smuzhiyun
dmatest_run_get(char * val,const struct kernel_param * kp)1160*4882a593Smuzhiyun static int dmatest_run_get(char *val, const struct kernel_param *kp)
1161*4882a593Smuzhiyun {
1162*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
1163*4882a593Smuzhiyun
1164*4882a593Smuzhiyun mutex_lock(&info->lock);
1165*4882a593Smuzhiyun if (is_threaded_test_run(info)) {
1166*4882a593Smuzhiyun dmatest_run = true;
1167*4882a593Smuzhiyun } else {
1168*4882a593Smuzhiyun if (!is_threaded_test_pending(info))
1169*4882a593Smuzhiyun stop_threaded_test(info);
1170*4882a593Smuzhiyun dmatest_run = false;
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun mutex_unlock(&info->lock);
1173*4882a593Smuzhiyun
1174*4882a593Smuzhiyun return param_get_bool(val, kp);
1175*4882a593Smuzhiyun }
1176*4882a593Smuzhiyun
dmatest_run_set(const char * val,const struct kernel_param * kp)1177*4882a593Smuzhiyun static int dmatest_run_set(const char *val, const struct kernel_param *kp)
1178*4882a593Smuzhiyun {
1179*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
1180*4882a593Smuzhiyun int ret;
1181*4882a593Smuzhiyun
1182*4882a593Smuzhiyun mutex_lock(&info->lock);
1183*4882a593Smuzhiyun ret = param_set_bool(val, kp);
1184*4882a593Smuzhiyun if (ret) {
1185*4882a593Smuzhiyun mutex_unlock(&info->lock);
1186*4882a593Smuzhiyun return ret;
1187*4882a593Smuzhiyun } else if (dmatest_run) {
1188*4882a593Smuzhiyun if (!is_threaded_test_pending(info)) {
1189*4882a593Smuzhiyun /*
1190*4882a593Smuzhiyun * We have nothing to run. This can be due to:
1191*4882a593Smuzhiyun */
1192*4882a593Smuzhiyun ret = info->last_error;
1193*4882a593Smuzhiyun if (ret) {
1194*4882a593Smuzhiyun /* 1) Misconfiguration */
1195*4882a593Smuzhiyun pr_err("Channel misconfigured, can't continue\n");
1196*4882a593Smuzhiyun mutex_unlock(&info->lock);
1197*4882a593Smuzhiyun return ret;
1198*4882a593Smuzhiyun } else {
1199*4882a593Smuzhiyun /* 2) We rely on defaults */
1200*4882a593Smuzhiyun pr_info("No channels configured, continue with any\n");
1201*4882a593Smuzhiyun if (!is_threaded_test_run(info))
1202*4882a593Smuzhiyun stop_threaded_test(info);
1203*4882a593Smuzhiyun add_threaded_test(info);
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun }
1206*4882a593Smuzhiyun start_threaded_tests(info);
1207*4882a593Smuzhiyun } else {
1208*4882a593Smuzhiyun stop_threaded_test(info);
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun
1211*4882a593Smuzhiyun mutex_unlock(&info->lock);
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun return ret;
1214*4882a593Smuzhiyun }
1215*4882a593Smuzhiyun
dmatest_chan_set(const char * val,const struct kernel_param * kp)1216*4882a593Smuzhiyun static int dmatest_chan_set(const char *val, const struct kernel_param *kp)
1217*4882a593Smuzhiyun {
1218*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
1219*4882a593Smuzhiyun struct dmatest_chan *dtc;
1220*4882a593Smuzhiyun char chan_reset_val[20];
1221*4882a593Smuzhiyun int ret;
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun mutex_lock(&info->lock);
1224*4882a593Smuzhiyun ret = param_set_copystring(val, kp);
1225*4882a593Smuzhiyun if (ret) {
1226*4882a593Smuzhiyun mutex_unlock(&info->lock);
1227*4882a593Smuzhiyun return ret;
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun /*Clear any previously run threads */
1230*4882a593Smuzhiyun if (!is_threaded_test_run(info) && !is_threaded_test_pending(info))
1231*4882a593Smuzhiyun stop_threaded_test(info);
1232*4882a593Smuzhiyun /* Reject channels that are already registered */
1233*4882a593Smuzhiyun if (is_threaded_test_pending(info)) {
1234*4882a593Smuzhiyun list_for_each_entry(dtc, &info->channels, node) {
1235*4882a593Smuzhiyun if (strcmp(dma_chan_name(dtc->chan),
1236*4882a593Smuzhiyun strim(test_channel)) == 0) {
1237*4882a593Smuzhiyun dtc = list_last_entry(&info->channels,
1238*4882a593Smuzhiyun struct dmatest_chan,
1239*4882a593Smuzhiyun node);
1240*4882a593Smuzhiyun strlcpy(chan_reset_val,
1241*4882a593Smuzhiyun dma_chan_name(dtc->chan),
1242*4882a593Smuzhiyun sizeof(chan_reset_val));
1243*4882a593Smuzhiyun ret = -EBUSY;
1244*4882a593Smuzhiyun goto add_chan_err;
1245*4882a593Smuzhiyun }
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun }
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun add_threaded_test(info);
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun /* Check if channel was added successfully */
1252*4882a593Smuzhiyun if (!list_empty(&info->channels)) {
1253*4882a593Smuzhiyun /*
1254*4882a593Smuzhiyun * if new channel was not successfully added, revert the
1255*4882a593Smuzhiyun * "test_channel" string to the name of the last successfully
1256*4882a593Smuzhiyun * added channel. exception for when users issues empty string
1257*4882a593Smuzhiyun * to channel parameter.
1258*4882a593Smuzhiyun */
1259*4882a593Smuzhiyun dtc = list_last_entry(&info->channels, struct dmatest_chan, node);
1260*4882a593Smuzhiyun if ((strcmp(dma_chan_name(dtc->chan), strim(test_channel)) != 0)
1261*4882a593Smuzhiyun && (strcmp("", strim(test_channel)) != 0)) {
1262*4882a593Smuzhiyun ret = -EINVAL;
1263*4882a593Smuzhiyun strlcpy(chan_reset_val, dma_chan_name(dtc->chan),
1264*4882a593Smuzhiyun sizeof(chan_reset_val));
1265*4882a593Smuzhiyun goto add_chan_err;
1266*4882a593Smuzhiyun }
1267*4882a593Smuzhiyun
1268*4882a593Smuzhiyun } else {
1269*4882a593Smuzhiyun /* Clear test_channel if no channels were added successfully */
1270*4882a593Smuzhiyun strlcpy(chan_reset_val, "", sizeof(chan_reset_val));
1271*4882a593Smuzhiyun ret = -EBUSY;
1272*4882a593Smuzhiyun goto add_chan_err;
1273*4882a593Smuzhiyun }
1274*4882a593Smuzhiyun
1275*4882a593Smuzhiyun info->last_error = ret;
1276*4882a593Smuzhiyun mutex_unlock(&info->lock);
1277*4882a593Smuzhiyun
1278*4882a593Smuzhiyun return ret;
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun add_chan_err:
1281*4882a593Smuzhiyun param_set_copystring(chan_reset_val, kp);
1282*4882a593Smuzhiyun info->last_error = ret;
1283*4882a593Smuzhiyun mutex_unlock(&info->lock);
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun return ret;
1286*4882a593Smuzhiyun }
1287*4882a593Smuzhiyun
dmatest_chan_get(char * val,const struct kernel_param * kp)1288*4882a593Smuzhiyun static int dmatest_chan_get(char *val, const struct kernel_param *kp)
1289*4882a593Smuzhiyun {
1290*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
1291*4882a593Smuzhiyun
1292*4882a593Smuzhiyun mutex_lock(&info->lock);
1293*4882a593Smuzhiyun if (!is_threaded_test_run(info) && !is_threaded_test_pending(info)) {
1294*4882a593Smuzhiyun stop_threaded_test(info);
1295*4882a593Smuzhiyun strlcpy(test_channel, "", sizeof(test_channel));
1296*4882a593Smuzhiyun }
1297*4882a593Smuzhiyun mutex_unlock(&info->lock);
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun return param_get_string(val, kp);
1300*4882a593Smuzhiyun }
1301*4882a593Smuzhiyun
dmatest_test_list_get(char * val,const struct kernel_param * kp)1302*4882a593Smuzhiyun static int dmatest_test_list_get(char *val, const struct kernel_param *kp)
1303*4882a593Smuzhiyun {
1304*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
1305*4882a593Smuzhiyun struct dmatest_chan *dtc;
1306*4882a593Smuzhiyun unsigned int thread_count = 0;
1307*4882a593Smuzhiyun
1308*4882a593Smuzhiyun list_for_each_entry(dtc, &info->channels, node) {
1309*4882a593Smuzhiyun struct dmatest_thread *thread;
1310*4882a593Smuzhiyun
1311*4882a593Smuzhiyun thread_count = 0;
1312*4882a593Smuzhiyun list_for_each_entry(thread, &dtc->threads, node) {
1313*4882a593Smuzhiyun thread_count++;
1314*4882a593Smuzhiyun }
1315*4882a593Smuzhiyun pr_info("%u threads using %s\n",
1316*4882a593Smuzhiyun thread_count, dma_chan_name(dtc->chan));
1317*4882a593Smuzhiyun }
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun return 0;
1320*4882a593Smuzhiyun }
1321*4882a593Smuzhiyun
dmatest_init(void)1322*4882a593Smuzhiyun static int __init dmatest_init(void)
1323*4882a593Smuzhiyun {
1324*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
1325*4882a593Smuzhiyun struct dmatest_params *params = &info->params;
1326*4882a593Smuzhiyun
1327*4882a593Smuzhiyun if (dmatest_run) {
1328*4882a593Smuzhiyun mutex_lock(&info->lock);
1329*4882a593Smuzhiyun add_threaded_test(info);
1330*4882a593Smuzhiyun run_pending_tests(info);
1331*4882a593Smuzhiyun mutex_unlock(&info->lock);
1332*4882a593Smuzhiyun }
1333*4882a593Smuzhiyun
1334*4882a593Smuzhiyun if (params->iterations && wait)
1335*4882a593Smuzhiyun wait_event(thread_wait, !is_threaded_test_run(info));
1336*4882a593Smuzhiyun
1337*4882a593Smuzhiyun /* module parameters are stable, inittime tests are started,
1338*4882a593Smuzhiyun * let userspace take over 'run' control
1339*4882a593Smuzhiyun */
1340*4882a593Smuzhiyun info->did_init = true;
1341*4882a593Smuzhiyun
1342*4882a593Smuzhiyun return 0;
1343*4882a593Smuzhiyun }
1344*4882a593Smuzhiyun /* when compiled-in wait for drivers to load first */
1345*4882a593Smuzhiyun late_initcall(dmatest_init);
1346*4882a593Smuzhiyun
dmatest_exit(void)1347*4882a593Smuzhiyun static void __exit dmatest_exit(void)
1348*4882a593Smuzhiyun {
1349*4882a593Smuzhiyun struct dmatest_info *info = &test_info;
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun mutex_lock(&info->lock);
1352*4882a593Smuzhiyun stop_threaded_test(info);
1353*4882a593Smuzhiyun mutex_unlock(&info->lock);
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun module_exit(dmatest_exit);
1356*4882a593Smuzhiyun
1357*4882a593Smuzhiyun MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1358*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1359