1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Bestcomm FEC RX task microcode 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2004 Freescale Semiconductor, Inc. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Automatically created based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex 8*4882a593Smuzhiyun * on Tue Mar 22 11:19:38 2005 GMT 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <asm/types.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* 14*4882a593Smuzhiyun * The header consists of the following fields: 15*4882a593Smuzhiyun * u32 magic; 16*4882a593Smuzhiyun * u8 desc_size; 17*4882a593Smuzhiyun * u8 var_size; 18*4882a593Smuzhiyun * u8 inc_size; 19*4882a593Smuzhiyun * u8 first_var; 20*4882a593Smuzhiyun * u8 reserved[8]; 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * The size fields contain the number of 32-bit words. 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun u32 bcom_fec_rx_task[] = { 26*4882a593Smuzhiyun /* header */ 27*4882a593Smuzhiyun 0x4243544b, 28*4882a593Smuzhiyun 0x18060709, 29*4882a593Smuzhiyun 0x00000000, 30*4882a593Smuzhiyun 0x00000000, 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Task descriptors */ 33*4882a593Smuzhiyun 0x808220e3, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc4, idx1 += inc3 */ 34*4882a593Smuzhiyun 0x10601010, /* DRD1A: var4 = var2; FN=0 MORE init=3 WS=0 RS=0 */ 35*4882a593Smuzhiyun 0xb8800264, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc4, idx3 += inc4 */ 36*4882a593Smuzhiyun 0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */ 37*4882a593Smuzhiyun 0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */ 38*4882a593Smuzhiyun 0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */ 39*4882a593Smuzhiyun 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */ 40*4882a593Smuzhiyun 0xb8c58029, /* LCD: idx3 = *(idx1 + var00000015); idx3 once var0; idx3 += inc5 */ 41*4882a593Smuzhiyun 0x60000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=0 RS=0 */ 42*4882a593Smuzhiyun 0x088cf8cc, /* DRD2B1: idx2 = EU3(); EU3(idx3,var12) */ 43*4882a593Smuzhiyun 0x991982f2, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var11; idx2 += inc6, idx3 += inc2 */ 44*4882a593Smuzhiyun 0x006acf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=1 RS=1 */ 45*4882a593Smuzhiyun 0x80004000, /* LCDEXT: idx2 = 0x00000000; ; */ 46*4882a593Smuzhiyun 0x9999802d, /* LCD: idx3 = idx3; idx3 once var0; idx3 += inc5 */ 47*4882a593Smuzhiyun 0x70000002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT MORE init=0 WS=0 RS=0 */ 48*4882a593Smuzhiyun 0x034cfc4e, /* DRD2B1: var13 = EU3(); EU3(*idx1,var14) */ 49*4882a593Smuzhiyun 0x00008868, /* DRD1A: idx2 = var13; FN=0 init=0 WS=0 RS=0 */ 50*4882a593Smuzhiyun 0x99198341, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var13; idx2 += inc0, idx3 += inc1 */ 51*4882a593Smuzhiyun 0x007ecf80, /* DRD1A: *idx3 = *idx0; FN=0 init=3 WS=3 RS=3 */ 52*4882a593Smuzhiyun 0x99198272, /* LCD: idx2 = idx2, idx3 = idx3; idx2 > var9; idx2 += inc6, idx3 += inc2 */ 53*4882a593Smuzhiyun 0x046acf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=3 WS=1 RS=1 */ 54*4882a593Smuzhiyun 0x9819002d, /* LCD: idx2 = idx0; idx2 once var0; idx2 += inc5 */ 55*4882a593Smuzhiyun 0x0060c790, /* DRD1A: *idx1 = *idx2; FN=0 init=3 WS=0 RS=0 */ 56*4882a593Smuzhiyun 0x000001f8, /* NOP */ 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun /* VAR[9]-VAR[14] */ 59*4882a593Smuzhiyun 0x40000000, 60*4882a593Smuzhiyun 0x7fff7fff, 61*4882a593Smuzhiyun 0x00000000, 62*4882a593Smuzhiyun 0x00000003, 63*4882a593Smuzhiyun 0x40000008, 64*4882a593Smuzhiyun 0x43ffffff, 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* INC[0]-INC[6] */ 67*4882a593Smuzhiyun 0x40000000, 68*4882a593Smuzhiyun 0xe0000000, 69*4882a593Smuzhiyun 0xe0000000, 70*4882a593Smuzhiyun 0xa0000008, 71*4882a593Smuzhiyun 0x20000000, 72*4882a593Smuzhiyun 0x00000000, 73*4882a593Smuzhiyun 0x4000ffff, 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76