1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun /* Copyright (c) 2018 Rockchip Electronics Co. Ltd. */
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #ifndef __RK_CRYPTO_V2_H__
6*4882a593Smuzhiyun #define __RK_CRYPTO_V2_H__
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include "rk_crypto_utils.h"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun struct rk_hw_crypto_v2_info {
13*4882a593Smuzhiyun struct rk_hw_desc hw_desc;
14*4882a593Smuzhiyun };
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #define RK_CRYPTO_V2_SOC_DATA_INIT(names, soft_aes_192) {\
17*4882a593Smuzhiyun .crypto_ver = "CRYPTO V2.0.0.0",\
18*4882a593Smuzhiyun .use_soft_aes192 = soft_aes_192,\
19*4882a593Smuzhiyun .valid_algs_name = (names),\
20*4882a593Smuzhiyun .valid_algs_num = ARRAY_SIZE(names),\
21*4882a593Smuzhiyun .hw_init = rk_hw_crypto_v2_init,\
22*4882a593Smuzhiyun .hw_deinit = rk_hw_crypto_v2_deinit,\
23*4882a593Smuzhiyun .hw_get_rsts = rk_hw_crypto_v2_get_rsts,\
24*4882a593Smuzhiyun .hw_get_algts = rk_hw_crypto_v2_get_algts,\
25*4882a593Smuzhiyun .hw_is_algo_valid = rk_hw_crypto_v2_algo_valid,\
26*4882a593Smuzhiyun .hw_info_size = sizeof(struct rk_hw_crypto_v2_info),\
27*4882a593Smuzhiyun .default_pka_offset = 0x0480,\
28*4882a593Smuzhiyun .use_lli_chain = true,\
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_CRYPTO_DEV_ROCKCHIP_V2)
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ecb_sm4_alg;
34*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cbc_sm4_alg;
35*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_xts_sm4_alg;
36*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cfb_sm4_alg;
37*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ofb_sm4_alg;
38*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ctr_sm4_alg;
39*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_gcm_sm4_alg;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ecb_aes_alg;
42*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cbc_aes_alg;
43*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_xts_aes_alg;
44*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cfb_aes_alg;
45*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ofb_aes_alg;
46*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ctr_aes_alg;
47*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_gcm_aes_alg;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ecb_des_alg;
50*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cbc_des_alg;
51*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cfb_des_alg;
52*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ofb_des_alg;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ecb_des3_ede_alg;
55*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cbc_des3_ede_alg;
56*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_cfb_des3_ede_alg;
57*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ofb_des3_ede_alg;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ahash_sha1;
60*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ahash_sha224;
61*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ahash_sha256;
62*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ahash_sha384;
63*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ahash_sha512;
64*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ahash_md5;
65*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_ahash_sm3;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_hmac_md5;
68*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_hmac_sha1;
69*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_hmac_sha256;
70*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_hmac_sha512;
71*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_hmac_sm3;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun extern struct rk_crypto_algt rk_v2_asym_rsa;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun int rk_hw_crypto_v2_init(struct device *dev, void *hw_info);
76*4882a593Smuzhiyun void rk_hw_crypto_v2_deinit(struct device *dev, void *hw_info);
77*4882a593Smuzhiyun const char * const *rk_hw_crypto_v2_get_rsts(uint32_t *num);
78*4882a593Smuzhiyun struct rk_crypto_algt **rk_hw_crypto_v2_get_algts(uint32_t *num);
79*4882a593Smuzhiyun bool rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev *rk_dev, struct rk_crypto_algt *aglt);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #else
82*4882a593Smuzhiyun
rk_hw_crypto_v2_init(struct device * dev,void * hw_info)83*4882a593Smuzhiyun static inline int rk_hw_crypto_v2_init(struct device *dev, void *hw_info) { return -EINVAL; }
rk_hw_crypto_v2_deinit(struct device * dev,void * hw_info)84*4882a593Smuzhiyun static inline void rk_hw_crypto_v2_deinit(struct device *dev, void *hw_info) {}
rk_hw_crypto_v2_get_rsts(uint32_t * num)85*4882a593Smuzhiyun static inline const char * const *rk_hw_crypto_v2_get_rsts(uint32_t *num) { return NULL; }
rk_hw_crypto_v2_get_algts(uint32_t * num)86*4882a593Smuzhiyun static inline struct rk_crypto_algt **rk_hw_crypto_v2_get_algts(uint32_t *num) { return NULL; }
rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev * rk_dev,struct rk_crypto_algt * aglt)87*4882a593Smuzhiyun static inline bool rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev *rk_dev,
88*4882a593Smuzhiyun struct rk_crypto_algt *aglt)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun return false;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun #endif /* end of IS_ENABLED(CONFIG_CRYPTO_DEV_ROCKCHIP_V2) */
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun #endif /* end of __RK_CRYPTO_V2_H__ */
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