1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Crypto acceleration support for Rockchip Crypto V2
4 *
5 * Copyright (c) 2022, Rockchip Electronics Co., Ltd
6 *
7 * Author: Lin Jinhan <troy.lin@rock-chips.com>
8 *
9 */
10
11 #include "rk_crypto_core.h"
12 #include "rk_crypto_v2.h"
13
14 static const char * const crypto_v2_rsts[] = {
15 "crypto-rst",
16 };
17
18 static struct rk_crypto_algt *crypto_v2_algs[] = {
19 &rk_v2_ecb_sm4_alg, /* ecb(sm4) */
20 &rk_v2_cbc_sm4_alg, /* cbc(sm4) */
21 &rk_v2_xts_sm4_alg, /* xts(sm4) */
22 &rk_v2_cfb_sm4_alg, /* cfb(sm4) */
23 &rk_v2_ofb_sm4_alg, /* ofb(sm4) */
24 &rk_v2_ctr_sm4_alg, /* ctr(sm4) */
25 &rk_v2_gcm_sm4_alg, /* gcm(sm4) */
26
27 &rk_v2_ecb_aes_alg, /* ecb(aes) */
28 &rk_v2_cbc_aes_alg, /* cbc(aes) */
29 &rk_v2_xts_aes_alg, /* xts(aes) */
30 &rk_v2_cfb_aes_alg, /* cfb(aes) */
31 &rk_v2_ofb_aes_alg, /* ofb(aes) */
32 &rk_v2_ctr_aes_alg, /* ctr(aes) */
33 &rk_v2_gcm_aes_alg, /* gcm(aes) */
34
35 &rk_v2_ecb_des_alg, /* ecb(des) */
36 &rk_v2_cbc_des_alg, /* cbc(des) */
37 &rk_v2_cfb_des_alg, /* cfb(des) */
38 &rk_v2_ofb_des_alg, /* ofb(des) */
39
40 &rk_v2_ecb_des3_ede_alg, /* ecb(des3_ede) */
41 &rk_v2_cbc_des3_ede_alg, /* cbc(des3_ede) */
42 &rk_v2_cfb_des3_ede_alg, /* cfb(des3_ede) */
43 &rk_v2_ofb_des3_ede_alg, /* ofb(des3_ede) */
44
45 &rk_v2_ahash_sha1, /* sha1 */
46 &rk_v2_ahash_sha224, /* sha224 */
47 &rk_v2_ahash_sha256, /* sha256 */
48 &rk_v2_ahash_sha384, /* sha384 */
49 &rk_v2_ahash_sha512, /* sha512 */
50 &rk_v2_ahash_md5, /* md5 */
51 &rk_v2_ahash_sm3, /* sm3 */
52
53 &rk_v2_hmac_sha1, /* hmac(sha1) */
54 &rk_v2_hmac_sha256, /* hmac(sha256) */
55 &rk_v2_hmac_sha512, /* hmac(sha512) */
56 &rk_v2_hmac_md5, /* hmac(md5) */
57 &rk_v2_hmac_sm3, /* hmac(sm3) */
58
59 &rk_v2_asym_rsa, /* rsa */
60 };
61
rk_hw_crypto_v2_init(struct device * dev,void * hw_info)62 int rk_hw_crypto_v2_init(struct device *dev, void *hw_info)
63 {
64 struct rk_hw_crypto_v2_info *info =
65 (struct rk_hw_crypto_v2_info *)hw_info;
66
67 if (!dev || !hw_info)
68 return -EINVAL;
69
70 memset(info, 0x00, sizeof(*info));
71
72 return rk_crypto_hw_desc_alloc(dev, &info->hw_desc);
73 }
74
rk_hw_crypto_v2_deinit(struct device * dev,void * hw_info)75 void rk_hw_crypto_v2_deinit(struct device *dev, void *hw_info)
76 {
77 struct rk_hw_crypto_v2_info *info =
78 (struct rk_hw_crypto_v2_info *)hw_info;
79
80 if (!dev || !hw_info)
81 return;
82
83 rk_crypto_hw_desc_free(&info->hw_desc);
84 }
85
rk_hw_crypto_v2_get_rsts(uint32_t * num)86 const char * const *rk_hw_crypto_v2_get_rsts(uint32_t *num)
87 {
88 *num = ARRAY_SIZE(crypto_v2_rsts);
89
90 return crypto_v2_rsts;
91 }
92
rk_hw_crypto_v2_get_algts(uint32_t * num)93 struct rk_crypto_algt **rk_hw_crypto_v2_get_algts(uint32_t *num)
94 {
95 *num = ARRAY_SIZE(crypto_v2_algs);
96
97 return crypto_v2_algs;
98 }
99
rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev * rk_dev,struct rk_crypto_algt * aglt)100 bool rk_hw_crypto_v2_algo_valid(struct rk_crypto_dev *rk_dev, struct rk_crypto_algt *aglt)
101 {
102 return true;
103 }
104
105