xref: /OK3568_Linux_fs/kernel/drivers/crypto/qce/dma.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/dmaengine.h>
7*4882a593Smuzhiyun #include <crypto/scatterwalk.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include "dma.h"
10*4882a593Smuzhiyun 
qce_dma_request(struct device * dev,struct qce_dma_data * dma)11*4882a593Smuzhiyun int qce_dma_request(struct device *dev, struct qce_dma_data *dma)
12*4882a593Smuzhiyun {
13*4882a593Smuzhiyun 	int ret;
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun 	dma->txchan = dma_request_chan(dev, "tx");
16*4882a593Smuzhiyun 	if (IS_ERR(dma->txchan))
17*4882a593Smuzhiyun 		return PTR_ERR(dma->txchan);
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun 	dma->rxchan = dma_request_chan(dev, "rx");
20*4882a593Smuzhiyun 	if (IS_ERR(dma->rxchan)) {
21*4882a593Smuzhiyun 		ret = PTR_ERR(dma->rxchan);
22*4882a593Smuzhiyun 		goto error_rx;
23*4882a593Smuzhiyun 	}
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun 	dma->result_buf = kmalloc(QCE_RESULT_BUF_SZ + QCE_IGNORE_BUF_SZ,
26*4882a593Smuzhiyun 				  GFP_KERNEL);
27*4882a593Smuzhiyun 	if (!dma->result_buf) {
28*4882a593Smuzhiyun 		ret = -ENOMEM;
29*4882a593Smuzhiyun 		goto error_nomem;
30*4882a593Smuzhiyun 	}
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	dma->ignore_buf = dma->result_buf + QCE_RESULT_BUF_SZ;
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	return 0;
35*4882a593Smuzhiyun error_nomem:
36*4882a593Smuzhiyun 	dma_release_channel(dma->rxchan);
37*4882a593Smuzhiyun error_rx:
38*4882a593Smuzhiyun 	dma_release_channel(dma->txchan);
39*4882a593Smuzhiyun 	return ret;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun 
qce_dma_release(struct qce_dma_data * dma)42*4882a593Smuzhiyun void qce_dma_release(struct qce_dma_data *dma)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	dma_release_channel(dma->txchan);
45*4882a593Smuzhiyun 	dma_release_channel(dma->rxchan);
46*4882a593Smuzhiyun 	kfree(dma->result_buf);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun struct scatterlist *
qce_sgtable_add(struct sg_table * sgt,struct scatterlist * new_sgl,unsigned int max_len)50*4882a593Smuzhiyun qce_sgtable_add(struct sg_table *sgt, struct scatterlist *new_sgl,
51*4882a593Smuzhiyun 		unsigned int max_len)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct scatterlist *sg = sgt->sgl, *sg_last = NULL;
54*4882a593Smuzhiyun 	unsigned int new_len;
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	while (sg) {
57*4882a593Smuzhiyun 		if (!sg_page(sg))
58*4882a593Smuzhiyun 			break;
59*4882a593Smuzhiyun 		sg = sg_next(sg);
60*4882a593Smuzhiyun 	}
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	if (!sg)
63*4882a593Smuzhiyun 		return ERR_PTR(-EINVAL);
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	while (new_sgl && sg && max_len) {
66*4882a593Smuzhiyun 		new_len = new_sgl->length > max_len ? max_len : new_sgl->length;
67*4882a593Smuzhiyun 		sg_set_page(sg, sg_page(new_sgl), new_len, new_sgl->offset);
68*4882a593Smuzhiyun 		sg_last = sg;
69*4882a593Smuzhiyun 		sg = sg_next(sg);
70*4882a593Smuzhiyun 		new_sgl = sg_next(new_sgl);
71*4882a593Smuzhiyun 		max_len -= new_len;
72*4882a593Smuzhiyun 	}
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	return sg_last;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
qce_dma_prep_sg(struct dma_chan * chan,struct scatterlist * sg,int nents,unsigned long flags,enum dma_transfer_direction dir,dma_async_tx_callback cb,void * cb_param)77*4882a593Smuzhiyun static int qce_dma_prep_sg(struct dma_chan *chan, struct scatterlist *sg,
78*4882a593Smuzhiyun 			   int nents, unsigned long flags,
79*4882a593Smuzhiyun 			   enum dma_transfer_direction dir,
80*4882a593Smuzhiyun 			   dma_async_tx_callback cb, void *cb_param)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	struct dma_async_tx_descriptor *desc;
83*4882a593Smuzhiyun 	dma_cookie_t cookie;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	if (!sg || !nents)
86*4882a593Smuzhiyun 		return -EINVAL;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	desc = dmaengine_prep_slave_sg(chan, sg, nents, dir, flags);
89*4882a593Smuzhiyun 	if (!desc)
90*4882a593Smuzhiyun 		return -EINVAL;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	desc->callback = cb;
93*4882a593Smuzhiyun 	desc->callback_param = cb_param;
94*4882a593Smuzhiyun 	cookie = dmaengine_submit(desc);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	return dma_submit_error(cookie);
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
qce_dma_prep_sgs(struct qce_dma_data * dma,struct scatterlist * rx_sg,int rx_nents,struct scatterlist * tx_sg,int tx_nents,dma_async_tx_callback cb,void * cb_param)99*4882a593Smuzhiyun int qce_dma_prep_sgs(struct qce_dma_data *dma, struct scatterlist *rx_sg,
100*4882a593Smuzhiyun 		     int rx_nents, struct scatterlist *tx_sg, int tx_nents,
101*4882a593Smuzhiyun 		     dma_async_tx_callback cb, void *cb_param)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun 	struct dma_chan *rxchan = dma->rxchan;
104*4882a593Smuzhiyun 	struct dma_chan *txchan = dma->txchan;
105*4882a593Smuzhiyun 	unsigned long flags = DMA_PREP_INTERRUPT | DMA_CTRL_ACK;
106*4882a593Smuzhiyun 	int ret;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	ret = qce_dma_prep_sg(rxchan, rx_sg, rx_nents, flags, DMA_MEM_TO_DEV,
109*4882a593Smuzhiyun 			     NULL, NULL);
110*4882a593Smuzhiyun 	if (ret)
111*4882a593Smuzhiyun 		return ret;
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 	return qce_dma_prep_sg(txchan, tx_sg, tx_nents, flags, DMA_DEV_TO_MEM,
114*4882a593Smuzhiyun 			       cb, cb_param);
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
qce_dma_issue_pending(struct qce_dma_data * dma)117*4882a593Smuzhiyun void qce_dma_issue_pending(struct qce_dma_data *dma)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	dma_async_issue_pending(dma->rxchan);
120*4882a593Smuzhiyun 	dma_async_issue_pending(dma->txchan);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun 
qce_dma_terminate_all(struct qce_dma_data * dma)123*4882a593Smuzhiyun int qce_dma_terminate_all(struct qce_dma_data *dma)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun 	int ret;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	ret = dmaengine_terminate_all(dma->rxchan);
128*4882a593Smuzhiyun 	return ret ?: dmaengine_terminate_all(dma->txchan);
129*4882a593Smuzhiyun }
130