xref: /OK3568_Linux_fs/kernel/drivers/crypto/exynos-rng.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * exynos-rng.c - Random Number Generator driver for the Exynos
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2017 Krzysztof Kozlowski <krzk@kernel.org>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Loosely based on old driver from drivers/char/hw_random/exynos-rng.c:
8*4882a593Smuzhiyun  * Copyright (C) 2012 Samsung Electronics
9*4882a593Smuzhiyun  * Jonghwa Lee <jonghwa3.lee@samsung.com>
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/clk.h>
13*4882a593Smuzhiyun #include <linux/crypto.h>
14*4882a593Smuzhiyun #include <linux/err.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/mutex.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <crypto/internal/rng.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define EXYNOS_RNG_CONTROL		0x0
24*4882a593Smuzhiyun #define EXYNOS_RNG_STATUS		0x10
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define EXYNOS_RNG_SEED_CONF		0x14
27*4882a593Smuzhiyun #define EXYNOS_RNG_GEN_PRNG	        BIT(1)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define EXYNOS_RNG_SEED_BASE		0x140
30*4882a593Smuzhiyun #define EXYNOS_RNG_SEED(n)		(EXYNOS_RNG_SEED_BASE + (n * 0x4))
31*4882a593Smuzhiyun #define EXYNOS_RNG_OUT_BASE		0x160
32*4882a593Smuzhiyun #define EXYNOS_RNG_OUT(n)		(EXYNOS_RNG_OUT_BASE + (n * 0x4))
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* EXYNOS_RNG_CONTROL bit fields */
35*4882a593Smuzhiyun #define EXYNOS_RNG_CONTROL_START	0x18
36*4882a593Smuzhiyun /* EXYNOS_RNG_STATUS bit fields */
37*4882a593Smuzhiyun #define EXYNOS_RNG_STATUS_SEED_SETTING_DONE	BIT(1)
38*4882a593Smuzhiyun #define EXYNOS_RNG_STATUS_RNG_DONE		BIT(5)
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /* Five seed and output registers, each 4 bytes */
41*4882a593Smuzhiyun #define EXYNOS_RNG_SEED_REGS		5
42*4882a593Smuzhiyun #define EXYNOS_RNG_SEED_SIZE		(EXYNOS_RNG_SEED_REGS * 4)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun enum exynos_prng_type {
45*4882a593Smuzhiyun 	EXYNOS_PRNG_UNKNOWN = 0,
46*4882a593Smuzhiyun 	EXYNOS_PRNG_EXYNOS4,
47*4882a593Smuzhiyun 	EXYNOS_PRNG_EXYNOS5,
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /*
51*4882a593Smuzhiyun  * Driver re-seeds itself with generated random numbers to hinder
52*4882a593Smuzhiyun  * backtracking of the original seed.
53*4882a593Smuzhiyun  *
54*4882a593Smuzhiyun  * Time for next re-seed in ms.
55*4882a593Smuzhiyun  */
56*4882a593Smuzhiyun #define EXYNOS_RNG_RESEED_TIME		1000
57*4882a593Smuzhiyun #define EXYNOS_RNG_RESEED_BYTES		65536
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun  * In polling mode, do not wait infinitely for the engine to finish the work.
61*4882a593Smuzhiyun  */
62*4882a593Smuzhiyun #define EXYNOS_RNG_WAIT_RETRIES		100
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun /* Context for crypto */
65*4882a593Smuzhiyun struct exynos_rng_ctx {
66*4882a593Smuzhiyun 	struct exynos_rng_dev		*rng;
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun /* Device associated memory */
70*4882a593Smuzhiyun struct exynos_rng_dev {
71*4882a593Smuzhiyun 	struct device			*dev;
72*4882a593Smuzhiyun 	enum exynos_prng_type		type;
73*4882a593Smuzhiyun 	void __iomem			*mem;
74*4882a593Smuzhiyun 	struct clk			*clk;
75*4882a593Smuzhiyun 	struct mutex 			lock;
76*4882a593Smuzhiyun 	/* Generated numbers stored for seeding during resume */
77*4882a593Smuzhiyun 	u8				seed_save[EXYNOS_RNG_SEED_SIZE];
78*4882a593Smuzhiyun 	unsigned int			seed_save_len;
79*4882a593Smuzhiyun 	/* Time of last seeding in jiffies */
80*4882a593Smuzhiyun 	unsigned long			last_seeding;
81*4882a593Smuzhiyun 	/* Bytes generated since last seeding */
82*4882a593Smuzhiyun 	unsigned long			bytes_seeding;
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun static struct exynos_rng_dev *exynos_rng_dev;
86*4882a593Smuzhiyun 
exynos_rng_readl(struct exynos_rng_dev * rng,u32 offset)87*4882a593Smuzhiyun static u32 exynos_rng_readl(struct exynos_rng_dev *rng, u32 offset)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun 	return readl_relaxed(rng->mem + offset);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
exynos_rng_writel(struct exynos_rng_dev * rng,u32 val,u32 offset)92*4882a593Smuzhiyun static void exynos_rng_writel(struct exynos_rng_dev *rng, u32 val, u32 offset)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	writel_relaxed(val, rng->mem + offset);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun 
exynos_rng_set_seed(struct exynos_rng_dev * rng,const u8 * seed,unsigned int slen)97*4882a593Smuzhiyun static int exynos_rng_set_seed(struct exynos_rng_dev *rng,
98*4882a593Smuzhiyun 			       const u8 *seed, unsigned int slen)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	u32 val;
101*4882a593Smuzhiyun 	int i;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	/* Round seed length because loop iterates over full register size */
104*4882a593Smuzhiyun 	slen = ALIGN_DOWN(slen, 4);
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	if (slen < EXYNOS_RNG_SEED_SIZE)
107*4882a593Smuzhiyun 		return -EINVAL;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	for (i = 0; i < slen ; i += 4) {
110*4882a593Smuzhiyun 		unsigned int seed_reg = (i / 4) % EXYNOS_RNG_SEED_REGS;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 		val = seed[i] << 24;
113*4882a593Smuzhiyun 		val |= seed[i + 1] << 16;
114*4882a593Smuzhiyun 		val |= seed[i + 2] << 8;
115*4882a593Smuzhiyun 		val |= seed[i + 3] << 0;
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 		exynos_rng_writel(rng, val, EXYNOS_RNG_SEED(seed_reg));
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	val = exynos_rng_readl(rng, EXYNOS_RNG_STATUS);
121*4882a593Smuzhiyun 	if (!(val & EXYNOS_RNG_STATUS_SEED_SETTING_DONE)) {
122*4882a593Smuzhiyun 		dev_warn(rng->dev, "Seed setting not finished\n");
123*4882a593Smuzhiyun 		return -EIO;
124*4882a593Smuzhiyun 	}
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	rng->last_seeding = jiffies;
127*4882a593Smuzhiyun 	rng->bytes_seeding = 0;
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun 	return 0;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun /*
133*4882a593Smuzhiyun  * Start the engine and poll for finish.  Then read from output registers
134*4882a593Smuzhiyun  * filling the 'dst' buffer up to 'dlen' bytes or up to size of generated
135*4882a593Smuzhiyun  * random data (EXYNOS_RNG_SEED_SIZE).
136*4882a593Smuzhiyun  *
137*4882a593Smuzhiyun  * On success: return 0 and store number of read bytes under 'read' address.
138*4882a593Smuzhiyun  * On error: return -ERRNO.
139*4882a593Smuzhiyun  */
exynos_rng_get_random(struct exynos_rng_dev * rng,u8 * dst,unsigned int dlen,unsigned int * read)140*4882a593Smuzhiyun static int exynos_rng_get_random(struct exynos_rng_dev *rng,
141*4882a593Smuzhiyun 				 u8 *dst, unsigned int dlen,
142*4882a593Smuzhiyun 				 unsigned int *read)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	int retry = EXYNOS_RNG_WAIT_RETRIES;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	if (rng->type == EXYNOS_PRNG_EXYNOS4) {
147*4882a593Smuzhiyun 		exynos_rng_writel(rng, EXYNOS_RNG_CONTROL_START,
148*4882a593Smuzhiyun 				  EXYNOS_RNG_CONTROL);
149*4882a593Smuzhiyun 	} else if (rng->type == EXYNOS_PRNG_EXYNOS5) {
150*4882a593Smuzhiyun 		exynos_rng_writel(rng, EXYNOS_RNG_GEN_PRNG,
151*4882a593Smuzhiyun 				  EXYNOS_RNG_SEED_CONF);
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	while (!(exynos_rng_readl(rng,
155*4882a593Smuzhiyun 			EXYNOS_RNG_STATUS) & EXYNOS_RNG_STATUS_RNG_DONE) && --retry)
156*4882a593Smuzhiyun 		cpu_relax();
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	if (!retry)
159*4882a593Smuzhiyun 		return -ETIMEDOUT;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	/* Clear status bit */
162*4882a593Smuzhiyun 	exynos_rng_writel(rng, EXYNOS_RNG_STATUS_RNG_DONE,
163*4882a593Smuzhiyun 			  EXYNOS_RNG_STATUS);
164*4882a593Smuzhiyun 	*read = min_t(size_t, dlen, EXYNOS_RNG_SEED_SIZE);
165*4882a593Smuzhiyun 	memcpy_fromio(dst, rng->mem + EXYNOS_RNG_OUT_BASE, *read);
166*4882a593Smuzhiyun 	rng->bytes_seeding += *read;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	return 0;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun /* Re-seed itself from time to time */
exynos_rng_reseed(struct exynos_rng_dev * rng)172*4882a593Smuzhiyun static void exynos_rng_reseed(struct exynos_rng_dev *rng)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun 	unsigned long next_seeding = rng->last_seeding + \
175*4882a593Smuzhiyun 				     msecs_to_jiffies(EXYNOS_RNG_RESEED_TIME);
176*4882a593Smuzhiyun 	unsigned long now = jiffies;
177*4882a593Smuzhiyun 	unsigned int read = 0;
178*4882a593Smuzhiyun 	u8 seed[EXYNOS_RNG_SEED_SIZE];
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	if (time_before(now, next_seeding) &&
181*4882a593Smuzhiyun 	    rng->bytes_seeding < EXYNOS_RNG_RESEED_BYTES)
182*4882a593Smuzhiyun 		return;
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	if (exynos_rng_get_random(rng, seed, sizeof(seed), &read))
185*4882a593Smuzhiyun 		return;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	exynos_rng_set_seed(rng, seed, read);
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	/* Let others do some of their job. */
190*4882a593Smuzhiyun 	mutex_unlock(&rng->lock);
191*4882a593Smuzhiyun 	mutex_lock(&rng->lock);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
exynos_rng_generate(struct crypto_rng * tfm,const u8 * src,unsigned int slen,u8 * dst,unsigned int dlen)194*4882a593Smuzhiyun static int exynos_rng_generate(struct crypto_rng *tfm,
195*4882a593Smuzhiyun 			       const u8 *src, unsigned int slen,
196*4882a593Smuzhiyun 			       u8 *dst, unsigned int dlen)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
199*4882a593Smuzhiyun 	struct exynos_rng_dev *rng = ctx->rng;
200*4882a593Smuzhiyun 	unsigned int read = 0;
201*4882a593Smuzhiyun 	int ret;
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	ret = clk_prepare_enable(rng->clk);
204*4882a593Smuzhiyun 	if (ret)
205*4882a593Smuzhiyun 		return ret;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	mutex_lock(&rng->lock);
208*4882a593Smuzhiyun 	do {
209*4882a593Smuzhiyun 		ret = exynos_rng_get_random(rng, dst, dlen, &read);
210*4882a593Smuzhiyun 		if (ret)
211*4882a593Smuzhiyun 			break;
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 		dlen -= read;
214*4882a593Smuzhiyun 		dst += read;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 		exynos_rng_reseed(rng);
217*4882a593Smuzhiyun 	} while (dlen > 0);
218*4882a593Smuzhiyun 	mutex_unlock(&rng->lock);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	clk_disable_unprepare(rng->clk);
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	return ret;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun 
exynos_rng_seed(struct crypto_rng * tfm,const u8 * seed,unsigned int slen)225*4882a593Smuzhiyun static int exynos_rng_seed(struct crypto_rng *tfm, const u8 *seed,
226*4882a593Smuzhiyun 			   unsigned int slen)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun 	struct exynos_rng_ctx *ctx = crypto_rng_ctx(tfm);
229*4882a593Smuzhiyun 	struct exynos_rng_dev *rng = ctx->rng;
230*4882a593Smuzhiyun 	int ret;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	ret = clk_prepare_enable(rng->clk);
233*4882a593Smuzhiyun 	if (ret)
234*4882a593Smuzhiyun 		return ret;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	mutex_lock(&rng->lock);
237*4882a593Smuzhiyun 	ret = exynos_rng_set_seed(ctx->rng, seed, slen);
238*4882a593Smuzhiyun 	mutex_unlock(&rng->lock);
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	clk_disable_unprepare(rng->clk);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	return ret;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
exynos_rng_kcapi_init(struct crypto_tfm * tfm)245*4882a593Smuzhiyun static int exynos_rng_kcapi_init(struct crypto_tfm *tfm)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	struct exynos_rng_ctx *ctx = crypto_tfm_ctx(tfm);
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun 	ctx->rng = exynos_rng_dev;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	return 0;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun static struct rng_alg exynos_rng_alg = {
255*4882a593Smuzhiyun 	.generate		= exynos_rng_generate,
256*4882a593Smuzhiyun 	.seed			= exynos_rng_seed,
257*4882a593Smuzhiyun 	.seedsize		= EXYNOS_RNG_SEED_SIZE,
258*4882a593Smuzhiyun 	.base			= {
259*4882a593Smuzhiyun 		.cra_name		= "stdrng",
260*4882a593Smuzhiyun 		.cra_driver_name	= "exynos_rng",
261*4882a593Smuzhiyun 		.cra_priority		= 300,
262*4882a593Smuzhiyun 		.cra_ctxsize		= sizeof(struct exynos_rng_ctx),
263*4882a593Smuzhiyun 		.cra_module		= THIS_MODULE,
264*4882a593Smuzhiyun 		.cra_init		= exynos_rng_kcapi_init,
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun 
exynos_rng_probe(struct platform_device * pdev)268*4882a593Smuzhiyun static int exynos_rng_probe(struct platform_device *pdev)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun 	struct exynos_rng_dev *rng;
271*4882a593Smuzhiyun 	int ret;
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun 	if (exynos_rng_dev)
274*4882a593Smuzhiyun 		return -EEXIST;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
277*4882a593Smuzhiyun 	if (!rng)
278*4882a593Smuzhiyun 		return -ENOMEM;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	rng->type = (enum exynos_prng_type)of_device_get_match_data(&pdev->dev);
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	mutex_init(&rng->lock);
283*4882a593Smuzhiyun 
284*4882a593Smuzhiyun 	rng->dev = &pdev->dev;
285*4882a593Smuzhiyun 	rng->clk = devm_clk_get(&pdev->dev, "secss");
286*4882a593Smuzhiyun 	if (IS_ERR(rng->clk)) {
287*4882a593Smuzhiyun 		dev_err(&pdev->dev, "Couldn't get clock.\n");
288*4882a593Smuzhiyun 		return PTR_ERR(rng->clk);
289*4882a593Smuzhiyun 	}
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	rng->mem = devm_platform_ioremap_resource(pdev, 0);
292*4882a593Smuzhiyun 	if (IS_ERR(rng->mem))
293*4882a593Smuzhiyun 		return PTR_ERR(rng->mem);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	platform_set_drvdata(pdev, rng);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	exynos_rng_dev = rng;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	ret = crypto_register_rng(&exynos_rng_alg);
300*4882a593Smuzhiyun 	if (ret) {
301*4882a593Smuzhiyun 		dev_err(&pdev->dev,
302*4882a593Smuzhiyun 			"Couldn't register rng crypto alg: %d\n", ret);
303*4882a593Smuzhiyun 		exynos_rng_dev = NULL;
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	return ret;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun 
exynos_rng_remove(struct platform_device * pdev)309*4882a593Smuzhiyun static int exynos_rng_remove(struct platform_device *pdev)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun 	crypto_unregister_rng(&exynos_rng_alg);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	exynos_rng_dev = NULL;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	return 0;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
exynos_rng_suspend(struct device * dev)318*4882a593Smuzhiyun static int __maybe_unused exynos_rng_suspend(struct device *dev)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun 	struct exynos_rng_dev *rng = dev_get_drvdata(dev);
321*4882a593Smuzhiyun 	int ret;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/* If we were never seeded then after resume it will be the same */
324*4882a593Smuzhiyun 	if (!rng->last_seeding)
325*4882a593Smuzhiyun 		return 0;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	rng->seed_save_len = 0;
328*4882a593Smuzhiyun 	ret = clk_prepare_enable(rng->clk);
329*4882a593Smuzhiyun 	if (ret)
330*4882a593Smuzhiyun 		return ret;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	mutex_lock(&rng->lock);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	/* Get new random numbers and store them for seeding on resume. */
335*4882a593Smuzhiyun 	exynos_rng_get_random(rng, rng->seed_save, sizeof(rng->seed_save),
336*4882a593Smuzhiyun 			      &(rng->seed_save_len));
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	mutex_unlock(&rng->lock);
339*4882a593Smuzhiyun 
340*4882a593Smuzhiyun 	dev_dbg(rng->dev, "Stored %u bytes for seeding on system resume\n",
341*4882a593Smuzhiyun 		rng->seed_save_len);
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 	clk_disable_unprepare(rng->clk);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	return 0;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun 
exynos_rng_resume(struct device * dev)348*4882a593Smuzhiyun static int __maybe_unused exynos_rng_resume(struct device *dev)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun 	struct exynos_rng_dev *rng = dev_get_drvdata(dev);
351*4882a593Smuzhiyun 	int ret;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 	/* Never seeded so nothing to do */
354*4882a593Smuzhiyun 	if (!rng->last_seeding)
355*4882a593Smuzhiyun 		return 0;
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	ret = clk_prepare_enable(rng->clk);
358*4882a593Smuzhiyun 	if (ret)
359*4882a593Smuzhiyun 		return ret;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	mutex_lock(&rng->lock);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	ret = exynos_rng_set_seed(rng, rng->seed_save, rng->seed_save_len);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	mutex_unlock(&rng->lock);
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	clk_disable_unprepare(rng->clk);
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun 	return ret;
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(exynos_rng_pm_ops, exynos_rng_suspend,
373*4882a593Smuzhiyun 			 exynos_rng_resume);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun static const struct of_device_id exynos_rng_dt_match[] = {
376*4882a593Smuzhiyun 	{
377*4882a593Smuzhiyun 		.compatible = "samsung,exynos4-rng",
378*4882a593Smuzhiyun 		.data = (const void *)EXYNOS_PRNG_EXYNOS4,
379*4882a593Smuzhiyun 	}, {
380*4882a593Smuzhiyun 		.compatible = "samsung,exynos5250-prng",
381*4882a593Smuzhiyun 		.data = (const void *)EXYNOS_PRNG_EXYNOS5,
382*4882a593Smuzhiyun 	},
383*4882a593Smuzhiyun 	{ },
384*4882a593Smuzhiyun };
385*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, exynos_rng_dt_match);
386*4882a593Smuzhiyun 
387*4882a593Smuzhiyun static struct platform_driver exynos_rng_driver = {
388*4882a593Smuzhiyun 	.driver		= {
389*4882a593Smuzhiyun 		.name	= "exynos-rng",
390*4882a593Smuzhiyun 		.pm	= &exynos_rng_pm_ops,
391*4882a593Smuzhiyun 		.of_match_table = exynos_rng_dt_match,
392*4882a593Smuzhiyun 	},
393*4882a593Smuzhiyun 	.probe		= exynos_rng_probe,
394*4882a593Smuzhiyun 	.remove		= exynos_rng_remove,
395*4882a593Smuzhiyun };
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun module_platform_driver(exynos_rng_driver);
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun MODULE_DESCRIPTION("Exynos H/W Random Number Generator driver");
400*4882a593Smuzhiyun MODULE_AUTHOR("Krzysztof Kozlowski <krzk@kernel.org>");
401*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
402