xref: /OK3568_Linux_fs/kernel/drivers/crypto/ccree/cc_crypto_ctx.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* Copyright (C) 2012-2019 ARM Limited (or its affiliates). */
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #ifndef _CC_CRYPTO_CTX_H_
5*4882a593Smuzhiyun #define _CC_CRYPTO_CTX_H_
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/types.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #define CC_DRV_DES_IV_SIZE 8
10*4882a593Smuzhiyun #define CC_DRV_DES_BLOCK_SIZE 8
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define CC_DRV_DES_ONE_KEY_SIZE 8
13*4882a593Smuzhiyun #define CC_DRV_DES_DOUBLE_KEY_SIZE 16
14*4882a593Smuzhiyun #define CC_DRV_DES_TRIPLE_KEY_SIZE 24
15*4882a593Smuzhiyun #define CC_DRV_DES_KEY_SIZE_MAX CC_DRV_DES_TRIPLE_KEY_SIZE
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define CC_AES_IV_SIZE 16
18*4882a593Smuzhiyun #define CC_AES_IV_SIZE_WORDS (CC_AES_IV_SIZE >> 2)
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define CC_AES_BLOCK_SIZE 16
21*4882a593Smuzhiyun #define CC_AES_BLOCK_SIZE_WORDS 4
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define CC_AES_128_BIT_KEY_SIZE 16
24*4882a593Smuzhiyun #define CC_AES_128_BIT_KEY_SIZE_WORDS	(CC_AES_128_BIT_KEY_SIZE >> 2)
25*4882a593Smuzhiyun #define CC_AES_192_BIT_KEY_SIZE 24
26*4882a593Smuzhiyun #define CC_AES_192_BIT_KEY_SIZE_WORDS	(CC_AES_192_BIT_KEY_SIZE >> 2)
27*4882a593Smuzhiyun #define CC_AES_256_BIT_KEY_SIZE 32
28*4882a593Smuzhiyun #define CC_AES_256_BIT_KEY_SIZE_WORDS	(CC_AES_256_BIT_KEY_SIZE >> 2)
29*4882a593Smuzhiyun #define CC_AES_KEY_SIZE_MAX			CC_AES_256_BIT_KEY_SIZE
30*4882a593Smuzhiyun #define CC_AES_KEY_SIZE_WORDS_MAX		(CC_AES_KEY_SIZE_MAX >> 2)
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define CC_MD5_DIGEST_SIZE	16
33*4882a593Smuzhiyun #define CC_SHA1_DIGEST_SIZE	20
34*4882a593Smuzhiyun #define CC_SHA224_DIGEST_SIZE	28
35*4882a593Smuzhiyun #define CC_SHA256_DIGEST_SIZE	32
36*4882a593Smuzhiyun #define CC_SHA256_DIGEST_SIZE_IN_WORDS 8
37*4882a593Smuzhiyun #define CC_SHA384_DIGEST_SIZE	48
38*4882a593Smuzhiyun #define CC_SHA512_DIGEST_SIZE	64
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define CC_SHA1_BLOCK_SIZE 64
41*4882a593Smuzhiyun #define CC_SHA1_BLOCK_SIZE_IN_WORDS 16
42*4882a593Smuzhiyun #define CC_MD5_BLOCK_SIZE 64
43*4882a593Smuzhiyun #define CC_MD5_BLOCK_SIZE_IN_WORDS 16
44*4882a593Smuzhiyun #define CC_SHA224_BLOCK_SIZE 64
45*4882a593Smuzhiyun #define CC_SHA256_BLOCK_SIZE 64
46*4882a593Smuzhiyun #define CC_SHA256_BLOCK_SIZE_IN_WORDS 16
47*4882a593Smuzhiyun #define CC_SHA1_224_256_BLOCK_SIZE 64
48*4882a593Smuzhiyun #define CC_SHA384_BLOCK_SIZE 128
49*4882a593Smuzhiyun #define CC_SHA512_BLOCK_SIZE 128
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun #define CC_DIGEST_SIZE_MAX CC_SHA512_DIGEST_SIZE
52*4882a593Smuzhiyun #define CC_HASH_BLOCK_SIZE_MAX CC_SHA512_BLOCK_SIZE /*1024b*/
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define CC_HMAC_BLOCK_SIZE_MAX CC_HASH_BLOCK_SIZE_MAX
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #define CC_DRV_ALG_MAX_BLOCK_SIZE CC_HASH_BLOCK_SIZE_MAX
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define CC_CPP_NUM_SLOTS	8
59*4882a593Smuzhiyun #define CC_CPP_NUM_ALGS		2
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun enum cc_cpp_alg {
62*4882a593Smuzhiyun 	CC_CPP_SM4 = 1,
63*4882a593Smuzhiyun 	CC_CPP_AES = 0
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun enum drv_engine_type {
67*4882a593Smuzhiyun 	DRV_ENGINE_NULL = 0,
68*4882a593Smuzhiyun 	DRV_ENGINE_AES = 1,
69*4882a593Smuzhiyun 	DRV_ENGINE_DES = 2,
70*4882a593Smuzhiyun 	DRV_ENGINE_HASH = 3,
71*4882a593Smuzhiyun 	DRV_ENGINE_RC4 = 4,
72*4882a593Smuzhiyun 	DRV_ENGINE_DOUT = 5,
73*4882a593Smuzhiyun 	DRV_ENGINE_RESERVE32B = S32_MAX,
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun enum drv_crypto_alg {
77*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_NULL = -1,
78*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_AES  = 0,
79*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_DES  = 1,
80*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_HASH = 2,
81*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_C2   = 3,
82*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_HMAC = 4,
83*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_AEAD = 5,
84*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_BYPASS = 6,
85*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_NUM = 7,
86*4882a593Smuzhiyun 	DRV_CRYPTO_ALG_RESERVE32B = S32_MAX
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun enum drv_crypto_direction {
90*4882a593Smuzhiyun 	DRV_CRYPTO_DIRECTION_NULL = -1,
91*4882a593Smuzhiyun 	DRV_CRYPTO_DIRECTION_ENCRYPT = 0,
92*4882a593Smuzhiyun 	DRV_CRYPTO_DIRECTION_DECRYPT = 1,
93*4882a593Smuzhiyun 	DRV_CRYPTO_DIRECTION_DECRYPT_ENCRYPT = 3,
94*4882a593Smuzhiyun 	DRV_CRYPTO_DIRECTION_RESERVE32B = S32_MAX
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun enum drv_cipher_mode {
98*4882a593Smuzhiyun 	DRV_CIPHER_NULL_MODE = -1,
99*4882a593Smuzhiyun 	DRV_CIPHER_ECB = 0,
100*4882a593Smuzhiyun 	DRV_CIPHER_CBC = 1,
101*4882a593Smuzhiyun 	DRV_CIPHER_CTR = 2,
102*4882a593Smuzhiyun 	DRV_CIPHER_CBC_MAC = 3,
103*4882a593Smuzhiyun 	DRV_CIPHER_XTS = 4,
104*4882a593Smuzhiyun 	DRV_CIPHER_XCBC_MAC = 5,
105*4882a593Smuzhiyun 	DRV_CIPHER_OFB = 6,
106*4882a593Smuzhiyun 	DRV_CIPHER_CMAC = 7,
107*4882a593Smuzhiyun 	DRV_CIPHER_CCM = 8,
108*4882a593Smuzhiyun 	DRV_CIPHER_CBC_CTS = 11,
109*4882a593Smuzhiyun 	DRV_CIPHER_GCTR = 12,
110*4882a593Smuzhiyun 	DRV_CIPHER_ESSIV = 13,
111*4882a593Smuzhiyun 	DRV_CIPHER_RESERVE32B = S32_MAX
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun enum drv_hash_mode {
115*4882a593Smuzhiyun 	DRV_HASH_NULL = -1,
116*4882a593Smuzhiyun 	DRV_HASH_SHA1 = 0,
117*4882a593Smuzhiyun 	DRV_HASH_SHA256 = 1,
118*4882a593Smuzhiyun 	DRV_HASH_SHA224 = 2,
119*4882a593Smuzhiyun 	DRV_HASH_SHA512 = 3,
120*4882a593Smuzhiyun 	DRV_HASH_SHA384 = 4,
121*4882a593Smuzhiyun 	DRV_HASH_MD5 = 5,
122*4882a593Smuzhiyun 	DRV_HASH_CBC_MAC = 6,
123*4882a593Smuzhiyun 	DRV_HASH_XCBC_MAC = 7,
124*4882a593Smuzhiyun 	DRV_HASH_CMAC = 8,
125*4882a593Smuzhiyun 	DRV_HASH_SM3 = 9,
126*4882a593Smuzhiyun 	DRV_HASH_MODE_NUM = 10,
127*4882a593Smuzhiyun 	DRV_HASH_RESERVE32B = S32_MAX
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun enum drv_hash_hw_mode {
131*4882a593Smuzhiyun 	DRV_HASH_HW_MD5 = 0,
132*4882a593Smuzhiyun 	DRV_HASH_HW_SHA1 = 1,
133*4882a593Smuzhiyun 	DRV_HASH_HW_SHA256 = 2,
134*4882a593Smuzhiyun 	DRV_HASH_HW_SHA224 = 10,
135*4882a593Smuzhiyun 	DRV_HASH_HW_SHA512 = 4,
136*4882a593Smuzhiyun 	DRV_HASH_HW_SHA384 = 12,
137*4882a593Smuzhiyun 	DRV_HASH_HW_GHASH = 6,
138*4882a593Smuzhiyun 	DRV_HASH_HW_SM3 = 14,
139*4882a593Smuzhiyun 	DRV_HASH_HW_RESERVE32B = S32_MAX
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #endif /* _CC_CRYPTO_CTX_H_ */
143