1*4882a593Smuzhiyun /* SPDX-License-Identifier: MIT */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2019,2021 Advanced Micro Devices, Inc. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Author: Rijo Thomas <Rijo-john.Thomas@amd.com> 6*4882a593Smuzhiyun * Author: Devaraj Rangasamy <Devaraj.Rangasamy@amd.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* This file describes the TEE communication interface between host and AMD 11*4882a593Smuzhiyun * Secure Processor 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef __TEE_DEV_H__ 15*4882a593Smuzhiyun #define __TEE_DEV_H__ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <linux/device.h> 18*4882a593Smuzhiyun #include <linux/mutex.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define TEE_DEFAULT_TIMEOUT 10 21*4882a593Smuzhiyun #define MAX_BUFFER_SIZE 988 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /** 24*4882a593Smuzhiyun * enum tee_ring_cmd_id - TEE interface commands for ring buffer configuration 25*4882a593Smuzhiyun * @TEE_RING_INIT_CMD: Initialize ring buffer 26*4882a593Smuzhiyun * @TEE_RING_DESTROY_CMD: Destroy ring buffer 27*4882a593Smuzhiyun * @TEE_RING_MAX_CMD: Maximum command id 28*4882a593Smuzhiyun */ 29*4882a593Smuzhiyun enum tee_ring_cmd_id { 30*4882a593Smuzhiyun TEE_RING_INIT_CMD = 0x00010000, 31*4882a593Smuzhiyun TEE_RING_DESTROY_CMD = 0x00020000, 32*4882a593Smuzhiyun TEE_RING_MAX_CMD = 0x000F0000, 33*4882a593Smuzhiyun }; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /** 36*4882a593Smuzhiyun * struct tee_init_ring_cmd - Command to init TEE ring buffer 37*4882a593Smuzhiyun * @low_addr: bits [31:0] of the physical address of ring buffer 38*4882a593Smuzhiyun * @hi_addr: bits [63:32] of the physical address of ring buffer 39*4882a593Smuzhiyun * @size: size of ring buffer in bytes 40*4882a593Smuzhiyun */ 41*4882a593Smuzhiyun struct tee_init_ring_cmd { 42*4882a593Smuzhiyun u32 low_addr; 43*4882a593Smuzhiyun u32 hi_addr; 44*4882a593Smuzhiyun u32 size; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define MAX_RING_BUFFER_ENTRIES 32 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /** 50*4882a593Smuzhiyun * struct ring_buf_manager - Helper structure to manage ring buffer. 51*4882a593Smuzhiyun * @ring_start: starting address of ring buffer 52*4882a593Smuzhiyun * @ring_size: size of ring buffer in bytes 53*4882a593Smuzhiyun * @ring_pa: physical address of ring buffer 54*4882a593Smuzhiyun * @wptr: index to the last written entry in ring buffer 55*4882a593Smuzhiyun */ 56*4882a593Smuzhiyun struct ring_buf_manager { 57*4882a593Smuzhiyun struct mutex mutex; /* synchronizes access to ring buffer */ 58*4882a593Smuzhiyun void *ring_start; 59*4882a593Smuzhiyun u32 ring_size; 60*4882a593Smuzhiyun phys_addr_t ring_pa; 61*4882a593Smuzhiyun u32 wptr; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun struct psp_tee_device { 65*4882a593Smuzhiyun struct device *dev; 66*4882a593Smuzhiyun struct psp_device *psp; 67*4882a593Smuzhiyun void __iomem *io_regs; 68*4882a593Smuzhiyun struct tee_vdata *vdata; 69*4882a593Smuzhiyun struct ring_buf_manager rb_mgr; 70*4882a593Smuzhiyun }; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /** 73*4882a593Smuzhiyun * enum tee_cmd_state - TEE command states for the ring buffer interface 74*4882a593Smuzhiyun * @TEE_CMD_STATE_INIT: initial state of command when sent from host 75*4882a593Smuzhiyun * @TEE_CMD_STATE_PROCESS: command being processed by TEE environment 76*4882a593Smuzhiyun * @TEE_CMD_STATE_COMPLETED: command processing completed 77*4882a593Smuzhiyun */ 78*4882a593Smuzhiyun enum tee_cmd_state { 79*4882a593Smuzhiyun TEE_CMD_STATE_INIT, 80*4882a593Smuzhiyun TEE_CMD_STATE_PROCESS, 81*4882a593Smuzhiyun TEE_CMD_STATE_COMPLETED, 82*4882a593Smuzhiyun }; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /** 85*4882a593Smuzhiyun * enum cmd_resp_state - TEE command's response status maintained by driver 86*4882a593Smuzhiyun * @CMD_RESPONSE_INVALID: initial state when no command is written to ring 87*4882a593Smuzhiyun * @CMD_WAITING_FOR_RESPONSE: driver waiting for response from TEE 88*4882a593Smuzhiyun * @CMD_RESPONSE_TIMEDOUT: failed to get response from TEE 89*4882a593Smuzhiyun * @CMD_RESPONSE_COPIED: driver has copied response from TEE 90*4882a593Smuzhiyun */ 91*4882a593Smuzhiyun enum cmd_resp_state { 92*4882a593Smuzhiyun CMD_RESPONSE_INVALID, 93*4882a593Smuzhiyun CMD_WAITING_FOR_RESPONSE, 94*4882a593Smuzhiyun CMD_RESPONSE_TIMEDOUT, 95*4882a593Smuzhiyun CMD_RESPONSE_COPIED, 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun /** 99*4882a593Smuzhiyun * struct tee_ring_cmd - Structure of the command buffer in TEE ring 100*4882a593Smuzhiyun * @cmd_id: refers to &enum tee_cmd_id. Command id for the ring buffer 101*4882a593Smuzhiyun * interface 102*4882a593Smuzhiyun * @cmd_state: refers to &enum tee_cmd_state 103*4882a593Smuzhiyun * @status: status of TEE command execution 104*4882a593Smuzhiyun * @res0: reserved region 105*4882a593Smuzhiyun * @pdata: private data (currently unused) 106*4882a593Smuzhiyun * @res1: reserved region 107*4882a593Smuzhiyun * @buf: TEE command specific buffer 108*4882a593Smuzhiyun * @flag: refers to &enum cmd_resp_state 109*4882a593Smuzhiyun */ 110*4882a593Smuzhiyun struct tee_ring_cmd { 111*4882a593Smuzhiyun u32 cmd_id; 112*4882a593Smuzhiyun u32 cmd_state; 113*4882a593Smuzhiyun u32 status; 114*4882a593Smuzhiyun u32 res0[1]; 115*4882a593Smuzhiyun u64 pdata; 116*4882a593Smuzhiyun u32 res1[2]; 117*4882a593Smuzhiyun u8 buf[MAX_BUFFER_SIZE]; 118*4882a593Smuzhiyun u32 flag; 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun /* Total size: 1024 bytes */ 121*4882a593Smuzhiyun } __packed; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun int tee_dev_init(struct psp_device *psp); 124*4882a593Smuzhiyun void tee_dev_destroy(struct psp_device *psp); 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #endif /* __TEE_DEV_H__ */ 127