1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * AMD Cryptographic Coprocessor (CCP) driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2016,2019 Advanced Micro Devices, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Gary R Hook <gary.hook@amd.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/dma-mapping.h>
13*4882a593Smuzhiyun #include <linux/dmaengine.h>
14*4882a593Smuzhiyun #include <linux/spinlock.h>
15*4882a593Smuzhiyun #include <linux/mutex.h>
16*4882a593Smuzhiyun #include <linux/ccp.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include "ccp-dev.h"
19*4882a593Smuzhiyun #include "../../dma/dmaengine.h"
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define CCP_DMA_WIDTH(_mask) \
22*4882a593Smuzhiyun ({ \
23*4882a593Smuzhiyun u64 mask = _mask + 1; \
24*4882a593Smuzhiyun (mask == 0) ? 64 : fls64(mask); \
25*4882a593Smuzhiyun })
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* The CCP as a DMA provider can be configured for public or private
28*4882a593Smuzhiyun * channels. Default is specified in the vdata for the device (PCI ID).
29*4882a593Smuzhiyun * This module parameter will override for all channels on all devices:
30*4882a593Smuzhiyun * dma_chan_attr = 0x2 to force all channels public
31*4882a593Smuzhiyun * = 0x1 to force all channels private
32*4882a593Smuzhiyun * = 0x0 to defer to the vdata setting
33*4882a593Smuzhiyun * = any other value: warning, revert to 0x0
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun static unsigned int dma_chan_attr = CCP_DMA_DFLT;
36*4882a593Smuzhiyun module_param(dma_chan_attr, uint, 0444);
37*4882a593Smuzhiyun MODULE_PARM_DESC(dma_chan_attr, "Set DMA channel visibility: 0 (default) = device defaults, 1 = make private, 2 = make public");
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static unsigned int dmaengine = 1;
40*4882a593Smuzhiyun module_param(dmaengine, uint, 0444);
41*4882a593Smuzhiyun MODULE_PARM_DESC(dmaengine, "Register services with the DMA subsystem (any non-zero value, default: 1)");
42*4882a593Smuzhiyun
ccp_get_dma_chan_attr(struct ccp_device * ccp)43*4882a593Smuzhiyun static unsigned int ccp_get_dma_chan_attr(struct ccp_device *ccp)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun switch (dma_chan_attr) {
46*4882a593Smuzhiyun case CCP_DMA_DFLT:
47*4882a593Smuzhiyun return ccp->vdata->dma_chan_attr;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun case CCP_DMA_PRIV:
50*4882a593Smuzhiyun return DMA_PRIVATE;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun case CCP_DMA_PUB:
53*4882a593Smuzhiyun return 0;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun default:
56*4882a593Smuzhiyun dev_info_once(ccp->dev, "Invalid value for dma_chan_attr: %d\n",
57*4882a593Smuzhiyun dma_chan_attr);
58*4882a593Smuzhiyun return ccp->vdata->dma_chan_attr;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
ccp_free_cmd_resources(struct ccp_device * ccp,struct list_head * list)62*4882a593Smuzhiyun static void ccp_free_cmd_resources(struct ccp_device *ccp,
63*4882a593Smuzhiyun struct list_head *list)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun struct ccp_dma_cmd *cmd, *ctmp;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun list_for_each_entry_safe(cmd, ctmp, list, entry) {
68*4882a593Smuzhiyun list_del(&cmd->entry);
69*4882a593Smuzhiyun kmem_cache_free(ccp->dma_cmd_cache, cmd);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
ccp_free_desc_resources(struct ccp_device * ccp,struct list_head * list)73*4882a593Smuzhiyun static void ccp_free_desc_resources(struct ccp_device *ccp,
74*4882a593Smuzhiyun struct list_head *list)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun struct ccp_dma_desc *desc, *dtmp;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun list_for_each_entry_safe(desc, dtmp, list, entry) {
79*4882a593Smuzhiyun ccp_free_cmd_resources(ccp, &desc->active);
80*4882a593Smuzhiyun ccp_free_cmd_resources(ccp, &desc->pending);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun list_del(&desc->entry);
83*4882a593Smuzhiyun kmem_cache_free(ccp->dma_desc_cache, desc);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
ccp_free_chan_resources(struct dma_chan * dma_chan)87*4882a593Smuzhiyun static void ccp_free_chan_resources(struct dma_chan *dma_chan)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
90*4882a593Smuzhiyun dma_chan);
91*4882a593Smuzhiyun unsigned long flags;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun dev_dbg(chan->ccp->dev, "%s - chan=%p\n", __func__, chan);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun ccp_free_desc_resources(chan->ccp, &chan->complete);
98*4882a593Smuzhiyun ccp_free_desc_resources(chan->ccp, &chan->active);
99*4882a593Smuzhiyun ccp_free_desc_resources(chan->ccp, &chan->pending);
100*4882a593Smuzhiyun ccp_free_desc_resources(chan->ccp, &chan->created);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
ccp_cleanup_desc_resources(struct ccp_device * ccp,struct list_head * list)105*4882a593Smuzhiyun static void ccp_cleanup_desc_resources(struct ccp_device *ccp,
106*4882a593Smuzhiyun struct list_head *list)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun struct ccp_dma_desc *desc, *dtmp;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun list_for_each_entry_safe_reverse(desc, dtmp, list, entry) {
111*4882a593Smuzhiyun if (!async_tx_test_ack(&desc->tx_desc))
112*4882a593Smuzhiyun continue;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun dev_dbg(ccp->dev, "%s - desc=%p\n", __func__, desc);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun ccp_free_cmd_resources(ccp, &desc->active);
117*4882a593Smuzhiyun ccp_free_cmd_resources(ccp, &desc->pending);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun list_del(&desc->entry);
120*4882a593Smuzhiyun kmem_cache_free(ccp->dma_desc_cache, desc);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
ccp_do_cleanup(unsigned long data)124*4882a593Smuzhiyun static void ccp_do_cleanup(unsigned long data)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun struct ccp_dma_chan *chan = (struct ccp_dma_chan *)data;
127*4882a593Smuzhiyun unsigned long flags;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun dev_dbg(chan->ccp->dev, "%s - chan=%s\n", __func__,
130*4882a593Smuzhiyun dma_chan_name(&chan->dma_chan));
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun ccp_cleanup_desc_resources(chan->ccp, &chan->complete);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
ccp_issue_next_cmd(struct ccp_dma_desc * desc)139*4882a593Smuzhiyun static int ccp_issue_next_cmd(struct ccp_dma_desc *desc)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun struct ccp_dma_cmd *cmd;
142*4882a593Smuzhiyun int ret;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun cmd = list_first_entry(&desc->pending, struct ccp_dma_cmd, entry);
145*4882a593Smuzhiyun list_move(&cmd->entry, &desc->active);
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun dev_dbg(desc->ccp->dev, "%s - tx %d, cmd=%p\n", __func__,
148*4882a593Smuzhiyun desc->tx_desc.cookie, cmd);
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun ret = ccp_enqueue_cmd(&cmd->ccp_cmd);
151*4882a593Smuzhiyun if (!ret || (ret == -EINPROGRESS) || (ret == -EBUSY))
152*4882a593Smuzhiyun return 0;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun dev_dbg(desc->ccp->dev, "%s - error: ret=%d, tx %d, cmd=%p\n", __func__,
155*4882a593Smuzhiyun ret, desc->tx_desc.cookie, cmd);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
ccp_free_active_cmd(struct ccp_dma_desc * desc)160*4882a593Smuzhiyun static void ccp_free_active_cmd(struct ccp_dma_desc *desc)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun struct ccp_dma_cmd *cmd;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun cmd = list_first_entry_or_null(&desc->active, struct ccp_dma_cmd,
165*4882a593Smuzhiyun entry);
166*4882a593Smuzhiyun if (!cmd)
167*4882a593Smuzhiyun return;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun dev_dbg(desc->ccp->dev, "%s - freeing tx %d cmd=%p\n",
170*4882a593Smuzhiyun __func__, desc->tx_desc.cookie, cmd);
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun list_del(&cmd->entry);
173*4882a593Smuzhiyun kmem_cache_free(desc->ccp->dma_cmd_cache, cmd);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
__ccp_next_dma_desc(struct ccp_dma_chan * chan,struct ccp_dma_desc * desc)176*4882a593Smuzhiyun static struct ccp_dma_desc *__ccp_next_dma_desc(struct ccp_dma_chan *chan,
177*4882a593Smuzhiyun struct ccp_dma_desc *desc)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun /* Move current DMA descriptor to the complete list */
180*4882a593Smuzhiyun if (desc)
181*4882a593Smuzhiyun list_move(&desc->entry, &chan->complete);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* Get the next DMA descriptor on the active list */
184*4882a593Smuzhiyun desc = list_first_entry_or_null(&chan->active, struct ccp_dma_desc,
185*4882a593Smuzhiyun entry);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun return desc;
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
ccp_handle_active_desc(struct ccp_dma_chan * chan,struct ccp_dma_desc * desc)190*4882a593Smuzhiyun static struct ccp_dma_desc *ccp_handle_active_desc(struct ccp_dma_chan *chan,
191*4882a593Smuzhiyun struct ccp_dma_desc *desc)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx_desc;
194*4882a593Smuzhiyun unsigned long flags;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* Loop over descriptors until one is found with commands */
197*4882a593Smuzhiyun do {
198*4882a593Smuzhiyun if (desc) {
199*4882a593Smuzhiyun /* Remove the DMA command from the list and free it */
200*4882a593Smuzhiyun ccp_free_active_cmd(desc);
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun if (!list_empty(&desc->pending)) {
203*4882a593Smuzhiyun /* No errors, keep going */
204*4882a593Smuzhiyun if (desc->status != DMA_ERROR)
205*4882a593Smuzhiyun return desc;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /* Error, free remaining commands and move on */
208*4882a593Smuzhiyun ccp_free_cmd_resources(desc->ccp,
209*4882a593Smuzhiyun &desc->pending);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun tx_desc = &desc->tx_desc;
213*4882a593Smuzhiyun } else {
214*4882a593Smuzhiyun tx_desc = NULL;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun if (desc) {
220*4882a593Smuzhiyun if (desc->status != DMA_ERROR)
221*4882a593Smuzhiyun desc->status = DMA_COMPLETE;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun dev_dbg(desc->ccp->dev,
224*4882a593Smuzhiyun "%s - tx %d complete, status=%u\n", __func__,
225*4882a593Smuzhiyun desc->tx_desc.cookie, desc->status);
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun dma_cookie_complete(tx_desc);
228*4882a593Smuzhiyun dma_descriptor_unmap(tx_desc);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun desc = __ccp_next_dma_desc(chan, desc);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun if (tx_desc) {
236*4882a593Smuzhiyun dmaengine_desc_get_callback_invoke(tx_desc, NULL);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun dma_run_dependencies(tx_desc);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun } while (desc);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return NULL;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
__ccp_pending_to_active(struct ccp_dma_chan * chan)245*4882a593Smuzhiyun static struct ccp_dma_desc *__ccp_pending_to_active(struct ccp_dma_chan *chan)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun struct ccp_dma_desc *desc;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun if (list_empty(&chan->pending))
250*4882a593Smuzhiyun return NULL;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun desc = list_empty(&chan->active)
253*4882a593Smuzhiyun ? list_first_entry(&chan->pending, struct ccp_dma_desc, entry)
254*4882a593Smuzhiyun : NULL;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun list_splice_tail_init(&chan->pending, &chan->active);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun return desc;
259*4882a593Smuzhiyun }
260*4882a593Smuzhiyun
ccp_cmd_callback(void * data,int err)261*4882a593Smuzhiyun static void ccp_cmd_callback(void *data, int err)
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun struct ccp_dma_desc *desc = data;
264*4882a593Smuzhiyun struct ccp_dma_chan *chan;
265*4882a593Smuzhiyun int ret;
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (err == -EINPROGRESS)
268*4882a593Smuzhiyun return;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun chan = container_of(desc->tx_desc.chan, struct ccp_dma_chan,
271*4882a593Smuzhiyun dma_chan);
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun dev_dbg(chan->ccp->dev, "%s - tx %d callback, err=%d\n",
274*4882a593Smuzhiyun __func__, desc->tx_desc.cookie, err);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (err)
277*4882a593Smuzhiyun desc->status = DMA_ERROR;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun while (true) {
280*4882a593Smuzhiyun /* Check for DMA descriptor completion */
281*4882a593Smuzhiyun desc = ccp_handle_active_desc(chan, desc);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /* Don't submit cmd if no descriptor or DMA is paused */
284*4882a593Smuzhiyun if (!desc || (chan->status == DMA_PAUSED))
285*4882a593Smuzhiyun break;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun ret = ccp_issue_next_cmd(desc);
288*4882a593Smuzhiyun if (!ret)
289*4882a593Smuzhiyun break;
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun desc->status = DMA_ERROR;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun tasklet_schedule(&chan->cleanup_tasklet);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
ccp_tx_submit(struct dma_async_tx_descriptor * tx_desc)297*4882a593Smuzhiyun static dma_cookie_t ccp_tx_submit(struct dma_async_tx_descriptor *tx_desc)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun struct ccp_dma_desc *desc = container_of(tx_desc, struct ccp_dma_desc,
300*4882a593Smuzhiyun tx_desc);
301*4882a593Smuzhiyun struct ccp_dma_chan *chan;
302*4882a593Smuzhiyun dma_cookie_t cookie;
303*4882a593Smuzhiyun unsigned long flags;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun chan = container_of(tx_desc->chan, struct ccp_dma_chan, dma_chan);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun cookie = dma_cookie_assign(tx_desc);
310*4882a593Smuzhiyun list_del(&desc->entry);
311*4882a593Smuzhiyun list_add_tail(&desc->entry, &chan->pending);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun dev_dbg(chan->ccp->dev, "%s - added tx descriptor %d to pending list\n",
316*4882a593Smuzhiyun __func__, cookie);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun return cookie;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
ccp_alloc_dma_cmd(struct ccp_dma_chan * chan)321*4882a593Smuzhiyun static struct ccp_dma_cmd *ccp_alloc_dma_cmd(struct ccp_dma_chan *chan)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun struct ccp_dma_cmd *cmd;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun cmd = kmem_cache_alloc(chan->ccp->dma_cmd_cache, GFP_NOWAIT);
326*4882a593Smuzhiyun if (cmd)
327*4882a593Smuzhiyun memset(cmd, 0, sizeof(*cmd));
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun return cmd;
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun
ccp_alloc_dma_desc(struct ccp_dma_chan * chan,unsigned long flags)332*4882a593Smuzhiyun static struct ccp_dma_desc *ccp_alloc_dma_desc(struct ccp_dma_chan *chan,
333*4882a593Smuzhiyun unsigned long flags)
334*4882a593Smuzhiyun {
335*4882a593Smuzhiyun struct ccp_dma_desc *desc;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun desc = kmem_cache_zalloc(chan->ccp->dma_desc_cache, GFP_NOWAIT);
338*4882a593Smuzhiyun if (!desc)
339*4882a593Smuzhiyun return NULL;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun dma_async_tx_descriptor_init(&desc->tx_desc, &chan->dma_chan);
342*4882a593Smuzhiyun desc->tx_desc.flags = flags;
343*4882a593Smuzhiyun desc->tx_desc.tx_submit = ccp_tx_submit;
344*4882a593Smuzhiyun desc->ccp = chan->ccp;
345*4882a593Smuzhiyun INIT_LIST_HEAD(&desc->entry);
346*4882a593Smuzhiyun INIT_LIST_HEAD(&desc->pending);
347*4882a593Smuzhiyun INIT_LIST_HEAD(&desc->active);
348*4882a593Smuzhiyun desc->status = DMA_IN_PROGRESS;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun return desc;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
ccp_create_desc(struct dma_chan * dma_chan,struct scatterlist * dst_sg,unsigned int dst_nents,struct scatterlist * src_sg,unsigned int src_nents,unsigned long flags)353*4882a593Smuzhiyun static struct ccp_dma_desc *ccp_create_desc(struct dma_chan *dma_chan,
354*4882a593Smuzhiyun struct scatterlist *dst_sg,
355*4882a593Smuzhiyun unsigned int dst_nents,
356*4882a593Smuzhiyun struct scatterlist *src_sg,
357*4882a593Smuzhiyun unsigned int src_nents,
358*4882a593Smuzhiyun unsigned long flags)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
361*4882a593Smuzhiyun dma_chan);
362*4882a593Smuzhiyun struct ccp_device *ccp = chan->ccp;
363*4882a593Smuzhiyun struct ccp_dma_desc *desc;
364*4882a593Smuzhiyun struct ccp_dma_cmd *cmd;
365*4882a593Smuzhiyun struct ccp_cmd *ccp_cmd;
366*4882a593Smuzhiyun struct ccp_passthru_nomap_engine *ccp_pt;
367*4882a593Smuzhiyun unsigned int src_offset, src_len;
368*4882a593Smuzhiyun unsigned int dst_offset, dst_len;
369*4882a593Smuzhiyun unsigned int len;
370*4882a593Smuzhiyun unsigned long sflags;
371*4882a593Smuzhiyun size_t total_len;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun if (!dst_sg || !src_sg)
374*4882a593Smuzhiyun return NULL;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun if (!dst_nents || !src_nents)
377*4882a593Smuzhiyun return NULL;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun desc = ccp_alloc_dma_desc(chan, flags);
380*4882a593Smuzhiyun if (!desc)
381*4882a593Smuzhiyun return NULL;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun total_len = 0;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun src_len = sg_dma_len(src_sg);
386*4882a593Smuzhiyun src_offset = 0;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun dst_len = sg_dma_len(dst_sg);
389*4882a593Smuzhiyun dst_offset = 0;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun while (true) {
392*4882a593Smuzhiyun if (!src_len) {
393*4882a593Smuzhiyun src_nents--;
394*4882a593Smuzhiyun if (!src_nents)
395*4882a593Smuzhiyun break;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun src_sg = sg_next(src_sg);
398*4882a593Smuzhiyun if (!src_sg)
399*4882a593Smuzhiyun break;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun src_len = sg_dma_len(src_sg);
402*4882a593Smuzhiyun src_offset = 0;
403*4882a593Smuzhiyun continue;
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun if (!dst_len) {
407*4882a593Smuzhiyun dst_nents--;
408*4882a593Smuzhiyun if (!dst_nents)
409*4882a593Smuzhiyun break;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun dst_sg = sg_next(dst_sg);
412*4882a593Smuzhiyun if (!dst_sg)
413*4882a593Smuzhiyun break;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun dst_len = sg_dma_len(dst_sg);
416*4882a593Smuzhiyun dst_offset = 0;
417*4882a593Smuzhiyun continue;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun len = min(dst_len, src_len);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun cmd = ccp_alloc_dma_cmd(chan);
423*4882a593Smuzhiyun if (!cmd)
424*4882a593Smuzhiyun goto err;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun ccp_cmd = &cmd->ccp_cmd;
427*4882a593Smuzhiyun ccp_cmd->ccp = chan->ccp;
428*4882a593Smuzhiyun ccp_pt = &ccp_cmd->u.passthru_nomap;
429*4882a593Smuzhiyun ccp_cmd->flags = CCP_CMD_MAY_BACKLOG;
430*4882a593Smuzhiyun ccp_cmd->flags |= CCP_CMD_PASSTHRU_NO_DMA_MAP;
431*4882a593Smuzhiyun ccp_cmd->engine = CCP_ENGINE_PASSTHRU;
432*4882a593Smuzhiyun ccp_pt->bit_mod = CCP_PASSTHRU_BITWISE_NOOP;
433*4882a593Smuzhiyun ccp_pt->byte_swap = CCP_PASSTHRU_BYTESWAP_NOOP;
434*4882a593Smuzhiyun ccp_pt->src_dma = sg_dma_address(src_sg) + src_offset;
435*4882a593Smuzhiyun ccp_pt->dst_dma = sg_dma_address(dst_sg) + dst_offset;
436*4882a593Smuzhiyun ccp_pt->src_len = len;
437*4882a593Smuzhiyun ccp_pt->final = 1;
438*4882a593Smuzhiyun ccp_cmd->callback = ccp_cmd_callback;
439*4882a593Smuzhiyun ccp_cmd->data = desc;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun list_add_tail(&cmd->entry, &desc->pending);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun dev_dbg(ccp->dev,
444*4882a593Smuzhiyun "%s - cmd=%p, src=%pad, dst=%pad, len=%llu\n", __func__,
445*4882a593Smuzhiyun cmd, &ccp_pt->src_dma,
446*4882a593Smuzhiyun &ccp_pt->dst_dma, ccp_pt->src_len);
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun total_len += len;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun src_len -= len;
451*4882a593Smuzhiyun src_offset += len;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun dst_len -= len;
454*4882a593Smuzhiyun dst_offset += len;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun desc->len = total_len;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun if (list_empty(&desc->pending))
460*4882a593Smuzhiyun goto err;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun dev_dbg(ccp->dev, "%s - desc=%p\n", __func__, desc);
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, sflags);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun list_add_tail(&desc->entry, &chan->created);
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, sflags);
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun return desc;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun err:
473*4882a593Smuzhiyun ccp_free_cmd_resources(ccp, &desc->pending);
474*4882a593Smuzhiyun kmem_cache_free(ccp->dma_desc_cache, desc);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun return NULL;
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
ccp_prep_dma_memcpy(struct dma_chan * dma_chan,dma_addr_t dst,dma_addr_t src,size_t len,unsigned long flags)479*4882a593Smuzhiyun static struct dma_async_tx_descriptor *ccp_prep_dma_memcpy(
480*4882a593Smuzhiyun struct dma_chan *dma_chan, dma_addr_t dst, dma_addr_t src, size_t len,
481*4882a593Smuzhiyun unsigned long flags)
482*4882a593Smuzhiyun {
483*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
484*4882a593Smuzhiyun dma_chan);
485*4882a593Smuzhiyun struct ccp_dma_desc *desc;
486*4882a593Smuzhiyun struct scatterlist dst_sg, src_sg;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun dev_dbg(chan->ccp->dev,
489*4882a593Smuzhiyun "%s - src=%pad, dst=%pad, len=%zu, flags=%#lx\n",
490*4882a593Smuzhiyun __func__, &src, &dst, len, flags);
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun sg_init_table(&dst_sg, 1);
493*4882a593Smuzhiyun sg_dma_address(&dst_sg) = dst;
494*4882a593Smuzhiyun sg_dma_len(&dst_sg) = len;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun sg_init_table(&src_sg, 1);
497*4882a593Smuzhiyun sg_dma_address(&src_sg) = src;
498*4882a593Smuzhiyun sg_dma_len(&src_sg) = len;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun desc = ccp_create_desc(dma_chan, &dst_sg, 1, &src_sg, 1, flags);
501*4882a593Smuzhiyun if (!desc)
502*4882a593Smuzhiyun return NULL;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun return &desc->tx_desc;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
ccp_prep_dma_interrupt(struct dma_chan * dma_chan,unsigned long flags)507*4882a593Smuzhiyun static struct dma_async_tx_descriptor *ccp_prep_dma_interrupt(
508*4882a593Smuzhiyun struct dma_chan *dma_chan, unsigned long flags)
509*4882a593Smuzhiyun {
510*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
511*4882a593Smuzhiyun dma_chan);
512*4882a593Smuzhiyun struct ccp_dma_desc *desc;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun desc = ccp_alloc_dma_desc(chan, flags);
515*4882a593Smuzhiyun if (!desc)
516*4882a593Smuzhiyun return NULL;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun return &desc->tx_desc;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun
ccp_issue_pending(struct dma_chan * dma_chan)521*4882a593Smuzhiyun static void ccp_issue_pending(struct dma_chan *dma_chan)
522*4882a593Smuzhiyun {
523*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
524*4882a593Smuzhiyun dma_chan);
525*4882a593Smuzhiyun struct ccp_dma_desc *desc;
526*4882a593Smuzhiyun unsigned long flags;
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun dev_dbg(chan->ccp->dev, "%s\n", __func__);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun desc = __ccp_pending_to_active(chan);
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun /* If there was nothing active, start processing */
537*4882a593Smuzhiyun if (desc)
538*4882a593Smuzhiyun ccp_cmd_callback(desc, 0);
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
ccp_tx_status(struct dma_chan * dma_chan,dma_cookie_t cookie,struct dma_tx_state * state)541*4882a593Smuzhiyun static enum dma_status ccp_tx_status(struct dma_chan *dma_chan,
542*4882a593Smuzhiyun dma_cookie_t cookie,
543*4882a593Smuzhiyun struct dma_tx_state *state)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
546*4882a593Smuzhiyun dma_chan);
547*4882a593Smuzhiyun struct ccp_dma_desc *desc;
548*4882a593Smuzhiyun enum dma_status ret;
549*4882a593Smuzhiyun unsigned long flags;
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun if (chan->status == DMA_PAUSED) {
552*4882a593Smuzhiyun ret = DMA_PAUSED;
553*4882a593Smuzhiyun goto out;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun ret = dma_cookie_status(dma_chan, cookie, state);
557*4882a593Smuzhiyun if (ret == DMA_COMPLETE) {
558*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun /* Get status from complete chain, if still there */
561*4882a593Smuzhiyun list_for_each_entry(desc, &chan->complete, entry) {
562*4882a593Smuzhiyun if (desc->tx_desc.cookie != cookie)
563*4882a593Smuzhiyun continue;
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun ret = desc->status;
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun out:
573*4882a593Smuzhiyun dev_dbg(chan->ccp->dev, "%s - %u\n", __func__, ret);
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun return ret;
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun
ccp_pause(struct dma_chan * dma_chan)578*4882a593Smuzhiyun static int ccp_pause(struct dma_chan *dma_chan)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
581*4882a593Smuzhiyun dma_chan);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun chan->status = DMA_PAUSED;
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun /*TODO: Wait for active DMA to complete before returning? */
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun return 0;
588*4882a593Smuzhiyun }
589*4882a593Smuzhiyun
ccp_resume(struct dma_chan * dma_chan)590*4882a593Smuzhiyun static int ccp_resume(struct dma_chan *dma_chan)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
593*4882a593Smuzhiyun dma_chan);
594*4882a593Smuzhiyun struct ccp_dma_desc *desc;
595*4882a593Smuzhiyun unsigned long flags;
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun desc = list_first_entry_or_null(&chan->active, struct ccp_dma_desc,
600*4882a593Smuzhiyun entry);
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun /* Indicate the channel is running again */
605*4882a593Smuzhiyun chan->status = DMA_IN_PROGRESS;
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun /* If there was something active, re-start */
608*4882a593Smuzhiyun if (desc)
609*4882a593Smuzhiyun ccp_cmd_callback(desc, 0);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun return 0;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun
ccp_terminate_all(struct dma_chan * dma_chan)614*4882a593Smuzhiyun static int ccp_terminate_all(struct dma_chan *dma_chan)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun struct ccp_dma_chan *chan = container_of(dma_chan, struct ccp_dma_chan,
617*4882a593Smuzhiyun dma_chan);
618*4882a593Smuzhiyun unsigned long flags;
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun dev_dbg(chan->ccp->dev, "%s\n", __func__);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun /*TODO: Wait for active DMA to complete before continuing */
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun spin_lock_irqsave(&chan->lock, flags);
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun /*TODO: Purge the complete list? */
627*4882a593Smuzhiyun ccp_free_desc_resources(chan->ccp, &chan->active);
628*4882a593Smuzhiyun ccp_free_desc_resources(chan->ccp, &chan->pending);
629*4882a593Smuzhiyun ccp_free_desc_resources(chan->ccp, &chan->created);
630*4882a593Smuzhiyun
631*4882a593Smuzhiyun spin_unlock_irqrestore(&chan->lock, flags);
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun return 0;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun
ccp_dma_release(struct ccp_device * ccp)636*4882a593Smuzhiyun static void ccp_dma_release(struct ccp_device *ccp)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun struct ccp_dma_chan *chan;
639*4882a593Smuzhiyun struct dma_chan *dma_chan;
640*4882a593Smuzhiyun unsigned int i;
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun for (i = 0; i < ccp->cmd_q_count; i++) {
643*4882a593Smuzhiyun chan = ccp->ccp_dma_chan + i;
644*4882a593Smuzhiyun dma_chan = &chan->dma_chan;
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun if (dma_chan->client_count)
647*4882a593Smuzhiyun dma_release_channel(dma_chan);
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun tasklet_kill(&chan->cleanup_tasklet);
650*4882a593Smuzhiyun list_del_rcu(&dma_chan->device_node);
651*4882a593Smuzhiyun }
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
ccp_dmaengine_register(struct ccp_device * ccp)654*4882a593Smuzhiyun int ccp_dmaengine_register(struct ccp_device *ccp)
655*4882a593Smuzhiyun {
656*4882a593Smuzhiyun struct ccp_dma_chan *chan;
657*4882a593Smuzhiyun struct dma_device *dma_dev = &ccp->dma_dev;
658*4882a593Smuzhiyun struct dma_chan *dma_chan;
659*4882a593Smuzhiyun char *dma_cmd_cache_name;
660*4882a593Smuzhiyun char *dma_desc_cache_name;
661*4882a593Smuzhiyun unsigned int i;
662*4882a593Smuzhiyun int ret;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun if (!dmaengine)
665*4882a593Smuzhiyun return 0;
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun ccp->ccp_dma_chan = devm_kcalloc(ccp->dev, ccp->cmd_q_count,
668*4882a593Smuzhiyun sizeof(*(ccp->ccp_dma_chan)),
669*4882a593Smuzhiyun GFP_KERNEL);
670*4882a593Smuzhiyun if (!ccp->ccp_dma_chan)
671*4882a593Smuzhiyun return -ENOMEM;
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun dma_cmd_cache_name = devm_kasprintf(ccp->dev, GFP_KERNEL,
674*4882a593Smuzhiyun "%s-dmaengine-cmd-cache",
675*4882a593Smuzhiyun ccp->name);
676*4882a593Smuzhiyun if (!dma_cmd_cache_name)
677*4882a593Smuzhiyun return -ENOMEM;
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun ccp->dma_cmd_cache = kmem_cache_create(dma_cmd_cache_name,
680*4882a593Smuzhiyun sizeof(struct ccp_dma_cmd),
681*4882a593Smuzhiyun sizeof(void *),
682*4882a593Smuzhiyun SLAB_HWCACHE_ALIGN, NULL);
683*4882a593Smuzhiyun if (!ccp->dma_cmd_cache)
684*4882a593Smuzhiyun return -ENOMEM;
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun dma_desc_cache_name = devm_kasprintf(ccp->dev, GFP_KERNEL,
687*4882a593Smuzhiyun "%s-dmaengine-desc-cache",
688*4882a593Smuzhiyun ccp->name);
689*4882a593Smuzhiyun if (!dma_desc_cache_name) {
690*4882a593Smuzhiyun ret = -ENOMEM;
691*4882a593Smuzhiyun goto err_cache;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun ccp->dma_desc_cache = kmem_cache_create(dma_desc_cache_name,
695*4882a593Smuzhiyun sizeof(struct ccp_dma_desc),
696*4882a593Smuzhiyun sizeof(void *),
697*4882a593Smuzhiyun SLAB_HWCACHE_ALIGN, NULL);
698*4882a593Smuzhiyun if (!ccp->dma_desc_cache) {
699*4882a593Smuzhiyun ret = -ENOMEM;
700*4882a593Smuzhiyun goto err_cache;
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun dma_dev->dev = ccp->dev;
704*4882a593Smuzhiyun dma_dev->src_addr_widths = CCP_DMA_WIDTH(dma_get_mask(ccp->dev));
705*4882a593Smuzhiyun dma_dev->dst_addr_widths = CCP_DMA_WIDTH(dma_get_mask(ccp->dev));
706*4882a593Smuzhiyun dma_dev->directions = DMA_MEM_TO_MEM;
707*4882a593Smuzhiyun dma_dev->residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
708*4882a593Smuzhiyun dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
709*4882a593Smuzhiyun dma_cap_set(DMA_INTERRUPT, dma_dev->cap_mask);
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun /* The DMA channels for this device can be set to public or private,
712*4882a593Smuzhiyun * and overridden by the module parameter dma_chan_attr.
713*4882a593Smuzhiyun * Default: according to the value in vdata (dma_chan_attr=0)
714*4882a593Smuzhiyun * dma_chan_attr=0x1: all channels private (override vdata)
715*4882a593Smuzhiyun * dma_chan_attr=0x2: all channels public (override vdata)
716*4882a593Smuzhiyun */
717*4882a593Smuzhiyun if (ccp_get_dma_chan_attr(ccp) == DMA_PRIVATE)
718*4882a593Smuzhiyun dma_cap_set(DMA_PRIVATE, dma_dev->cap_mask);
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun INIT_LIST_HEAD(&dma_dev->channels);
721*4882a593Smuzhiyun for (i = 0; i < ccp->cmd_q_count; i++) {
722*4882a593Smuzhiyun chan = ccp->ccp_dma_chan + i;
723*4882a593Smuzhiyun dma_chan = &chan->dma_chan;
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun chan->ccp = ccp;
726*4882a593Smuzhiyun
727*4882a593Smuzhiyun spin_lock_init(&chan->lock);
728*4882a593Smuzhiyun INIT_LIST_HEAD(&chan->created);
729*4882a593Smuzhiyun INIT_LIST_HEAD(&chan->pending);
730*4882a593Smuzhiyun INIT_LIST_HEAD(&chan->active);
731*4882a593Smuzhiyun INIT_LIST_HEAD(&chan->complete);
732*4882a593Smuzhiyun
733*4882a593Smuzhiyun tasklet_init(&chan->cleanup_tasklet, ccp_do_cleanup,
734*4882a593Smuzhiyun (unsigned long)chan);
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun dma_chan->device = dma_dev;
737*4882a593Smuzhiyun dma_cookie_init(dma_chan);
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun list_add_tail(&dma_chan->device_node, &dma_dev->channels);
740*4882a593Smuzhiyun }
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun dma_dev->device_free_chan_resources = ccp_free_chan_resources;
743*4882a593Smuzhiyun dma_dev->device_prep_dma_memcpy = ccp_prep_dma_memcpy;
744*4882a593Smuzhiyun dma_dev->device_prep_dma_interrupt = ccp_prep_dma_interrupt;
745*4882a593Smuzhiyun dma_dev->device_issue_pending = ccp_issue_pending;
746*4882a593Smuzhiyun dma_dev->device_tx_status = ccp_tx_status;
747*4882a593Smuzhiyun dma_dev->device_pause = ccp_pause;
748*4882a593Smuzhiyun dma_dev->device_resume = ccp_resume;
749*4882a593Smuzhiyun dma_dev->device_terminate_all = ccp_terminate_all;
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun ret = dma_async_device_register(dma_dev);
752*4882a593Smuzhiyun if (ret)
753*4882a593Smuzhiyun goto err_reg;
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun return 0;
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun err_reg:
758*4882a593Smuzhiyun ccp_dma_release(ccp);
759*4882a593Smuzhiyun kmem_cache_destroy(ccp->dma_desc_cache);
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun err_cache:
762*4882a593Smuzhiyun kmem_cache_destroy(ccp->dma_cmd_cache);
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun return ret;
765*4882a593Smuzhiyun }
766*4882a593Smuzhiyun
ccp_dmaengine_unregister(struct ccp_device * ccp)767*4882a593Smuzhiyun void ccp_dmaengine_unregister(struct ccp_device *ccp)
768*4882a593Smuzhiyun {
769*4882a593Smuzhiyun struct dma_device *dma_dev = &ccp->dma_dev;
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun if (!dmaengine)
772*4882a593Smuzhiyun return;
773*4882a593Smuzhiyun
774*4882a593Smuzhiyun ccp_dma_release(ccp);
775*4882a593Smuzhiyun dma_async_device_unregister(dma_dev);
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun kmem_cache_destroy(ccp->dma_desc_cache);
778*4882a593Smuzhiyun kmem_cache_destroy(ccp->dma_cmd_cache);
779*4882a593Smuzhiyun }
780