1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * CAAM/SEC 4.x functions for using scatterlists in caam driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2008-2011 Freescale Semiconductor, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #ifndef _SG_SW_SEC4_H_
10*4882a593Smuzhiyun #define _SG_SW_SEC4_H_
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include "ctrl.h"
13*4882a593Smuzhiyun #include "regs.h"
14*4882a593Smuzhiyun #include "sg_sw_qm2.h"
15*4882a593Smuzhiyun #include <soc/fsl/dpaa2-fd.h>
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun struct sec4_sg_entry {
18*4882a593Smuzhiyun u64 ptr;
19*4882a593Smuzhiyun u32 len;
20*4882a593Smuzhiyun u32 bpid_offset;
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun * convert single dma address to h/w link table format
25*4882a593Smuzhiyun */
dma_to_sec4_sg_one(struct sec4_sg_entry * sec4_sg_ptr,dma_addr_t dma,u32 len,u16 offset)26*4882a593Smuzhiyun static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr,
27*4882a593Smuzhiyun dma_addr_t dma, u32 len, u16 offset)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun if (caam_dpaa2) {
30*4882a593Smuzhiyun dma_to_qm_sg_one((struct dpaa2_sg_entry *)sec4_sg_ptr, dma, len,
31*4882a593Smuzhiyun offset);
32*4882a593Smuzhiyun } else {
33*4882a593Smuzhiyun sec4_sg_ptr->ptr = cpu_to_caam_dma64(dma);
34*4882a593Smuzhiyun sec4_sg_ptr->len = cpu_to_caam32(len);
35*4882a593Smuzhiyun sec4_sg_ptr->bpid_offset = cpu_to_caam32(offset &
36*4882a593Smuzhiyun SEC4_SG_OFFSET_MASK);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun print_hex_dump_debug("sec4_sg_ptr@: ", DUMP_PREFIX_ADDRESS, 16, 4,
40*4882a593Smuzhiyun sec4_sg_ptr, sizeof(struct sec4_sg_entry), 1);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /*
44*4882a593Smuzhiyun * convert scatterlist to h/w link table format
45*4882a593Smuzhiyun * but does not have final bit; instead, returns last entry
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun static inline struct sec4_sg_entry *
sg_to_sec4_sg(struct scatterlist * sg,int len,struct sec4_sg_entry * sec4_sg_ptr,u16 offset)48*4882a593Smuzhiyun sg_to_sec4_sg(struct scatterlist *sg, int len,
49*4882a593Smuzhiyun struct sec4_sg_entry *sec4_sg_ptr, u16 offset)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun int ent_len;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun while (len) {
54*4882a593Smuzhiyun ent_len = min_t(int, sg_dma_len(sg), len);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun dma_to_sec4_sg_one(sec4_sg_ptr, sg_dma_address(sg), ent_len,
57*4882a593Smuzhiyun offset);
58*4882a593Smuzhiyun sec4_sg_ptr++;
59*4882a593Smuzhiyun sg = sg_next(sg);
60*4882a593Smuzhiyun len -= ent_len;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun return sec4_sg_ptr - 1;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
sg_to_sec4_set_last(struct sec4_sg_entry * sec4_sg_ptr)65*4882a593Smuzhiyun static inline void sg_to_sec4_set_last(struct sec4_sg_entry *sec4_sg_ptr)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun if (caam_dpaa2)
68*4882a593Smuzhiyun dpaa2_sg_set_final((struct dpaa2_sg_entry *)sec4_sg_ptr, true);
69*4882a593Smuzhiyun else
70*4882a593Smuzhiyun sec4_sg_ptr->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun /*
74*4882a593Smuzhiyun * convert scatterlist to h/w link table format
75*4882a593Smuzhiyun * scatterlist must have been previously dma mapped
76*4882a593Smuzhiyun */
sg_to_sec4_sg_last(struct scatterlist * sg,int len,struct sec4_sg_entry * sec4_sg_ptr,u16 offset)77*4882a593Smuzhiyun static inline void sg_to_sec4_sg_last(struct scatterlist *sg, int len,
78*4882a593Smuzhiyun struct sec4_sg_entry *sec4_sg_ptr,
79*4882a593Smuzhiyun u16 offset)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun sec4_sg_ptr = sg_to_sec4_sg(sg, len, sec4_sg_ptr, offset);
82*4882a593Smuzhiyun sg_to_sec4_set_last(sec4_sg_ptr);
83*4882a593Smuzhiyun }
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #endif /* _SG_SW_SEC4_H_ */
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