1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2013-2016 Freescale Semiconductor Inc. 4*4882a593Smuzhiyun * Copyright 2017-2018 NXP 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun #ifndef _DPSECI_H_ 7*4882a593Smuzhiyun #define _DPSECI_H_ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun /* 10*4882a593Smuzhiyun * Data Path SEC Interface API 11*4882a593Smuzhiyun * Contains initialization APIs and runtime control APIs for DPSECI 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun struct fsl_mc_io; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /** 17*4882a593Smuzhiyun * General DPSECI macros 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /** 21*4882a593Smuzhiyun * Maximum number of Tx/Rx queues per DPSECI object 22*4882a593Smuzhiyun */ 23*4882a593Smuzhiyun #define DPSECI_MAX_QUEUE_NUM 16 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /** 26*4882a593Smuzhiyun * All queues considered; see dpseci_set_rx_queue() 27*4882a593Smuzhiyun */ 28*4882a593Smuzhiyun #define DPSECI_ALL_QUEUES (u8)(-1) 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun int dpseci_open(struct fsl_mc_io *mc_io, u32 cmd_flags, int dpseci_id, 31*4882a593Smuzhiyun u16 *token); 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun int dpseci_close(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /** 36*4882a593Smuzhiyun * Enable the Congestion Group support 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun #define DPSECI_OPT_HAS_CG 0x000020 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /** 41*4882a593Smuzhiyun * struct dpseci_cfg - Structure representing DPSECI configuration 42*4882a593Smuzhiyun * @options: Any combination of the following flags: 43*4882a593Smuzhiyun * DPSECI_OPT_HAS_CG 44*4882a593Smuzhiyun * @num_tx_queues: num of queues towards the SEC 45*4882a593Smuzhiyun * @num_rx_queues: num of queues back from the SEC 46*4882a593Smuzhiyun * @priorities: Priorities for the SEC hardware processing; 47*4882a593Smuzhiyun * each place in the array is the priority of the tx queue 48*4882a593Smuzhiyun * towards the SEC; 49*4882a593Smuzhiyun * valid priorities are configured with values 1-8; 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun struct dpseci_cfg { 52*4882a593Smuzhiyun u32 options; 53*4882a593Smuzhiyun u8 num_tx_queues; 54*4882a593Smuzhiyun u8 num_rx_queues; 55*4882a593Smuzhiyun u8 priorities[DPSECI_MAX_QUEUE_NUM]; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun int dpseci_enable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun int dpseci_disable(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun int dpseci_reset(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token); 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun int dpseci_is_enabled(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, 65*4882a593Smuzhiyun int *en); 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /** 68*4882a593Smuzhiyun * struct dpseci_attr - Structure representing DPSECI attributes 69*4882a593Smuzhiyun * @id: DPSECI object ID 70*4882a593Smuzhiyun * @num_tx_queues: number of queues towards the SEC 71*4882a593Smuzhiyun * @num_rx_queues: number of queues back from the SEC 72*4882a593Smuzhiyun * @options: any combination of the following flags: 73*4882a593Smuzhiyun * DPSECI_OPT_HAS_CG 74*4882a593Smuzhiyun */ 75*4882a593Smuzhiyun struct dpseci_attr { 76*4882a593Smuzhiyun int id; 77*4882a593Smuzhiyun u8 num_tx_queues; 78*4882a593Smuzhiyun u8 num_rx_queues; 79*4882a593Smuzhiyun u32 options; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun int dpseci_get_attributes(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, 83*4882a593Smuzhiyun struct dpseci_attr *attr); 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /** 86*4882a593Smuzhiyun * enum dpseci_dest - DPSECI destination types 87*4882a593Smuzhiyun * @DPSECI_DEST_NONE: Unassigned destination; The queue is set in parked mode 88*4882a593Smuzhiyun * and does not generate FQDAN notifications; user is expected to dequeue 89*4882a593Smuzhiyun * from the queue based on polling or other user-defined method 90*4882a593Smuzhiyun * @DPSECI_DEST_DPIO: The queue is set in schedule mode and generates FQDAN 91*4882a593Smuzhiyun * notifications to the specified DPIO; user is expected to dequeue from 92*4882a593Smuzhiyun * the queue only after notification is received 93*4882a593Smuzhiyun * @DPSECI_DEST_DPCON: The queue is set in schedule mode and does not generate 94*4882a593Smuzhiyun * FQDAN notifications, but is connected to the specified DPCON object; 95*4882a593Smuzhiyun * user is expected to dequeue from the DPCON channel 96*4882a593Smuzhiyun */ 97*4882a593Smuzhiyun enum dpseci_dest { 98*4882a593Smuzhiyun DPSECI_DEST_NONE = 0, 99*4882a593Smuzhiyun DPSECI_DEST_DPIO, 100*4882a593Smuzhiyun DPSECI_DEST_DPCON 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun /** 104*4882a593Smuzhiyun * struct dpseci_dest_cfg - Structure representing DPSECI destination parameters 105*4882a593Smuzhiyun * @dest_type: Destination type 106*4882a593Smuzhiyun * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type 107*4882a593Smuzhiyun * @priority: Priority selection within the DPIO or DPCON channel; valid values 108*4882a593Smuzhiyun * are 0-1 or 0-7, depending on the number of priorities in that channel; 109*4882a593Smuzhiyun * not relevant for 'DPSECI_DEST_NONE' option 110*4882a593Smuzhiyun */ 111*4882a593Smuzhiyun struct dpseci_dest_cfg { 112*4882a593Smuzhiyun enum dpseci_dest dest_type; 113*4882a593Smuzhiyun int dest_id; 114*4882a593Smuzhiyun u8 priority; 115*4882a593Smuzhiyun }; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun /** 118*4882a593Smuzhiyun * DPSECI queue modification options 119*4882a593Smuzhiyun */ 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun /** 122*4882a593Smuzhiyun * Select to modify the user's context associated with the queue 123*4882a593Smuzhiyun */ 124*4882a593Smuzhiyun #define DPSECI_QUEUE_OPT_USER_CTX 0x00000001 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun /** 127*4882a593Smuzhiyun * Select to modify the queue's destination 128*4882a593Smuzhiyun */ 129*4882a593Smuzhiyun #define DPSECI_QUEUE_OPT_DEST 0x00000002 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun /** 132*4882a593Smuzhiyun * Select to modify the queue's order preservation 133*4882a593Smuzhiyun */ 134*4882a593Smuzhiyun #define DPSECI_QUEUE_OPT_ORDER_PRESERVATION 0x00000004 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /** 137*4882a593Smuzhiyun * struct dpseci_rx_queue_cfg - DPSECI RX queue configuration 138*4882a593Smuzhiyun * @options: Flags representing the suggested modifications to the queue; 139*4882a593Smuzhiyun * Use any combination of 'DPSECI_QUEUE_OPT_<X>' flags 140*4882a593Smuzhiyun * @order_preservation_en: order preservation configuration for the rx queue 141*4882a593Smuzhiyun * valid only if 'DPSECI_QUEUE_OPT_ORDER_PRESERVATION' is contained in 'options' 142*4882a593Smuzhiyun * @user_ctx: User context value provided in the frame descriptor of each 143*4882a593Smuzhiyun * dequeued frame; valid only if 'DPSECI_QUEUE_OPT_USER_CTX' is contained 144*4882a593Smuzhiyun * in 'options' 145*4882a593Smuzhiyun * @dest_cfg: Queue destination parameters; valid only if 146*4882a593Smuzhiyun * 'DPSECI_QUEUE_OPT_DEST' is contained in 'options' 147*4882a593Smuzhiyun */ 148*4882a593Smuzhiyun struct dpseci_rx_queue_cfg { 149*4882a593Smuzhiyun u32 options; 150*4882a593Smuzhiyun int order_preservation_en; 151*4882a593Smuzhiyun u64 user_ctx; 152*4882a593Smuzhiyun struct dpseci_dest_cfg dest_cfg; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun int dpseci_set_rx_queue(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, 156*4882a593Smuzhiyun u8 queue, const struct dpseci_rx_queue_cfg *cfg); 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun /** 159*4882a593Smuzhiyun * struct dpseci_rx_queue_attr - Structure representing attributes of Rx queues 160*4882a593Smuzhiyun * @user_ctx: User context value provided in the frame descriptor of each 161*4882a593Smuzhiyun * dequeued frame 162*4882a593Smuzhiyun * @order_preservation_en: Status of the order preservation configuration on the 163*4882a593Smuzhiyun * queue 164*4882a593Smuzhiyun * @dest_cfg: Queue destination configuration 165*4882a593Smuzhiyun * @fqid: Virtual FQID value to be used for dequeue operations 166*4882a593Smuzhiyun */ 167*4882a593Smuzhiyun struct dpseci_rx_queue_attr { 168*4882a593Smuzhiyun u64 user_ctx; 169*4882a593Smuzhiyun int order_preservation_en; 170*4882a593Smuzhiyun struct dpseci_dest_cfg dest_cfg; 171*4882a593Smuzhiyun u32 fqid; 172*4882a593Smuzhiyun }; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun int dpseci_get_rx_queue(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, 175*4882a593Smuzhiyun u8 queue, struct dpseci_rx_queue_attr *attr); 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun /** 178*4882a593Smuzhiyun * struct dpseci_tx_queue_attr - Structure representing attributes of Tx queues 179*4882a593Smuzhiyun * @fqid: Virtual FQID to be used for sending frames to SEC hardware 180*4882a593Smuzhiyun * @priority: SEC hardware processing priority for the queue 181*4882a593Smuzhiyun */ 182*4882a593Smuzhiyun struct dpseci_tx_queue_attr { 183*4882a593Smuzhiyun u32 fqid; 184*4882a593Smuzhiyun u8 priority; 185*4882a593Smuzhiyun }; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun int dpseci_get_tx_queue(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, 188*4882a593Smuzhiyun u8 queue, struct dpseci_tx_queue_attr *attr); 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun /** 191*4882a593Smuzhiyun * struct dpseci_sec_attr - Structure representing attributes of the SEC 192*4882a593Smuzhiyun * hardware accelerator 193*4882a593Smuzhiyun * @ip_id: ID for SEC 194*4882a593Smuzhiyun * @major_rev: Major revision number for SEC 195*4882a593Smuzhiyun * @minor_rev: Minor revision number for SEC 196*4882a593Smuzhiyun * @era: SEC Era 197*4882a593Smuzhiyun * @deco_num: The number of copies of the DECO that are implemented in this 198*4882a593Smuzhiyun * version of SEC 199*4882a593Smuzhiyun * @zuc_auth_acc_num: The number of copies of ZUCA that are implemented in this 200*4882a593Smuzhiyun * version of SEC 201*4882a593Smuzhiyun * @zuc_enc_acc_num: The number of copies of ZUCE that are implemented in this 202*4882a593Smuzhiyun * version of SEC 203*4882a593Smuzhiyun * @snow_f8_acc_num: The number of copies of the SNOW-f8 module that are 204*4882a593Smuzhiyun * implemented in this version of SEC 205*4882a593Smuzhiyun * @snow_f9_acc_num: The number of copies of the SNOW-f9 module that are 206*4882a593Smuzhiyun * implemented in this version of SEC 207*4882a593Smuzhiyun * @crc_acc_num: The number of copies of the CRC module that are implemented in 208*4882a593Smuzhiyun * this version of SEC 209*4882a593Smuzhiyun * @pk_acc_num: The number of copies of the Public Key module that are 210*4882a593Smuzhiyun * implemented in this version of SEC 211*4882a593Smuzhiyun * @kasumi_acc_num: The number of copies of the Kasumi module that are 212*4882a593Smuzhiyun * implemented in this version of SEC 213*4882a593Smuzhiyun * @rng_acc_num: The number of copies of the Random Number Generator that are 214*4882a593Smuzhiyun * implemented in this version of SEC 215*4882a593Smuzhiyun * @md_acc_num: The number of copies of the MDHA (Hashing module) that are 216*4882a593Smuzhiyun * implemented in this version of SEC 217*4882a593Smuzhiyun * @arc4_acc_num: The number of copies of the ARC4 module that are implemented 218*4882a593Smuzhiyun * in this version of SEC 219*4882a593Smuzhiyun * @des_acc_num: The number of copies of the DES module that are implemented in 220*4882a593Smuzhiyun * this version of SEC 221*4882a593Smuzhiyun * @aes_acc_num: The number of copies of the AES module that are implemented in 222*4882a593Smuzhiyun * this version of SEC 223*4882a593Smuzhiyun * @ccha_acc_num: The number of copies of the ChaCha20 module that are 224*4882a593Smuzhiyun * implemented in this version of SEC. 225*4882a593Smuzhiyun * @ptha_acc_num: The number of copies of the Poly1305 module that are 226*4882a593Smuzhiyun * implemented in this version of SEC. 227*4882a593Smuzhiyun **/ 228*4882a593Smuzhiyun struct dpseci_sec_attr { 229*4882a593Smuzhiyun u16 ip_id; 230*4882a593Smuzhiyun u8 major_rev; 231*4882a593Smuzhiyun u8 minor_rev; 232*4882a593Smuzhiyun u8 era; 233*4882a593Smuzhiyun u8 deco_num; 234*4882a593Smuzhiyun u8 zuc_auth_acc_num; 235*4882a593Smuzhiyun u8 zuc_enc_acc_num; 236*4882a593Smuzhiyun u8 snow_f8_acc_num; 237*4882a593Smuzhiyun u8 snow_f9_acc_num; 238*4882a593Smuzhiyun u8 crc_acc_num; 239*4882a593Smuzhiyun u8 pk_acc_num; 240*4882a593Smuzhiyun u8 kasumi_acc_num; 241*4882a593Smuzhiyun u8 rng_acc_num; 242*4882a593Smuzhiyun u8 md_acc_num; 243*4882a593Smuzhiyun u8 arc4_acc_num; 244*4882a593Smuzhiyun u8 des_acc_num; 245*4882a593Smuzhiyun u8 aes_acc_num; 246*4882a593Smuzhiyun u8 ccha_acc_num; 247*4882a593Smuzhiyun u8 ptha_acc_num; 248*4882a593Smuzhiyun }; 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun int dpseci_get_sec_attr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, 251*4882a593Smuzhiyun struct dpseci_sec_attr *attr); 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun int dpseci_get_api_version(struct fsl_mc_io *mc_io, u32 cmd_flags, 254*4882a593Smuzhiyun u16 *major_ver, u16 *minor_ver); 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun /** 257*4882a593Smuzhiyun * enum dpseci_congestion_unit - DPSECI congestion units 258*4882a593Smuzhiyun * @DPSECI_CONGESTION_UNIT_BYTES: bytes units 259*4882a593Smuzhiyun * @DPSECI_CONGESTION_UNIT_FRAMES: frames units 260*4882a593Smuzhiyun */ 261*4882a593Smuzhiyun enum dpseci_congestion_unit { 262*4882a593Smuzhiyun DPSECI_CONGESTION_UNIT_BYTES = 0, 263*4882a593Smuzhiyun DPSECI_CONGESTION_UNIT_FRAMES 264*4882a593Smuzhiyun }; 265*4882a593Smuzhiyun 266*4882a593Smuzhiyun /** 267*4882a593Smuzhiyun * CSCN message is written to message_iova once entering a 268*4882a593Smuzhiyun * congestion state (see 'threshold_entry') 269*4882a593Smuzhiyun */ 270*4882a593Smuzhiyun #define DPSECI_CGN_MODE_WRITE_MEM_ON_ENTER 0x00000001 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun /** 273*4882a593Smuzhiyun * CSCN message is written to message_iova once exiting a 274*4882a593Smuzhiyun * congestion state (see 'threshold_exit') 275*4882a593Smuzhiyun */ 276*4882a593Smuzhiyun #define DPSECI_CGN_MODE_WRITE_MEM_ON_EXIT 0x00000002 277*4882a593Smuzhiyun 278*4882a593Smuzhiyun /** 279*4882a593Smuzhiyun * CSCN write will attempt to allocate into a cache (coherent write); 280*4882a593Smuzhiyun * valid only if 'DPSECI_CGN_MODE_WRITE_MEM_<X>' is selected 281*4882a593Smuzhiyun */ 282*4882a593Smuzhiyun #define DPSECI_CGN_MODE_COHERENT_WRITE 0x00000004 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun /** 285*4882a593Smuzhiyun * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' CSCN message is sent to 286*4882a593Smuzhiyun * DPIO/DPCON's WQ channel once entering a congestion state 287*4882a593Smuzhiyun * (see 'threshold_entry') 288*4882a593Smuzhiyun */ 289*4882a593Smuzhiyun #define DPSECI_CGN_MODE_NOTIFY_DEST_ON_ENTER 0x00000008 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun /** 292*4882a593Smuzhiyun * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' CSCN message is sent to 293*4882a593Smuzhiyun * DPIO/DPCON's WQ channel once exiting a congestion state 294*4882a593Smuzhiyun * (see 'threshold_exit') 295*4882a593Smuzhiyun */ 296*4882a593Smuzhiyun #define DPSECI_CGN_MODE_NOTIFY_DEST_ON_EXIT 0x00000010 297*4882a593Smuzhiyun 298*4882a593Smuzhiyun /** 299*4882a593Smuzhiyun * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' when the CSCN is written 300*4882a593Smuzhiyun * to the sw-portal's DQRR, the DQRI interrupt is asserted immediately 301*4882a593Smuzhiyun * (if enabled) 302*4882a593Smuzhiyun */ 303*4882a593Smuzhiyun #define DPSECI_CGN_MODE_INTR_COALESCING_DISABLED 0x00000020 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun /** 306*4882a593Smuzhiyun * struct dpseci_congestion_notification_cfg - congestion notification 307*4882a593Smuzhiyun * configuration 308*4882a593Smuzhiyun * @units: units type 309*4882a593Smuzhiyun * @threshold_entry: above this threshold we enter a congestion state. 310*4882a593Smuzhiyun * set it to '0' to disable it 311*4882a593Smuzhiyun * @threshold_exit: below this threshold we exit the congestion state. 312*4882a593Smuzhiyun * @message_ctx: The context that will be part of the CSCN message 313*4882a593Smuzhiyun * @message_iova: I/O virtual address (must be in DMA-able memory), 314*4882a593Smuzhiyun * must be 16B aligned; 315*4882a593Smuzhiyun * @dest_cfg: CSCN can be send to either DPIO or DPCON WQ channel 316*4882a593Smuzhiyun * @notification_mode: Mask of available options; use 'DPSECI_CGN_MODE_<X>' 317*4882a593Smuzhiyun * values 318*4882a593Smuzhiyun */ 319*4882a593Smuzhiyun struct dpseci_congestion_notification_cfg { 320*4882a593Smuzhiyun enum dpseci_congestion_unit units; 321*4882a593Smuzhiyun u32 threshold_entry; 322*4882a593Smuzhiyun u32 threshold_exit; 323*4882a593Smuzhiyun u64 message_ctx; 324*4882a593Smuzhiyun u64 message_iova; 325*4882a593Smuzhiyun struct dpseci_dest_cfg dest_cfg; 326*4882a593Smuzhiyun u16 notification_mode; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun int dpseci_set_congestion_notification(struct fsl_mc_io *mc_io, u32 cmd_flags, 330*4882a593Smuzhiyun u16 token, const struct dpseci_congestion_notification_cfg *cfg); 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun int dpseci_get_congestion_notification(struct fsl_mc_io *mc_io, u32 cmd_flags, 333*4882a593Smuzhiyun u16 token, struct dpseci_congestion_notification_cfg *cfg); 334*4882a593Smuzhiyun 335*4882a593Smuzhiyun #endif /* _DPSECI_H_ */ 336