1*4882a593Smuzhiyun /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Shared descriptors for ahash algorithms
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2017 NXP
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef _CAAMHASH_DESC_H_
9*4882a593Smuzhiyun #define _CAAMHASH_DESC_H_
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun /* length of descriptors text */
12*4882a593Smuzhiyun #define DESC_AHASH_BASE (3 * CAAM_CMD_SZ)
13*4882a593Smuzhiyun #define DESC_AHASH_UPDATE_LEN (6 * CAAM_CMD_SZ)
14*4882a593Smuzhiyun #define DESC_AHASH_UPDATE_FIRST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ)
15*4882a593Smuzhiyun #define DESC_AHASH_FINAL_LEN (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ)
16*4882a593Smuzhiyun #define DESC_AHASH_DIGEST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ)
17*4882a593Smuzhiyun
is_xcbc_aes(u32 algtype)18*4882a593Smuzhiyun static inline bool is_xcbc_aes(u32 algtype)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun return (algtype & (OP_ALG_ALGSEL_MASK | OP_ALG_AAI_MASK)) ==
21*4882a593Smuzhiyun (OP_ALG_ALGSEL_AES | OP_ALG_AAI_XCBC_MAC);
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun void cnstr_shdsc_ahash(u32 * const desc, struct alginfo *adata, u32 state,
25*4882a593Smuzhiyun int digestsize, int ctx_len, bool import_ctx, int era);
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun void cnstr_shdsc_sk_hash(u32 * const desc, struct alginfo *adata, u32 state,
28*4882a593Smuzhiyun int digestsize, int ctx_len);
29*4882a593Smuzhiyun #endif /* _CAAMHASH_DESC_H_ */
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