1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ATMEL_TDES_REGS_H__ 3*4882a593Smuzhiyun #define __ATMEL_TDES_REGS_H__ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define TDES_CR 0x00 6*4882a593Smuzhiyun #define TDES_CR_START (1 << 0) 7*4882a593Smuzhiyun #define TDES_CR_SWRST (1 << 8) 8*4882a593Smuzhiyun #define TDES_CR_LOADSEED (1 << 16) 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define TDES_MR 0x04 11*4882a593Smuzhiyun #define TDES_MR_CYPHER_DEC (0 << 0) 12*4882a593Smuzhiyun #define TDES_MR_CYPHER_ENC (1 << 0) 13*4882a593Smuzhiyun #define TDES_MR_TDESMOD_MASK (0x3 << 1) 14*4882a593Smuzhiyun #define TDES_MR_TDESMOD_DES (0x0 << 1) 15*4882a593Smuzhiyun #define TDES_MR_TDESMOD_TDES (0x1 << 1) 16*4882a593Smuzhiyun #define TDES_MR_TDESMOD_XTEA (0x2 << 1) 17*4882a593Smuzhiyun #define TDES_MR_KEYMOD_3KEY (0 << 4) 18*4882a593Smuzhiyun #define TDES_MR_KEYMOD_2KEY (1 << 4) 19*4882a593Smuzhiyun #define TDES_MR_SMOD_MASK (0x3 << 8) 20*4882a593Smuzhiyun #define TDES_MR_SMOD_MANUAL (0x0 << 8) 21*4882a593Smuzhiyun #define TDES_MR_SMOD_AUTO (0x1 << 8) 22*4882a593Smuzhiyun #define TDES_MR_SMOD_PDC (0x2 << 8) 23*4882a593Smuzhiyun #define TDES_MR_OPMOD_MASK (0x3 << 12) 24*4882a593Smuzhiyun #define TDES_MR_OPMOD_ECB (0x0 << 12) 25*4882a593Smuzhiyun #define TDES_MR_OPMOD_CBC (0x1 << 12) 26*4882a593Smuzhiyun #define TDES_MR_OPMOD_OFB (0x2 << 12) 27*4882a593Smuzhiyun #define TDES_MR_OPMOD_CFB (0x3 << 12) 28*4882a593Smuzhiyun #define TDES_MR_LOD (0x1 << 15) 29*4882a593Smuzhiyun #define TDES_MR_CFBS_MASK (0x3 << 16) 30*4882a593Smuzhiyun #define TDES_MR_CFBS_64b (0x0 << 16) 31*4882a593Smuzhiyun #define TDES_MR_CFBS_32b (0x1 << 16) 32*4882a593Smuzhiyun #define TDES_MR_CFBS_16b (0x2 << 16) 33*4882a593Smuzhiyun #define TDES_MR_CFBS_8b (0x3 << 16) 34*4882a593Smuzhiyun #define TDES_MR_CKEY_MASK (0xF << 20) 35*4882a593Smuzhiyun #define TDES_MR_CKEY_OFFSET 20 36*4882a593Smuzhiyun #define TDES_MR_CTYPE_MASK (0x3F << 24) 37*4882a593Smuzhiyun #define TDES_MR_CTYPE_OFFSET 24 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define TDES_IER 0x10 40*4882a593Smuzhiyun #define TDES_IDR 0x14 41*4882a593Smuzhiyun #define TDES_IMR 0x18 42*4882a593Smuzhiyun #define TDES_ISR 0x1C 43*4882a593Smuzhiyun #define TDES_INT_DATARDY (1 << 0) 44*4882a593Smuzhiyun #define TDES_INT_ENDRX (1 << 1) 45*4882a593Smuzhiyun #define TDES_INT_ENDTX (1 << 2) 46*4882a593Smuzhiyun #define TDES_INT_RXBUFF (1 << 3) 47*4882a593Smuzhiyun #define TDES_INT_TXBUFE (1 << 4) 48*4882a593Smuzhiyun #define TDES_INT_URAD (1 << 8) 49*4882a593Smuzhiyun #define TDES_ISR_URAT_MASK (0x3 << 12) 50*4882a593Smuzhiyun #define TDES_ISR_URAT_IDR (0x0 << 12) 51*4882a593Smuzhiyun #define TDES_ISR_URAT_ODR (0x1 << 12) 52*4882a593Smuzhiyun #define TDES_ISR_URAT_MR (0x2 << 12) 53*4882a593Smuzhiyun #define TDES_ISR_URAT_WO (0x3 << 12) 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun #define TDES_KEY1W1R 0x20 57*4882a593Smuzhiyun #define TDES_KEY1W2R 0x24 58*4882a593Smuzhiyun #define TDES_KEY2W1R 0x28 59*4882a593Smuzhiyun #define TDES_KEY2W2R 0x2C 60*4882a593Smuzhiyun #define TDES_KEY3W1R 0x30 61*4882a593Smuzhiyun #define TDES_KEY3W2R 0x34 62*4882a593Smuzhiyun #define TDES_IDATA1R 0x40 63*4882a593Smuzhiyun #define TDES_IDATA2R 0x44 64*4882a593Smuzhiyun #define TDES_ODATA1R 0x50 65*4882a593Smuzhiyun #define TDES_ODATA2R 0x54 66*4882a593Smuzhiyun #define TDES_IV1R 0x60 67*4882a593Smuzhiyun #define TDES_IV2R 0x64 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun #define TDES_XTEARNDR 0x70 70*4882a593Smuzhiyun #define TDES_XTEARNDR_XTEA_RNDS_MASK (0x3F << 0) 71*4882a593Smuzhiyun #define TDES_XTEARNDR_XTEA_RNDS_OFFSET 0 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define TDES_HW_VERSION 0xFC 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun #define TDES_RPR 0x100 76*4882a593Smuzhiyun #define TDES_RCR 0x104 77*4882a593Smuzhiyun #define TDES_TPR 0x108 78*4882a593Smuzhiyun #define TDES_TCR 0x10C 79*4882a593Smuzhiyun #define TDES_RNPR 0x118 80*4882a593Smuzhiyun #define TDES_RNCR 0x11C 81*4882a593Smuzhiyun #define TDES_TNPR 0x118 82*4882a593Smuzhiyun #define TDES_TNCR 0x11C 83*4882a593Smuzhiyun #define TDES_PTCR 0x120 84*4882a593Smuzhiyun #define TDES_PTCR_RXTEN (1 << 0) 85*4882a593Smuzhiyun #define TDES_PTCR_RXTDIS (1 << 1) 86*4882a593Smuzhiyun #define TDES_PTCR_TXTEN (1 << 8) 87*4882a593Smuzhiyun #define TDES_PTCR_TXTDIS (1 << 9) 88*4882a593Smuzhiyun #define TDES_PTSR 0x124 89*4882a593Smuzhiyun #define TDES_PTSR_RXTEN (1 << 0) 90*4882a593Smuzhiyun #define TDES_PTSR_TXTEN (1 << 8) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun #endif /* __ATMEL_TDES_REGS_H__ */ 93