1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2017, Microchip Technology Inc. 4*4882a593Smuzhiyun * Author: Tudor Ambarus <tudor.ambarus@microchip.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __ATMEL_I2C_H__ 8*4882a593Smuzhiyun #define __ATMEL_I2C_H__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/hw_random.h> 11*4882a593Smuzhiyun #include <linux/types.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define ATMEL_ECC_PRIORITY 300 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define COMMAND 0x03 /* packet function */ 16*4882a593Smuzhiyun #define SLEEP_TOKEN 0x01 17*4882a593Smuzhiyun #define WAKE_TOKEN_MAX_SIZE 8 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* Definitions of Data and Command sizes */ 20*4882a593Smuzhiyun #define WORD_ADDR_SIZE 1 21*4882a593Smuzhiyun #define COUNT_SIZE 1 22*4882a593Smuzhiyun #define CRC_SIZE 2 23*4882a593Smuzhiyun #define CMD_OVERHEAD_SIZE (COUNT_SIZE + CRC_SIZE) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* size in bytes of the n prime */ 26*4882a593Smuzhiyun #define ATMEL_ECC_NIST_P256_N_SIZE 32 27*4882a593Smuzhiyun #define ATMEL_ECC_PUBKEY_SIZE (2 * ATMEL_ECC_NIST_P256_N_SIZE) 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define STATUS_RSP_SIZE 4 30*4882a593Smuzhiyun #define ECDH_RSP_SIZE (32 + CMD_OVERHEAD_SIZE) 31*4882a593Smuzhiyun #define GENKEY_RSP_SIZE (ATMEL_ECC_PUBKEY_SIZE + \ 32*4882a593Smuzhiyun CMD_OVERHEAD_SIZE) 33*4882a593Smuzhiyun #define READ_RSP_SIZE (4 + CMD_OVERHEAD_SIZE) 34*4882a593Smuzhiyun #define RANDOM_RSP_SIZE (32 + CMD_OVERHEAD_SIZE) 35*4882a593Smuzhiyun #define MAX_RSP_SIZE GENKEY_RSP_SIZE 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /** 38*4882a593Smuzhiyun * atmel_i2c_cmd - structure used for communicating with the device. 39*4882a593Smuzhiyun * @word_addr: indicates the function of the packet sent to the device. This 40*4882a593Smuzhiyun * byte should have a value of COMMAND for normal operation. 41*4882a593Smuzhiyun * @count : number of bytes to be transferred to (or from) the device. 42*4882a593Smuzhiyun * @opcode : the command code. 43*4882a593Smuzhiyun * @param1 : the first parameter; always present. 44*4882a593Smuzhiyun * @param2 : the second parameter; always present. 45*4882a593Smuzhiyun * @data : optional remaining input data. Includes a 2-byte CRC. 46*4882a593Smuzhiyun * @rxsize : size of the data received from i2c client. 47*4882a593Smuzhiyun * @msecs : command execution time in milliseconds 48*4882a593Smuzhiyun */ 49*4882a593Smuzhiyun struct atmel_i2c_cmd { 50*4882a593Smuzhiyun u8 word_addr; 51*4882a593Smuzhiyun u8 count; 52*4882a593Smuzhiyun u8 opcode; 53*4882a593Smuzhiyun u8 param1; 54*4882a593Smuzhiyun __le16 param2; 55*4882a593Smuzhiyun u8 data[MAX_RSP_SIZE]; 56*4882a593Smuzhiyun u8 msecs; 57*4882a593Smuzhiyun u16 rxsize; 58*4882a593Smuzhiyun } __packed; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* Status/Error codes */ 61*4882a593Smuzhiyun #define STATUS_SIZE 0x04 62*4882a593Smuzhiyun #define STATUS_NOERR 0x00 63*4882a593Smuzhiyun #define STATUS_WAKE_SUCCESSFUL 0x11 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* Definitions for eeprom organization */ 66*4882a593Smuzhiyun #define CONFIG_ZONE 0 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* Definitions for Indexes common to all commands */ 69*4882a593Smuzhiyun #define RSP_DATA_IDX 1 /* buffer index of data in response */ 70*4882a593Smuzhiyun #define DATA_SLOT_2 2 /* used for ECDH private key */ 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* Definitions for the device lock state */ 73*4882a593Smuzhiyun #define DEVICE_LOCK_ADDR 0x15 74*4882a593Smuzhiyun #define LOCK_VALUE_IDX (RSP_DATA_IDX + 2) 75*4882a593Smuzhiyun #define LOCK_CONFIG_IDX (RSP_DATA_IDX + 3) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* 78*4882a593Smuzhiyun * Wake High delay to data communication (microseconds). SDA should be stable 79*4882a593Smuzhiyun * high for this entire duration. 80*4882a593Smuzhiyun */ 81*4882a593Smuzhiyun #define TWHI_MIN 1500 82*4882a593Smuzhiyun #define TWHI_MAX 1550 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* Wake Low duration */ 85*4882a593Smuzhiyun #define TWLO_USEC 60 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* Command execution time (milliseconds) */ 88*4882a593Smuzhiyun #define MAX_EXEC_TIME_ECDH 58 89*4882a593Smuzhiyun #define MAX_EXEC_TIME_GENKEY 115 90*4882a593Smuzhiyun #define MAX_EXEC_TIME_READ 1 91*4882a593Smuzhiyun #define MAX_EXEC_TIME_RANDOM 50 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* Command opcode */ 94*4882a593Smuzhiyun #define OPCODE_ECDH 0x43 95*4882a593Smuzhiyun #define OPCODE_GENKEY 0x40 96*4882a593Smuzhiyun #define OPCODE_READ 0x02 97*4882a593Smuzhiyun #define OPCODE_RANDOM 0x1b 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* Definitions for the READ Command */ 100*4882a593Smuzhiyun #define READ_COUNT 7 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun /* Definitions for the RANDOM Command */ 103*4882a593Smuzhiyun #define RANDOM_COUNT 7 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun /* Definitions for the GenKey Command */ 106*4882a593Smuzhiyun #define GENKEY_COUNT 7 107*4882a593Smuzhiyun #define GENKEY_MODE_PRIVATE 0x04 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun /* Definitions for the ECDH Command */ 110*4882a593Smuzhiyun #define ECDH_COUNT 71 111*4882a593Smuzhiyun #define ECDH_PREFIX_MODE 0x00 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun /* Used for binding tfm objects to i2c clients. */ 114*4882a593Smuzhiyun struct atmel_ecc_driver_data { 115*4882a593Smuzhiyun struct list_head i2c_client_list; 116*4882a593Smuzhiyun spinlock_t i2c_list_lock; 117*4882a593Smuzhiyun } ____cacheline_aligned; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun /** 120*4882a593Smuzhiyun * atmel_i2c_client_priv - i2c_client private data 121*4882a593Smuzhiyun * @client : pointer to i2c client device 122*4882a593Smuzhiyun * @i2c_client_list_node: part of i2c_client_list 123*4882a593Smuzhiyun * @lock : lock for sending i2c commands 124*4882a593Smuzhiyun * @wake_token : wake token array of zeros 125*4882a593Smuzhiyun * @wake_token_sz : size in bytes of the wake_token 126*4882a593Smuzhiyun * @tfm_count : number of active crypto transformations on i2c client 127*4882a593Smuzhiyun * 128*4882a593Smuzhiyun * Reads and writes from/to the i2c client are sequential. The first byte 129*4882a593Smuzhiyun * transmitted to the device is treated as the byte size. Any attempt to send 130*4882a593Smuzhiyun * more than this number of bytes will cause the device to not ACK those bytes. 131*4882a593Smuzhiyun * After the host writes a single command byte to the input buffer, reads are 132*4882a593Smuzhiyun * prohibited until after the device completes command execution. Use a mutex 133*4882a593Smuzhiyun * when sending i2c commands. 134*4882a593Smuzhiyun */ 135*4882a593Smuzhiyun struct atmel_i2c_client_priv { 136*4882a593Smuzhiyun struct i2c_client *client; 137*4882a593Smuzhiyun struct list_head i2c_client_list_node; 138*4882a593Smuzhiyun struct mutex lock; 139*4882a593Smuzhiyun u8 wake_token[WAKE_TOKEN_MAX_SIZE]; 140*4882a593Smuzhiyun size_t wake_token_sz; 141*4882a593Smuzhiyun atomic_t tfm_count ____cacheline_aligned; 142*4882a593Smuzhiyun struct hwrng hwrng; 143*4882a593Smuzhiyun }; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun /** 146*4882a593Smuzhiyun * atmel_i2c_work_data - data structure representing the work 147*4882a593Smuzhiyun * @ctx : transformation context. 148*4882a593Smuzhiyun * @cbk : pointer to a callback function to be invoked upon completion of this 149*4882a593Smuzhiyun * request. This has the form: 150*4882a593Smuzhiyun * callback(struct atmel_i2c_work_data *work_data, void *areq, u8 status) 151*4882a593Smuzhiyun * where: 152*4882a593Smuzhiyun * @work_data: data structure representing the work 153*4882a593Smuzhiyun * @areq : optional pointer to an argument passed with the original 154*4882a593Smuzhiyun * request. 155*4882a593Smuzhiyun * @status : status returned from the i2c client device or i2c error. 156*4882a593Smuzhiyun * @areq: optional pointer to a user argument for use at callback time. 157*4882a593Smuzhiyun * @work: describes the task to be executed. 158*4882a593Smuzhiyun * @cmd : structure used for communicating with the device. 159*4882a593Smuzhiyun */ 160*4882a593Smuzhiyun struct atmel_i2c_work_data { 161*4882a593Smuzhiyun void *ctx; 162*4882a593Smuzhiyun struct i2c_client *client; 163*4882a593Smuzhiyun void (*cbk)(struct atmel_i2c_work_data *work_data, void *areq, 164*4882a593Smuzhiyun int status); 165*4882a593Smuzhiyun void *areq; 166*4882a593Smuzhiyun struct work_struct work; 167*4882a593Smuzhiyun struct atmel_i2c_cmd cmd; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun int atmel_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id); 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun void atmel_i2c_enqueue(struct atmel_i2c_work_data *work_data, 173*4882a593Smuzhiyun void (*cbk)(struct atmel_i2c_work_data *work_data, 174*4882a593Smuzhiyun void *areq, int status), 175*4882a593Smuzhiyun void *areq); 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd); 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun void atmel_i2c_init_read_cmd(struct atmel_i2c_cmd *cmd); 180*4882a593Smuzhiyun void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd); 181*4882a593Smuzhiyun void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid); 182*4882a593Smuzhiyun int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd, 183*4882a593Smuzhiyun struct scatterlist *pubkey); 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun #endif /* __ATMEL_I2C_H__ */ 186