xref: /OK3568_Linux_fs/kernel/drivers/crypto/atmel-i2c.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Microchip / Atmel ECC (I2C) driver.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2017, Microchip Technology Inc.
6*4882a593Smuzhiyun  * Author: Tudor Ambarus <tudor.ambarus@microchip.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/bitrev.h>
10*4882a593Smuzhiyun #include <linux/crc16.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/device.h>
13*4882a593Smuzhiyun #include <linux/err.h>
14*4882a593Smuzhiyun #include <linux/errno.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/scatterlist.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/workqueue.h>
22*4882a593Smuzhiyun #include "atmel-i2c.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun static const struct {
25*4882a593Smuzhiyun 	u8 value;
26*4882a593Smuzhiyun 	const char *error_text;
27*4882a593Smuzhiyun } error_list[] = {
28*4882a593Smuzhiyun 	{ 0x01, "CheckMac or Verify miscompare" },
29*4882a593Smuzhiyun 	{ 0x03, "Parse Error" },
30*4882a593Smuzhiyun 	{ 0x05, "ECC Fault" },
31*4882a593Smuzhiyun 	{ 0x0F, "Execution Error" },
32*4882a593Smuzhiyun 	{ 0xEE, "Watchdog about to expire" },
33*4882a593Smuzhiyun 	{ 0xFF, "CRC or other communication error" },
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /**
37*4882a593Smuzhiyun  * atmel_i2c_checksum() - Generate 16-bit CRC as required by ATMEL ECC.
38*4882a593Smuzhiyun  * CRC16 verification of the count, opcode, param1, param2 and data bytes.
39*4882a593Smuzhiyun  * The checksum is saved in little-endian format in the least significant
40*4882a593Smuzhiyun  * two bytes of the command. CRC polynomial is 0x8005 and the initial register
41*4882a593Smuzhiyun  * value should be zero.
42*4882a593Smuzhiyun  *
43*4882a593Smuzhiyun  * @cmd : structure used for communicating with the device.
44*4882a593Smuzhiyun  */
atmel_i2c_checksum(struct atmel_i2c_cmd * cmd)45*4882a593Smuzhiyun static void atmel_i2c_checksum(struct atmel_i2c_cmd *cmd)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	u8 *data = &cmd->count;
48*4882a593Smuzhiyun 	size_t len = cmd->count - CRC_SIZE;
49*4882a593Smuzhiyun 	__le16 *__crc16 = (__le16 *)(data + len);
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	*__crc16 = cpu_to_le16(bitrev16(crc16(0, data, len)));
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
atmel_i2c_init_read_cmd(struct atmel_i2c_cmd * cmd)54*4882a593Smuzhiyun void atmel_i2c_init_read_cmd(struct atmel_i2c_cmd *cmd)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	cmd->word_addr = COMMAND;
57*4882a593Smuzhiyun 	cmd->opcode = OPCODE_READ;
58*4882a593Smuzhiyun 	/*
59*4882a593Smuzhiyun 	 * Read the word from Configuration zone that contains the lock bytes
60*4882a593Smuzhiyun 	 * (UserExtra, Selector, LockValue, LockConfig).
61*4882a593Smuzhiyun 	 */
62*4882a593Smuzhiyun 	cmd->param1 = CONFIG_ZONE;
63*4882a593Smuzhiyun 	cmd->param2 = cpu_to_le16(DEVICE_LOCK_ADDR);
64*4882a593Smuzhiyun 	cmd->count = READ_COUNT;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	atmel_i2c_checksum(cmd);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	cmd->msecs = MAX_EXEC_TIME_READ;
69*4882a593Smuzhiyun 	cmd->rxsize = READ_RSP_SIZE;
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_i2c_init_read_cmd);
72*4882a593Smuzhiyun 
atmel_i2c_init_random_cmd(struct atmel_i2c_cmd * cmd)73*4882a593Smuzhiyun void atmel_i2c_init_random_cmd(struct atmel_i2c_cmd *cmd)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	cmd->word_addr = COMMAND;
76*4882a593Smuzhiyun 	cmd->opcode = OPCODE_RANDOM;
77*4882a593Smuzhiyun 	cmd->param1 = 0;
78*4882a593Smuzhiyun 	cmd->param2 = 0;
79*4882a593Smuzhiyun 	cmd->count = RANDOM_COUNT;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	atmel_i2c_checksum(cmd);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	cmd->msecs = MAX_EXEC_TIME_RANDOM;
84*4882a593Smuzhiyun 	cmd->rxsize = RANDOM_RSP_SIZE;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_i2c_init_random_cmd);
87*4882a593Smuzhiyun 
atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd * cmd,u16 keyid)88*4882a593Smuzhiyun void atmel_i2c_init_genkey_cmd(struct atmel_i2c_cmd *cmd, u16 keyid)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun 	cmd->word_addr = COMMAND;
91*4882a593Smuzhiyun 	cmd->count = GENKEY_COUNT;
92*4882a593Smuzhiyun 	cmd->opcode = OPCODE_GENKEY;
93*4882a593Smuzhiyun 	cmd->param1 = GENKEY_MODE_PRIVATE;
94*4882a593Smuzhiyun 	/* a random private key will be generated and stored in slot keyID */
95*4882a593Smuzhiyun 	cmd->param2 = cpu_to_le16(keyid);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	atmel_i2c_checksum(cmd);
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	cmd->msecs = MAX_EXEC_TIME_GENKEY;
100*4882a593Smuzhiyun 	cmd->rxsize = GENKEY_RSP_SIZE;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_i2c_init_genkey_cmd);
103*4882a593Smuzhiyun 
atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd * cmd,struct scatterlist * pubkey)104*4882a593Smuzhiyun int atmel_i2c_init_ecdh_cmd(struct atmel_i2c_cmd *cmd,
105*4882a593Smuzhiyun 			    struct scatterlist *pubkey)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	size_t copied;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	cmd->word_addr = COMMAND;
110*4882a593Smuzhiyun 	cmd->count = ECDH_COUNT;
111*4882a593Smuzhiyun 	cmd->opcode = OPCODE_ECDH;
112*4882a593Smuzhiyun 	cmd->param1 = ECDH_PREFIX_MODE;
113*4882a593Smuzhiyun 	/* private key slot */
114*4882a593Smuzhiyun 	cmd->param2 = cpu_to_le16(DATA_SLOT_2);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	/*
117*4882a593Smuzhiyun 	 * The device only supports NIST P256 ECC keys. The public key size will
118*4882a593Smuzhiyun 	 * always be the same. Use a macro for the key size to avoid unnecessary
119*4882a593Smuzhiyun 	 * computations.
120*4882a593Smuzhiyun 	 */
121*4882a593Smuzhiyun 	copied = sg_copy_to_buffer(pubkey,
122*4882a593Smuzhiyun 				   sg_nents_for_len(pubkey,
123*4882a593Smuzhiyun 						    ATMEL_ECC_PUBKEY_SIZE),
124*4882a593Smuzhiyun 				   cmd->data, ATMEL_ECC_PUBKEY_SIZE);
125*4882a593Smuzhiyun 	if (copied != ATMEL_ECC_PUBKEY_SIZE)
126*4882a593Smuzhiyun 		return -EINVAL;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	atmel_i2c_checksum(cmd);
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	cmd->msecs = MAX_EXEC_TIME_ECDH;
131*4882a593Smuzhiyun 	cmd->rxsize = ECDH_RSP_SIZE;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	return 0;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_i2c_init_ecdh_cmd);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun /*
138*4882a593Smuzhiyun  * After wake and after execution of a command, there will be error, status, or
139*4882a593Smuzhiyun  * result bytes in the device's output register that can be retrieved by the
140*4882a593Smuzhiyun  * system. When the length of that group is four bytes, the codes returned are
141*4882a593Smuzhiyun  * detailed in error_list.
142*4882a593Smuzhiyun  */
atmel_i2c_status(struct device * dev,u8 * status)143*4882a593Smuzhiyun static int atmel_i2c_status(struct device *dev, u8 *status)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun 	size_t err_list_len = ARRAY_SIZE(error_list);
146*4882a593Smuzhiyun 	int i;
147*4882a593Smuzhiyun 	u8 err_id = status[1];
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	if (*status != STATUS_SIZE)
150*4882a593Smuzhiyun 		return 0;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if (err_id == STATUS_WAKE_SUCCESSFUL || err_id == STATUS_NOERR)
153*4882a593Smuzhiyun 		return 0;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	for (i = 0; i < err_list_len; i++)
156*4882a593Smuzhiyun 		if (error_list[i].value == err_id)
157*4882a593Smuzhiyun 			break;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	/* if err_id is not in the error_list then ignore it */
160*4882a593Smuzhiyun 	if (i != err_list_len) {
161*4882a593Smuzhiyun 		dev_err(dev, "%02x: %s:\n", err_id, error_list[i].error_text);
162*4882a593Smuzhiyun 		return err_id;
163*4882a593Smuzhiyun 	}
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
atmel_i2c_wakeup(struct i2c_client * client)168*4882a593Smuzhiyun static int atmel_i2c_wakeup(struct i2c_client *client)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
171*4882a593Smuzhiyun 	u8 status[STATUS_RSP_SIZE];
172*4882a593Smuzhiyun 	int ret;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	/*
175*4882a593Smuzhiyun 	 * The device ignores any levels or transitions on the SCL pin when the
176*4882a593Smuzhiyun 	 * device is idle, asleep or during waking up. Don't check for error
177*4882a593Smuzhiyun 	 * when waking up the device.
178*4882a593Smuzhiyun 	 */
179*4882a593Smuzhiyun 	i2c_transfer_buffer_flags(client, i2c_priv->wake_token,
180*4882a593Smuzhiyun 				i2c_priv->wake_token_sz, I2C_M_IGNORE_NAK);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	/*
183*4882a593Smuzhiyun 	 * Wait to wake the device. Typical execution times for ecdh and genkey
184*4882a593Smuzhiyun 	 * are around tens of milliseconds. Delta is chosen to 50 microseconds.
185*4882a593Smuzhiyun 	 */
186*4882a593Smuzhiyun 	usleep_range(TWHI_MIN, TWHI_MAX);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	ret = i2c_master_recv(client, status, STATUS_SIZE);
189*4882a593Smuzhiyun 	if (ret < 0)
190*4882a593Smuzhiyun 		return ret;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	return atmel_i2c_status(&client->dev, status);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
atmel_i2c_sleep(struct i2c_client * client)195*4882a593Smuzhiyun static int atmel_i2c_sleep(struct i2c_client *client)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	u8 sleep = SLEEP_TOKEN;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	return i2c_master_send(client, &sleep, 1);
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun /*
203*4882a593Smuzhiyun  * atmel_i2c_send_receive() - send a command to the device and receive its
204*4882a593Smuzhiyun  *                            response.
205*4882a593Smuzhiyun  * @client: i2c client device
206*4882a593Smuzhiyun  * @cmd   : structure used to communicate with the device
207*4882a593Smuzhiyun  *
208*4882a593Smuzhiyun  * After the device receives a Wake token, a watchdog counter starts within the
209*4882a593Smuzhiyun  * device. After the watchdog timer expires, the device enters sleep mode
210*4882a593Smuzhiyun  * regardless of whether some I/O transmission or command execution is in
211*4882a593Smuzhiyun  * progress. If a command is attempted when insufficient time remains prior to
212*4882a593Smuzhiyun  * watchdog timer execution, the device will return the watchdog timeout error
213*4882a593Smuzhiyun  * code without attempting to execute the command. There is no way to reset the
214*4882a593Smuzhiyun  * counter other than to put the device into sleep or idle mode and then
215*4882a593Smuzhiyun  * wake it up again.
216*4882a593Smuzhiyun  */
atmel_i2c_send_receive(struct i2c_client * client,struct atmel_i2c_cmd * cmd)217*4882a593Smuzhiyun int atmel_i2c_send_receive(struct i2c_client *client, struct atmel_i2c_cmd *cmd)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun 	struct atmel_i2c_client_priv *i2c_priv = i2c_get_clientdata(client);
220*4882a593Smuzhiyun 	int ret;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	mutex_lock(&i2c_priv->lock);
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	ret = atmel_i2c_wakeup(client);
225*4882a593Smuzhiyun 	if (ret)
226*4882a593Smuzhiyun 		goto err;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	/* send the command */
229*4882a593Smuzhiyun 	ret = i2c_master_send(client, (u8 *)cmd, cmd->count + WORD_ADDR_SIZE);
230*4882a593Smuzhiyun 	if (ret < 0)
231*4882a593Smuzhiyun 		goto err;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun 	/* delay the appropriate amount of time for command to execute */
234*4882a593Smuzhiyun 	msleep(cmd->msecs);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	/* receive the response */
237*4882a593Smuzhiyun 	ret = i2c_master_recv(client, cmd->data, cmd->rxsize);
238*4882a593Smuzhiyun 	if (ret < 0)
239*4882a593Smuzhiyun 		goto err;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	/* put the device into low-power mode */
242*4882a593Smuzhiyun 	ret = atmel_i2c_sleep(client);
243*4882a593Smuzhiyun 	if (ret < 0)
244*4882a593Smuzhiyun 		goto err;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	mutex_unlock(&i2c_priv->lock);
247*4882a593Smuzhiyun 	return atmel_i2c_status(&client->dev, cmd->data);
248*4882a593Smuzhiyun err:
249*4882a593Smuzhiyun 	mutex_unlock(&i2c_priv->lock);
250*4882a593Smuzhiyun 	return ret;
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_i2c_send_receive);
253*4882a593Smuzhiyun 
atmel_i2c_work_handler(struct work_struct * work)254*4882a593Smuzhiyun static void atmel_i2c_work_handler(struct work_struct *work)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun 	struct atmel_i2c_work_data *work_data =
257*4882a593Smuzhiyun 			container_of(work, struct atmel_i2c_work_data, work);
258*4882a593Smuzhiyun 	struct atmel_i2c_cmd *cmd = &work_data->cmd;
259*4882a593Smuzhiyun 	struct i2c_client *client = work_data->client;
260*4882a593Smuzhiyun 	int status;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	status = atmel_i2c_send_receive(client, cmd);
263*4882a593Smuzhiyun 	work_data->cbk(work_data, work_data->areq, status);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun 
atmel_i2c_enqueue(struct atmel_i2c_work_data * work_data,void (* cbk)(struct atmel_i2c_work_data * work_data,void * areq,int status),void * areq)266*4882a593Smuzhiyun void atmel_i2c_enqueue(struct atmel_i2c_work_data *work_data,
267*4882a593Smuzhiyun 		       void (*cbk)(struct atmel_i2c_work_data *work_data,
268*4882a593Smuzhiyun 				   void *areq, int status),
269*4882a593Smuzhiyun 		       void *areq)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	work_data->cbk = (void *)cbk;
272*4882a593Smuzhiyun 	work_data->areq = areq;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	INIT_WORK(&work_data->work, atmel_i2c_work_handler);
275*4882a593Smuzhiyun 	schedule_work(&work_data->work);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_i2c_enqueue);
278*4882a593Smuzhiyun 
atmel_i2c_wake_token_sz(u32 bus_clk_rate)279*4882a593Smuzhiyun static inline size_t atmel_i2c_wake_token_sz(u32 bus_clk_rate)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun 	u32 no_of_bits = DIV_ROUND_UP(TWLO_USEC * bus_clk_rate, USEC_PER_SEC);
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	/* return the size of the wake_token in bytes */
284*4882a593Smuzhiyun 	return DIV_ROUND_UP(no_of_bits, 8);
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun 
device_sanity_check(struct i2c_client * client)287*4882a593Smuzhiyun static int device_sanity_check(struct i2c_client *client)
288*4882a593Smuzhiyun {
289*4882a593Smuzhiyun 	struct atmel_i2c_cmd *cmd;
290*4882a593Smuzhiyun 	int ret;
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
293*4882a593Smuzhiyun 	if (!cmd)
294*4882a593Smuzhiyun 		return -ENOMEM;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	atmel_i2c_init_read_cmd(cmd);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	ret = atmel_i2c_send_receive(client, cmd);
299*4882a593Smuzhiyun 	if (ret)
300*4882a593Smuzhiyun 		goto free_cmd;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	/*
303*4882a593Smuzhiyun 	 * It is vital that the Configuration, Data and OTP zones be locked
304*4882a593Smuzhiyun 	 * prior to release into the field of the system containing the device.
305*4882a593Smuzhiyun 	 * Failure to lock these zones may permit modification of any secret
306*4882a593Smuzhiyun 	 * keys and may lead to other security problems.
307*4882a593Smuzhiyun 	 */
308*4882a593Smuzhiyun 	if (cmd->data[LOCK_CONFIG_IDX] || cmd->data[LOCK_VALUE_IDX]) {
309*4882a593Smuzhiyun 		dev_err(&client->dev, "Configuration or Data and OTP zones are unlocked!\n");
310*4882a593Smuzhiyun 		ret = -ENOTSUPP;
311*4882a593Smuzhiyun 	}
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	/* fall through */
314*4882a593Smuzhiyun free_cmd:
315*4882a593Smuzhiyun 	kfree(cmd);
316*4882a593Smuzhiyun 	return ret;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun 
atmel_i2c_probe(struct i2c_client * client,const struct i2c_device_id * id)319*4882a593Smuzhiyun int atmel_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	struct atmel_i2c_client_priv *i2c_priv;
322*4882a593Smuzhiyun 	struct device *dev = &client->dev;
323*4882a593Smuzhiyun 	int ret;
324*4882a593Smuzhiyun 	u32 bus_clk_rate;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
327*4882a593Smuzhiyun 		dev_err(dev, "I2C_FUNC_I2C not supported\n");
328*4882a593Smuzhiyun 		return -ENODEV;
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	bus_clk_rate = i2c_acpi_find_bus_speed(&client->adapter->dev);
332*4882a593Smuzhiyun 	if (!bus_clk_rate) {
333*4882a593Smuzhiyun 		ret = device_property_read_u32(&client->adapter->dev,
334*4882a593Smuzhiyun 					       "clock-frequency", &bus_clk_rate);
335*4882a593Smuzhiyun 		if (ret) {
336*4882a593Smuzhiyun 			dev_err(dev, "failed to read clock-frequency property\n");
337*4882a593Smuzhiyun 			return ret;
338*4882a593Smuzhiyun 		}
339*4882a593Smuzhiyun 	}
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	if (bus_clk_rate > 1000000L) {
342*4882a593Smuzhiyun 		dev_err(dev, "%d exceeds maximum supported clock frequency (1MHz)\n",
343*4882a593Smuzhiyun 			bus_clk_rate);
344*4882a593Smuzhiyun 		return -EINVAL;
345*4882a593Smuzhiyun 	}
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	i2c_priv = devm_kmalloc(dev, sizeof(*i2c_priv), GFP_KERNEL);
348*4882a593Smuzhiyun 	if (!i2c_priv)
349*4882a593Smuzhiyun 		return -ENOMEM;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	i2c_priv->client = client;
352*4882a593Smuzhiyun 	mutex_init(&i2c_priv->lock);
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	/*
355*4882a593Smuzhiyun 	 * WAKE_TOKEN_MAX_SIZE was calculated for the maximum bus_clk_rate -
356*4882a593Smuzhiyun 	 * 1MHz. The previous bus_clk_rate check ensures us that wake_token_sz
357*4882a593Smuzhiyun 	 * will always be smaller than or equal to WAKE_TOKEN_MAX_SIZE.
358*4882a593Smuzhiyun 	 */
359*4882a593Smuzhiyun 	i2c_priv->wake_token_sz = atmel_i2c_wake_token_sz(bus_clk_rate);
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	memset(i2c_priv->wake_token, 0, sizeof(i2c_priv->wake_token));
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	atomic_set(&i2c_priv->tfm_count, 0);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	i2c_set_clientdata(client, i2c_priv);
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	ret = device_sanity_check(client);
368*4882a593Smuzhiyun 	if (ret)
369*4882a593Smuzhiyun 		return ret;
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	return 0;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_i2c_probe);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun MODULE_AUTHOR("Tudor Ambarus <tudor.ambarus@microchip.com>");
376*4882a593Smuzhiyun MODULE_DESCRIPTION("Microchip / Atmel ECC (I2C) driver");
377*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
378