xref: /OK3568_Linux_fs/kernel/drivers/crypto/allwinner/sun4i-ss/sun4i-ss.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * sun4i-ss.h - hardware cryptographic accelerator for Allwinner A20 SoC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2013-2015 Corentin LABBE <clabbe.montjoie@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Support AES cipher with 128,192,256 bits keysize.
8*4882a593Smuzhiyun  * Support MD5 and SHA1 hash algorithms.
9*4882a593Smuzhiyun  * Support DES and 3DES
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * You could find the datasheet in Documentation/arm/sunxi.rst
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/clk.h>
15*4882a593Smuzhiyun #include <linux/crypto.h>
16*4882a593Smuzhiyun #include <linux/io.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/reset.h>
21*4882a593Smuzhiyun #include <crypto/scatterwalk.h>
22*4882a593Smuzhiyun #include <linux/scatterlist.h>
23*4882a593Smuzhiyun #include <linux/interrupt.h>
24*4882a593Smuzhiyun #include <linux/delay.h>
25*4882a593Smuzhiyun #include <linux/pm_runtime.h>
26*4882a593Smuzhiyun #include <crypto/md5.h>
27*4882a593Smuzhiyun #include <crypto/skcipher.h>
28*4882a593Smuzhiyun #include <crypto/sha.h>
29*4882a593Smuzhiyun #include <crypto/hash.h>
30*4882a593Smuzhiyun #include <crypto/internal/hash.h>
31*4882a593Smuzhiyun #include <crypto/internal/skcipher.h>
32*4882a593Smuzhiyun #include <crypto/aes.h>
33*4882a593Smuzhiyun #include <crypto/internal/des.h>
34*4882a593Smuzhiyun #include <crypto/internal/rng.h>
35*4882a593Smuzhiyun #include <crypto/rng.h>
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #define SS_CTL            0x00
38*4882a593Smuzhiyun #define SS_KEY0           0x04
39*4882a593Smuzhiyun #define SS_KEY1           0x08
40*4882a593Smuzhiyun #define SS_KEY2           0x0C
41*4882a593Smuzhiyun #define SS_KEY3           0x10
42*4882a593Smuzhiyun #define SS_KEY4           0x14
43*4882a593Smuzhiyun #define SS_KEY5           0x18
44*4882a593Smuzhiyun #define SS_KEY6           0x1C
45*4882a593Smuzhiyun #define SS_KEY7           0x20
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define SS_IV0            0x24
48*4882a593Smuzhiyun #define SS_IV1            0x28
49*4882a593Smuzhiyun #define SS_IV2            0x2C
50*4882a593Smuzhiyun #define SS_IV3            0x30
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define SS_FCSR           0x44
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define SS_MD0            0x4C
55*4882a593Smuzhiyun #define SS_MD1            0x50
56*4882a593Smuzhiyun #define SS_MD2            0x54
57*4882a593Smuzhiyun #define SS_MD3            0x58
58*4882a593Smuzhiyun #define SS_MD4            0x5C
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun #define SS_RXFIFO         0x200
61*4882a593Smuzhiyun #define SS_TXFIFO         0x204
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun /* SS_CTL configuration values */
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun /* PRNG generator mode - bit 15 */
66*4882a593Smuzhiyun #define SS_PRNG_ONESHOT		(0 << 15)
67*4882a593Smuzhiyun #define SS_PRNG_CONTINUE	(1 << 15)
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun /* IV mode for hash */
70*4882a593Smuzhiyun #define SS_IV_ARBITRARY		(1 << 14)
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* SS operation mode - bits 12-13 */
73*4882a593Smuzhiyun #define SS_ECB			(0 << 12)
74*4882a593Smuzhiyun #define SS_CBC			(1 << 12)
75*4882a593Smuzhiyun #define SS_CTS			(3 << 12)
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* Counter width for CNT mode - bits 10-11 */
78*4882a593Smuzhiyun #define SS_CNT_16BITS		(0 << 10)
79*4882a593Smuzhiyun #define SS_CNT_32BITS		(1 << 10)
80*4882a593Smuzhiyun #define SS_CNT_64BITS		(2 << 10)
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun /* Key size for AES - bits 8-9 */
83*4882a593Smuzhiyun #define SS_AES_128BITS		(0 << 8)
84*4882a593Smuzhiyun #define SS_AES_192BITS		(1 << 8)
85*4882a593Smuzhiyun #define SS_AES_256BITS		(2 << 8)
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* Operation direction - bit 7 */
88*4882a593Smuzhiyun #define SS_ENCRYPTION		(0 << 7)
89*4882a593Smuzhiyun #define SS_DECRYPTION		(1 << 7)
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun /* SS Method - bits 4-6 */
92*4882a593Smuzhiyun #define SS_OP_AES		(0 << 4)
93*4882a593Smuzhiyun #define SS_OP_DES		(1 << 4)
94*4882a593Smuzhiyun #define SS_OP_3DES		(2 << 4)
95*4882a593Smuzhiyun #define SS_OP_SHA1		(3 << 4)
96*4882a593Smuzhiyun #define SS_OP_MD5		(4 << 4)
97*4882a593Smuzhiyun #define SS_OP_PRNG		(5 << 4)
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /* Data end bit - bit 2 */
100*4882a593Smuzhiyun #define SS_DATA_END		(1 << 2)
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun /* PRNG start bit - bit 1 */
103*4882a593Smuzhiyun #define SS_PRNG_START		(1 << 1)
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun /* SS Enable bit - bit 0 */
106*4882a593Smuzhiyun #define SS_DISABLED		(0 << 0)
107*4882a593Smuzhiyun #define SS_ENABLED		(1 << 0)
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun /* SS_FCSR configuration values */
110*4882a593Smuzhiyun /* RX FIFO status - bit 30 */
111*4882a593Smuzhiyun #define SS_RXFIFO_FREE		(1 << 30)
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun /* RX FIFO empty spaces - bits 24-29 */
114*4882a593Smuzhiyun #define SS_RXFIFO_SPACES(val)	(((val) >> 24) & 0x3f)
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /* TX FIFO status - bit 22 */
117*4882a593Smuzhiyun #define SS_TXFIFO_AVAILABLE	(1 << 22)
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun /* TX FIFO available spaces - bits 16-21 */
120*4882a593Smuzhiyun #define SS_TXFIFO_SPACES(val)	(((val) >> 16) & 0x3f)
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun #define SS_RX_MAX	32
123*4882a593Smuzhiyun #define SS_RX_DEFAULT	SS_RX_MAX
124*4882a593Smuzhiyun #define SS_TX_MAX	33
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun #define SS_RXFIFO_EMP_INT_PENDING	(1 << 10)
127*4882a593Smuzhiyun #define SS_TXFIFO_AVA_INT_PENDING	(1 << 8)
128*4882a593Smuzhiyun #define SS_RXFIFO_EMP_INT_ENABLE	(1 << 2)
129*4882a593Smuzhiyun #define SS_TXFIFO_AVA_INT_ENABLE	(1 << 0)
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun #define SS_SEED_LEN 192
132*4882a593Smuzhiyun #define SS_DATA_LEN 160
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun /*
135*4882a593Smuzhiyun  * struct ss_variant - Describe SS hardware variant
136*4882a593Smuzhiyun  * @sha1_in_be:		The SHA1 digest is given by SS in BE, and so need to be inverted.
137*4882a593Smuzhiyun  */
138*4882a593Smuzhiyun struct ss_variant {
139*4882a593Smuzhiyun 	bool sha1_in_be;
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun struct sun4i_ss_ctx {
143*4882a593Smuzhiyun 	const struct ss_variant *variant;
144*4882a593Smuzhiyun 	void __iomem *base;
145*4882a593Smuzhiyun 	int irq;
146*4882a593Smuzhiyun 	struct clk *busclk;
147*4882a593Smuzhiyun 	struct clk *ssclk;
148*4882a593Smuzhiyun 	struct reset_control *reset;
149*4882a593Smuzhiyun 	struct device *dev;
150*4882a593Smuzhiyun 	struct resource *res;
151*4882a593Smuzhiyun 	char buf[4 * SS_RX_MAX];/* buffer for linearize SG src */
152*4882a593Smuzhiyun 	char bufo[4 * SS_TX_MAX]; /* buffer for linearize SG dst */
153*4882a593Smuzhiyun 	spinlock_t slock; /* control the use of the device */
154*4882a593Smuzhiyun #ifdef CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG
155*4882a593Smuzhiyun 	u32 seed[SS_SEED_LEN / BITS_PER_LONG];
156*4882a593Smuzhiyun #endif
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun struct sun4i_ss_alg_template {
160*4882a593Smuzhiyun 	u32 type;
161*4882a593Smuzhiyun 	u32 mode;
162*4882a593Smuzhiyun 	union {
163*4882a593Smuzhiyun 		struct skcipher_alg crypto;
164*4882a593Smuzhiyun 		struct ahash_alg hash;
165*4882a593Smuzhiyun 		struct rng_alg rng;
166*4882a593Smuzhiyun 	} alg;
167*4882a593Smuzhiyun 	struct sun4i_ss_ctx *ss;
168*4882a593Smuzhiyun };
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun struct sun4i_tfm_ctx {
171*4882a593Smuzhiyun 	u32 key[AES_MAX_KEY_SIZE / 4];/* divided by sizeof(u32) */
172*4882a593Smuzhiyun 	u32 keylen;
173*4882a593Smuzhiyun 	u32 keymode;
174*4882a593Smuzhiyun 	struct sun4i_ss_ctx *ss;
175*4882a593Smuzhiyun 	struct crypto_skcipher *fallback_tfm;
176*4882a593Smuzhiyun };
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun struct sun4i_cipher_req_ctx {
179*4882a593Smuzhiyun 	u32 mode;
180*4882a593Smuzhiyun 	struct skcipher_request fallback_req;   // keep at the end
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun struct sun4i_req_ctx {
184*4882a593Smuzhiyun 	u32 mode;
185*4882a593Smuzhiyun 	u64 byte_count; /* number of bytes "uploaded" to the device */
186*4882a593Smuzhiyun 	u32 hash[5]; /* for storing SS_IVx register */
187*4882a593Smuzhiyun 	char buf[64];
188*4882a593Smuzhiyun 	unsigned int len;
189*4882a593Smuzhiyun 	int flags;
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun int sun4i_hash_crainit(struct crypto_tfm *tfm);
193*4882a593Smuzhiyun void sun4i_hash_craexit(struct crypto_tfm *tfm);
194*4882a593Smuzhiyun int sun4i_hash_init(struct ahash_request *areq);
195*4882a593Smuzhiyun int sun4i_hash_update(struct ahash_request *areq);
196*4882a593Smuzhiyun int sun4i_hash_final(struct ahash_request *areq);
197*4882a593Smuzhiyun int sun4i_hash_finup(struct ahash_request *areq);
198*4882a593Smuzhiyun int sun4i_hash_digest(struct ahash_request *areq);
199*4882a593Smuzhiyun int sun4i_hash_export_md5(struct ahash_request *areq, void *out);
200*4882a593Smuzhiyun int sun4i_hash_import_md5(struct ahash_request *areq, const void *in);
201*4882a593Smuzhiyun int sun4i_hash_export_sha1(struct ahash_request *areq, void *out);
202*4882a593Smuzhiyun int sun4i_hash_import_sha1(struct ahash_request *areq, const void *in);
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun int sun4i_ss_cbc_aes_encrypt(struct skcipher_request *areq);
205*4882a593Smuzhiyun int sun4i_ss_cbc_aes_decrypt(struct skcipher_request *areq);
206*4882a593Smuzhiyun int sun4i_ss_ecb_aes_encrypt(struct skcipher_request *areq);
207*4882a593Smuzhiyun int sun4i_ss_ecb_aes_decrypt(struct skcipher_request *areq);
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun int sun4i_ss_cbc_des_encrypt(struct skcipher_request *areq);
210*4882a593Smuzhiyun int sun4i_ss_cbc_des_decrypt(struct skcipher_request *areq);
211*4882a593Smuzhiyun int sun4i_ss_ecb_des_encrypt(struct skcipher_request *areq);
212*4882a593Smuzhiyun int sun4i_ss_ecb_des_decrypt(struct skcipher_request *areq);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun int sun4i_ss_cbc_des3_encrypt(struct skcipher_request *areq);
215*4882a593Smuzhiyun int sun4i_ss_cbc_des3_decrypt(struct skcipher_request *areq);
216*4882a593Smuzhiyun int sun4i_ss_ecb_des3_encrypt(struct skcipher_request *areq);
217*4882a593Smuzhiyun int sun4i_ss_ecb_des3_decrypt(struct skcipher_request *areq);
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun int sun4i_ss_cipher_init(struct crypto_tfm *tfm);
220*4882a593Smuzhiyun void sun4i_ss_cipher_exit(struct crypto_tfm *tfm);
221*4882a593Smuzhiyun int sun4i_ss_aes_setkey(struct crypto_skcipher *tfm, const u8 *key,
222*4882a593Smuzhiyun 			unsigned int keylen);
223*4882a593Smuzhiyun int sun4i_ss_des_setkey(struct crypto_skcipher *tfm, const u8 *key,
224*4882a593Smuzhiyun 			unsigned int keylen);
225*4882a593Smuzhiyun int sun4i_ss_des3_setkey(struct crypto_skcipher *tfm, const u8 *key,
226*4882a593Smuzhiyun 			 unsigned int keylen);
227*4882a593Smuzhiyun int sun4i_ss_prng_generate(struct crypto_rng *tfm, const u8 *src,
228*4882a593Smuzhiyun 			   unsigned int slen, u8 *dst, unsigned int dlen);
229*4882a593Smuzhiyun int sun4i_ss_prng_seed(struct crypto_rng *tfm, const u8 *seed, unsigned int slen);
230