xref: /OK3568_Linux_fs/kernel/drivers/cpuidle/cpuidle-powernv.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  cpuidle-powernv - idle state cpuidle driver.
4*4882a593Smuzhiyun  *  Adapted from drivers/cpuidle/cpuidle-pseries
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/moduleparam.h>
12*4882a593Smuzhiyun #include <linux/cpuidle.h>
13*4882a593Smuzhiyun #include <linux/cpu.h>
14*4882a593Smuzhiyun #include <linux/notifier.h>
15*4882a593Smuzhiyun #include <linux/clockchips.h>
16*4882a593Smuzhiyun #include <linux/of.h>
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <asm/machdep.h>
20*4882a593Smuzhiyun #include <asm/firmware.h>
21*4882a593Smuzhiyun #include <asm/opal.h>
22*4882a593Smuzhiyun #include <asm/runlatch.h>
23*4882a593Smuzhiyun #include <asm/cpuidle.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun  * Expose only those Hardware idle states via the cpuidle framework
27*4882a593Smuzhiyun  * that have latency value below POWERNV_THRESHOLD_LATENCY_NS.
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun #define POWERNV_THRESHOLD_LATENCY_NS 200000
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static struct cpuidle_driver powernv_idle_driver = {
32*4882a593Smuzhiyun 	.name             = "powernv_idle",
33*4882a593Smuzhiyun 	.owner            = THIS_MODULE,
34*4882a593Smuzhiyun };
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun static int max_idle_state __read_mostly;
37*4882a593Smuzhiyun static struct cpuidle_state *cpuidle_state_table __read_mostly;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct stop_psscr_table {
40*4882a593Smuzhiyun 	u64 val;
41*4882a593Smuzhiyun 	u64 mask;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun static struct stop_psscr_table stop_psscr_table[CPUIDLE_STATE_MAX] __read_mostly;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static u64 default_snooze_timeout __read_mostly;
47*4882a593Smuzhiyun static bool snooze_timeout_en __read_mostly;
48*4882a593Smuzhiyun 
get_snooze_timeout(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)49*4882a593Smuzhiyun static u64 get_snooze_timeout(struct cpuidle_device *dev,
50*4882a593Smuzhiyun 			      struct cpuidle_driver *drv,
51*4882a593Smuzhiyun 			      int index)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	int i;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	if (unlikely(!snooze_timeout_en))
56*4882a593Smuzhiyun 		return default_snooze_timeout;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	for (i = index + 1; i < drv->state_count; i++) {
59*4882a593Smuzhiyun 		if (dev->states_usage[i].disable)
60*4882a593Smuzhiyun 			continue;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 		return drv->states[i].target_residency * tb_ticks_per_usec;
63*4882a593Smuzhiyun 	}
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	return default_snooze_timeout;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
snooze_loop(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)68*4882a593Smuzhiyun static int snooze_loop(struct cpuidle_device *dev,
69*4882a593Smuzhiyun 			struct cpuidle_driver *drv,
70*4882a593Smuzhiyun 			int index)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	u64 snooze_exit_time;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	set_thread_flag(TIF_POLLING_NRFLAG);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	local_irq_enable();
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	snooze_exit_time = get_tb() + get_snooze_timeout(dev, drv, index);
79*4882a593Smuzhiyun 	ppc64_runlatch_off();
80*4882a593Smuzhiyun 	HMT_very_low();
81*4882a593Smuzhiyun 	while (!need_resched()) {
82*4882a593Smuzhiyun 		if (likely(snooze_timeout_en) && get_tb() > snooze_exit_time) {
83*4882a593Smuzhiyun 			/*
84*4882a593Smuzhiyun 			 * Task has not woken up but we are exiting the polling
85*4882a593Smuzhiyun 			 * loop anyway. Require a barrier after polling is
86*4882a593Smuzhiyun 			 * cleared to order subsequent test of need_resched().
87*4882a593Smuzhiyun 			 */
88*4882a593Smuzhiyun 			clear_thread_flag(TIF_POLLING_NRFLAG);
89*4882a593Smuzhiyun 			smp_mb();
90*4882a593Smuzhiyun 			break;
91*4882a593Smuzhiyun 		}
92*4882a593Smuzhiyun 	}
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	HMT_medium();
95*4882a593Smuzhiyun 	ppc64_runlatch_on();
96*4882a593Smuzhiyun 	clear_thread_flag(TIF_POLLING_NRFLAG);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	local_irq_disable();
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	return index;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun 
nap_loop(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)103*4882a593Smuzhiyun static int nap_loop(struct cpuidle_device *dev,
104*4882a593Smuzhiyun 			struct cpuidle_driver *drv,
105*4882a593Smuzhiyun 			int index)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	power7_idle_type(PNV_THREAD_NAP);
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return index;
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun /* Register for fastsleep only in oneshot mode of broadcast */
113*4882a593Smuzhiyun #ifdef CONFIG_TICK_ONESHOT
fastsleep_loop(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)114*4882a593Smuzhiyun static int fastsleep_loop(struct cpuidle_device *dev,
115*4882a593Smuzhiyun 				struct cpuidle_driver *drv,
116*4882a593Smuzhiyun 				int index)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	unsigned long old_lpcr = mfspr(SPRN_LPCR);
119*4882a593Smuzhiyun 	unsigned long new_lpcr;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	if (unlikely(system_state < SYSTEM_RUNNING))
122*4882a593Smuzhiyun 		return index;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	new_lpcr = old_lpcr;
125*4882a593Smuzhiyun 	/* Do not exit powersave upon decrementer as we've setup the timer
126*4882a593Smuzhiyun 	 * offload.
127*4882a593Smuzhiyun 	 */
128*4882a593Smuzhiyun 	new_lpcr &= ~LPCR_PECE1;
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	mtspr(SPRN_LPCR, new_lpcr);
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	power7_idle_type(PNV_THREAD_SLEEP);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	mtspr(SPRN_LPCR, old_lpcr);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return index;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun #endif
139*4882a593Smuzhiyun 
stop_loop(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)140*4882a593Smuzhiyun static int stop_loop(struct cpuidle_device *dev,
141*4882a593Smuzhiyun 		     struct cpuidle_driver *drv,
142*4882a593Smuzhiyun 		     int index)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	arch300_idle_type(stop_psscr_table[index].val,
145*4882a593Smuzhiyun 			 stop_psscr_table[index].mask);
146*4882a593Smuzhiyun 	return index;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun /*
150*4882a593Smuzhiyun  * States for dedicated partition case.
151*4882a593Smuzhiyun  */
152*4882a593Smuzhiyun static struct cpuidle_state powernv_states[CPUIDLE_STATE_MAX] = {
153*4882a593Smuzhiyun 	{ /* Snooze */
154*4882a593Smuzhiyun 		.name = "snooze",
155*4882a593Smuzhiyun 		.desc = "snooze",
156*4882a593Smuzhiyun 		.exit_latency = 0,
157*4882a593Smuzhiyun 		.target_residency = 0,
158*4882a593Smuzhiyun 		.enter = snooze_loop },
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun 
powernv_cpuidle_cpu_online(unsigned int cpu)161*4882a593Smuzhiyun static int powernv_cpuidle_cpu_online(unsigned int cpu)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	if (dev && cpuidle_get_driver()) {
166*4882a593Smuzhiyun 		cpuidle_pause_and_lock();
167*4882a593Smuzhiyun 		cpuidle_enable_device(dev);
168*4882a593Smuzhiyun 		cpuidle_resume_and_unlock();
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 	return 0;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun 
powernv_cpuidle_cpu_dead(unsigned int cpu)173*4882a593Smuzhiyun static int powernv_cpuidle_cpu_dead(unsigned int cpu)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 	if (dev && cpuidle_get_driver()) {
178*4882a593Smuzhiyun 		cpuidle_pause_and_lock();
179*4882a593Smuzhiyun 		cpuidle_disable_device(dev);
180*4882a593Smuzhiyun 		cpuidle_resume_and_unlock();
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 	return 0;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun /*
186*4882a593Smuzhiyun  * powernv_cpuidle_driver_init()
187*4882a593Smuzhiyun  */
powernv_cpuidle_driver_init(void)188*4882a593Smuzhiyun static int powernv_cpuidle_driver_init(void)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	int idle_state;
191*4882a593Smuzhiyun 	struct cpuidle_driver *drv = &powernv_idle_driver;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	drv->state_count = 0;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	for (idle_state = 0; idle_state < max_idle_state; ++idle_state) {
196*4882a593Smuzhiyun 		/* Is the state not enabled? */
197*4882a593Smuzhiyun 		if (cpuidle_state_table[idle_state].enter == NULL)
198*4882a593Smuzhiyun 			continue;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 		drv->states[drv->state_count] =	/* structure copy */
201*4882a593Smuzhiyun 			cpuidle_state_table[idle_state];
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 		drv->state_count += 1;
204*4882a593Smuzhiyun 	}
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	/*
207*4882a593Smuzhiyun 	 * On the PowerNV platform cpu_present may be less than cpu_possible in
208*4882a593Smuzhiyun 	 * cases when firmware detects the CPU, but it is not available to the
209*4882a593Smuzhiyun 	 * OS.  If CONFIG_HOTPLUG_CPU=n, then such CPUs are not hotplugable at
210*4882a593Smuzhiyun 	 * run time and hence cpu_devices are not created for those CPUs by the
211*4882a593Smuzhiyun 	 * generic topology_init().
212*4882a593Smuzhiyun 	 *
213*4882a593Smuzhiyun 	 * drv->cpumask defaults to cpu_possible_mask in
214*4882a593Smuzhiyun 	 * __cpuidle_driver_init().  This breaks cpuidle on PowerNV where
215*4882a593Smuzhiyun 	 * cpu_devices are not created for CPUs in cpu_possible_mask that
216*4882a593Smuzhiyun 	 * cannot be hot-added later at run time.
217*4882a593Smuzhiyun 	 *
218*4882a593Smuzhiyun 	 * Trying cpuidle_register_device() on a CPU without a cpu_device is
219*4882a593Smuzhiyun 	 * incorrect, so pass a correct CPU mask to the generic cpuidle driver.
220*4882a593Smuzhiyun 	 */
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	drv->cpumask = (struct cpumask *)cpu_present_mask;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	return 0;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
add_powernv_state(int index,const char * name,unsigned int flags,int (* idle_fn)(struct cpuidle_device *,struct cpuidle_driver *,int),unsigned int target_residency,unsigned int exit_latency,u64 psscr_val,u64 psscr_mask)227*4882a593Smuzhiyun static inline void add_powernv_state(int index, const char *name,
228*4882a593Smuzhiyun 				     unsigned int flags,
229*4882a593Smuzhiyun 				     int (*idle_fn)(struct cpuidle_device *,
230*4882a593Smuzhiyun 						    struct cpuidle_driver *,
231*4882a593Smuzhiyun 						    int),
232*4882a593Smuzhiyun 				     unsigned int target_residency,
233*4882a593Smuzhiyun 				     unsigned int exit_latency,
234*4882a593Smuzhiyun 				     u64 psscr_val, u64 psscr_mask)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	strlcpy(powernv_states[index].name, name, CPUIDLE_NAME_LEN);
237*4882a593Smuzhiyun 	strlcpy(powernv_states[index].desc, name, CPUIDLE_NAME_LEN);
238*4882a593Smuzhiyun 	powernv_states[index].flags = flags;
239*4882a593Smuzhiyun 	powernv_states[index].target_residency = target_residency;
240*4882a593Smuzhiyun 	powernv_states[index].exit_latency = exit_latency;
241*4882a593Smuzhiyun 	powernv_states[index].enter = idle_fn;
242*4882a593Smuzhiyun 	/* For power8 and below psscr_* will be 0 */
243*4882a593Smuzhiyun 	stop_psscr_table[index].val = psscr_val;
244*4882a593Smuzhiyun 	stop_psscr_table[index].mask = psscr_mask;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun extern u32 pnv_get_supported_cpuidle_states(void);
powernv_add_idle_states(void)248*4882a593Smuzhiyun static int powernv_add_idle_states(void)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	int nr_idle_states = 1; /* Snooze */
251*4882a593Smuzhiyun 	int dt_idle_states;
252*4882a593Smuzhiyun 	u32 has_stop_states = 0;
253*4882a593Smuzhiyun 	int i;
254*4882a593Smuzhiyun 	u32 supported_flags = pnv_get_supported_cpuidle_states();
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	/* Currently we have snooze statically defined */
258*4882a593Smuzhiyun 	if (nr_pnv_idle_states <= 0) {
259*4882a593Smuzhiyun 		pr_warn("cpuidle-powernv : Only Snooze is available\n");
260*4882a593Smuzhiyun 		goto out;
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	/* TODO: Count only states which are eligible for cpuidle */
264*4882a593Smuzhiyun 	dt_idle_states = nr_pnv_idle_states;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	/*
267*4882a593Smuzhiyun 	 * Since snooze is used as first idle state, max idle states allowed is
268*4882a593Smuzhiyun 	 * CPUIDLE_STATE_MAX -1
269*4882a593Smuzhiyun 	 */
270*4882a593Smuzhiyun 	if (nr_pnv_idle_states > CPUIDLE_STATE_MAX - 1) {
271*4882a593Smuzhiyun 		pr_warn("cpuidle-powernv: discovered idle states more than allowed");
272*4882a593Smuzhiyun 		dt_idle_states = CPUIDLE_STATE_MAX - 1;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	/*
276*4882a593Smuzhiyun 	 * If the idle states use stop instruction, probe for psscr values
277*4882a593Smuzhiyun 	 * and psscr mask which are necessary to specify required stop level.
278*4882a593Smuzhiyun 	 */
279*4882a593Smuzhiyun 	has_stop_states = (pnv_idle_states[0].flags &
280*4882a593Smuzhiyun 			   (OPAL_PM_STOP_INST_FAST | OPAL_PM_STOP_INST_DEEP));
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	for (i = 0; i < dt_idle_states; i++) {
283*4882a593Smuzhiyun 		unsigned int exit_latency, target_residency;
284*4882a593Smuzhiyun 		bool stops_timebase = false;
285*4882a593Smuzhiyun 		struct pnv_idle_states_t *state = &pnv_idle_states[i];
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 		/*
288*4882a593Smuzhiyun 		 * Skip the platform idle state whose flag isn't in
289*4882a593Smuzhiyun 		 * the supported_cpuidle_states flag mask.
290*4882a593Smuzhiyun 		 */
291*4882a593Smuzhiyun 		if ((state->flags & supported_flags) != state->flags)
292*4882a593Smuzhiyun 			continue;
293*4882a593Smuzhiyun 		/*
294*4882a593Smuzhiyun 		 * If an idle state has exit latency beyond
295*4882a593Smuzhiyun 		 * POWERNV_THRESHOLD_LATENCY_NS then don't use it
296*4882a593Smuzhiyun 		 * in cpu-idle.
297*4882a593Smuzhiyun 		 */
298*4882a593Smuzhiyun 		if (state->latency_ns > POWERNV_THRESHOLD_LATENCY_NS)
299*4882a593Smuzhiyun 			continue;
300*4882a593Smuzhiyun 		/*
301*4882a593Smuzhiyun 		 * Firmware passes residency and latency values in ns.
302*4882a593Smuzhiyun 		 * cpuidle expects it in us.
303*4882a593Smuzhiyun 		 */
304*4882a593Smuzhiyun 		exit_latency = DIV_ROUND_UP(state->latency_ns, 1000);
305*4882a593Smuzhiyun 		target_residency = DIV_ROUND_UP(state->residency_ns, 1000);
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun 		if (has_stop_states && !(state->valid))
308*4882a593Smuzhiyun 				continue;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 		if (state->flags & OPAL_PM_TIMEBASE_STOP)
311*4882a593Smuzhiyun 			stops_timebase = true;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 		if (state->flags & OPAL_PM_NAP_ENABLED) {
314*4882a593Smuzhiyun 			/* Add NAP state */
315*4882a593Smuzhiyun 			add_powernv_state(nr_idle_states, "Nap",
316*4882a593Smuzhiyun 					  CPUIDLE_FLAG_NONE, nap_loop,
317*4882a593Smuzhiyun 					  target_residency, exit_latency, 0, 0);
318*4882a593Smuzhiyun 		} else if (has_stop_states && !stops_timebase) {
319*4882a593Smuzhiyun 			add_powernv_state(nr_idle_states, state->name,
320*4882a593Smuzhiyun 					  CPUIDLE_FLAG_NONE, stop_loop,
321*4882a593Smuzhiyun 					  target_residency, exit_latency,
322*4882a593Smuzhiyun 					  state->psscr_val,
323*4882a593Smuzhiyun 					  state->psscr_mask);
324*4882a593Smuzhiyun 		}
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 		/*
327*4882a593Smuzhiyun 		 * All cpuidle states with CPUIDLE_FLAG_TIMER_STOP set must come
328*4882a593Smuzhiyun 		 * within this config dependency check.
329*4882a593Smuzhiyun 		 */
330*4882a593Smuzhiyun #ifdef CONFIG_TICK_ONESHOT
331*4882a593Smuzhiyun 		else if (state->flags & OPAL_PM_SLEEP_ENABLED ||
332*4882a593Smuzhiyun 			 state->flags & OPAL_PM_SLEEP_ENABLED_ER1) {
333*4882a593Smuzhiyun 			/* Add FASTSLEEP state */
334*4882a593Smuzhiyun 			add_powernv_state(nr_idle_states, "FastSleep",
335*4882a593Smuzhiyun 					  CPUIDLE_FLAG_TIMER_STOP,
336*4882a593Smuzhiyun 					  fastsleep_loop,
337*4882a593Smuzhiyun 					  target_residency, exit_latency, 0, 0);
338*4882a593Smuzhiyun 		} else if (has_stop_states && stops_timebase) {
339*4882a593Smuzhiyun 			add_powernv_state(nr_idle_states, state->name,
340*4882a593Smuzhiyun 					  CPUIDLE_FLAG_TIMER_STOP, stop_loop,
341*4882a593Smuzhiyun 					  target_residency, exit_latency,
342*4882a593Smuzhiyun 					  state->psscr_val,
343*4882a593Smuzhiyun 					  state->psscr_mask);
344*4882a593Smuzhiyun 		}
345*4882a593Smuzhiyun #endif
346*4882a593Smuzhiyun 		else
347*4882a593Smuzhiyun 			continue;
348*4882a593Smuzhiyun 		nr_idle_states++;
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun out:
351*4882a593Smuzhiyun 	return nr_idle_states;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun /*
355*4882a593Smuzhiyun  * powernv_idle_probe()
356*4882a593Smuzhiyun  * Choose state table for shared versus dedicated partition
357*4882a593Smuzhiyun  */
powernv_idle_probe(void)358*4882a593Smuzhiyun static int powernv_idle_probe(void)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun 	if (cpuidle_disable != IDLE_NO_OVERRIDE)
361*4882a593Smuzhiyun 		return -ENODEV;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	if (firmware_has_feature(FW_FEATURE_OPAL)) {
364*4882a593Smuzhiyun 		cpuidle_state_table = powernv_states;
365*4882a593Smuzhiyun 		/* Device tree can indicate more idle states */
366*4882a593Smuzhiyun 		max_idle_state = powernv_add_idle_states();
367*4882a593Smuzhiyun 		default_snooze_timeout = TICK_USEC * tb_ticks_per_usec;
368*4882a593Smuzhiyun 		if (max_idle_state > 1)
369*4882a593Smuzhiyun 			snooze_timeout_en = true;
370*4882a593Smuzhiyun  	} else
371*4882a593Smuzhiyun  		return -ENODEV;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 	return 0;
374*4882a593Smuzhiyun }
375*4882a593Smuzhiyun 
powernv_processor_idle_init(void)376*4882a593Smuzhiyun static int __init powernv_processor_idle_init(void)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	int retval;
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun 	retval = powernv_idle_probe();
381*4882a593Smuzhiyun 	if (retval)
382*4882a593Smuzhiyun 		return retval;
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	powernv_cpuidle_driver_init();
385*4882a593Smuzhiyun 	retval = cpuidle_register(&powernv_idle_driver, NULL);
386*4882a593Smuzhiyun 	if (retval) {
387*4882a593Smuzhiyun 		printk(KERN_DEBUG "Registration of powernv driver failed.\n");
388*4882a593Smuzhiyun 		return retval;
389*4882a593Smuzhiyun 	}
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	retval = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN,
392*4882a593Smuzhiyun 					   "cpuidle/powernv:online",
393*4882a593Smuzhiyun 					   powernv_cpuidle_cpu_online, NULL);
394*4882a593Smuzhiyun 	WARN_ON(retval < 0);
395*4882a593Smuzhiyun 	retval = cpuhp_setup_state_nocalls(CPUHP_CPUIDLE_DEAD,
396*4882a593Smuzhiyun 					   "cpuidle/powernv:dead", NULL,
397*4882a593Smuzhiyun 					   powernv_cpuidle_cpu_dead);
398*4882a593Smuzhiyun 	WARN_ON(retval < 0);
399*4882a593Smuzhiyun 	printk(KERN_DEBUG "powernv_idle_driver registered\n");
400*4882a593Smuzhiyun 	return 0;
401*4882a593Smuzhiyun }
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun device_initcall(powernv_processor_idle_init);
404