xref: /OK3568_Linux_fs/kernel/drivers/cpuidle/cpuidle-mvebu-v7.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Marvell Armada 370, 38x and XP SoC cpuidle driver
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2014 Marvell
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Nadav Haklai <nadavh@marvell.com>
7*4882a593Smuzhiyun  * Gregory CLEMENT <gregory.clement@free-electrons.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This file is licensed under the terms of the GNU General Public
10*4882a593Smuzhiyun  * License version 2.  This program is licensed "as is" without any
11*4882a593Smuzhiyun  * warranty of any kind, whether express or implied.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Maintainer: Gregory CLEMENT <gregory.clement@free-electrons.com>
14*4882a593Smuzhiyun  */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/cpu_pm.h>
17*4882a593Smuzhiyun #include <linux/cpuidle.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/of.h>
20*4882a593Smuzhiyun #include <linux/suspend.h>
21*4882a593Smuzhiyun #include <linux/platform_device.h>
22*4882a593Smuzhiyun #include <asm/cpuidle.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define MVEBU_V7_FLAG_DEEP_IDLE	0x10000
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun static int (*mvebu_v7_cpu_suspend)(int);
27*4882a593Smuzhiyun 
mvebu_v7_enter_idle(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)28*4882a593Smuzhiyun static int mvebu_v7_enter_idle(struct cpuidle_device *dev,
29*4882a593Smuzhiyun 				struct cpuidle_driver *drv,
30*4882a593Smuzhiyun 				int index)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun 	int ret;
33*4882a593Smuzhiyun 	bool deepidle = false;
34*4882a593Smuzhiyun 	cpu_pm_enter();
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	if (drv->states[index].flags & MVEBU_V7_FLAG_DEEP_IDLE)
37*4882a593Smuzhiyun 		deepidle = true;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	ret = mvebu_v7_cpu_suspend(deepidle);
40*4882a593Smuzhiyun 	cpu_pm_exit();
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	if (ret)
43*4882a593Smuzhiyun 		return ret;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	return index;
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun static struct cpuidle_driver armadaxp_idle_driver = {
49*4882a593Smuzhiyun 	.name			= "armada_xp_idle",
50*4882a593Smuzhiyun 	.states[0]		= ARM_CPUIDLE_WFI_STATE,
51*4882a593Smuzhiyun 	.states[1]		= {
52*4882a593Smuzhiyun 		.enter			= mvebu_v7_enter_idle,
53*4882a593Smuzhiyun 		.exit_latency		= 100,
54*4882a593Smuzhiyun 		.power_usage		= 50,
55*4882a593Smuzhiyun 		.target_residency	= 1000,
56*4882a593Smuzhiyun 		.name			= "MV CPU IDLE",
57*4882a593Smuzhiyun 		.desc			= "CPU power down",
58*4882a593Smuzhiyun 	},
59*4882a593Smuzhiyun 	.states[2]		= {
60*4882a593Smuzhiyun 		.enter			= mvebu_v7_enter_idle,
61*4882a593Smuzhiyun 		.exit_latency		= 1000,
62*4882a593Smuzhiyun 		.power_usage		= 5,
63*4882a593Smuzhiyun 		.target_residency	= 10000,
64*4882a593Smuzhiyun 		.flags			= MVEBU_V7_FLAG_DEEP_IDLE,
65*4882a593Smuzhiyun 		.name			= "MV CPU DEEP IDLE",
66*4882a593Smuzhiyun 		.desc			= "CPU and L2 Fabric power down",
67*4882a593Smuzhiyun 	},
68*4882a593Smuzhiyun 	.state_count = 3,
69*4882a593Smuzhiyun };
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun static struct cpuidle_driver armada370_idle_driver = {
72*4882a593Smuzhiyun 	.name			= "armada_370_idle",
73*4882a593Smuzhiyun 	.states[0]		= ARM_CPUIDLE_WFI_STATE,
74*4882a593Smuzhiyun 	.states[1]		= {
75*4882a593Smuzhiyun 		.enter			= mvebu_v7_enter_idle,
76*4882a593Smuzhiyun 		.exit_latency		= 100,
77*4882a593Smuzhiyun 		.power_usage		= 5,
78*4882a593Smuzhiyun 		.target_residency	= 1000,
79*4882a593Smuzhiyun 		.flags			= MVEBU_V7_FLAG_DEEP_IDLE,
80*4882a593Smuzhiyun 		.name			= "Deep Idle",
81*4882a593Smuzhiyun 		.desc			= "CPU and L2 Fabric power down",
82*4882a593Smuzhiyun 	},
83*4882a593Smuzhiyun 	.state_count = 2,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun static struct cpuidle_driver armada38x_idle_driver = {
87*4882a593Smuzhiyun 	.name			= "armada_38x_idle",
88*4882a593Smuzhiyun 	.states[0]		= ARM_CPUIDLE_WFI_STATE,
89*4882a593Smuzhiyun 	.states[1]		= {
90*4882a593Smuzhiyun 		.enter			= mvebu_v7_enter_idle,
91*4882a593Smuzhiyun 		.exit_latency		= 10,
92*4882a593Smuzhiyun 		.power_usage		= 5,
93*4882a593Smuzhiyun 		.target_residency	= 100,
94*4882a593Smuzhiyun 		.name			= "Idle",
95*4882a593Smuzhiyun 		.desc			= "CPU and SCU power down",
96*4882a593Smuzhiyun 	},
97*4882a593Smuzhiyun 	.state_count = 2,
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun 
mvebu_v7_cpuidle_probe(struct platform_device * pdev)100*4882a593Smuzhiyun static int mvebu_v7_cpuidle_probe(struct platform_device *pdev)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	const struct platform_device_id *id = pdev->id_entry;
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	if (!id)
105*4882a593Smuzhiyun 		return -EINVAL;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	mvebu_v7_cpu_suspend = pdev->dev.platform_data;
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	return cpuidle_register((struct cpuidle_driver *)id->driver_data, NULL);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun static const struct platform_device_id mvebu_cpuidle_ids[] = {
113*4882a593Smuzhiyun 	{
114*4882a593Smuzhiyun 		.name = "cpuidle-armada-xp",
115*4882a593Smuzhiyun 		.driver_data = (unsigned long)&armadaxp_idle_driver,
116*4882a593Smuzhiyun 	}, {
117*4882a593Smuzhiyun 		.name = "cpuidle-armada-370",
118*4882a593Smuzhiyun 		.driver_data = (unsigned long)&armada370_idle_driver,
119*4882a593Smuzhiyun 	}, {
120*4882a593Smuzhiyun 		.name = "cpuidle-armada-38x",
121*4882a593Smuzhiyun 		.driver_data = (unsigned long)&armada38x_idle_driver,
122*4882a593Smuzhiyun 	},
123*4882a593Smuzhiyun 	{}
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun static struct platform_driver mvebu_cpuidle_driver = {
127*4882a593Smuzhiyun 	.probe = mvebu_v7_cpuidle_probe,
128*4882a593Smuzhiyun 	.driver = {
129*4882a593Smuzhiyun 		.name = "cpuidle-mbevu",
130*4882a593Smuzhiyun 		.suppress_bind_attrs = true,
131*4882a593Smuzhiyun 	},
132*4882a593Smuzhiyun 	.id_table = mvebu_cpuidle_ids,
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun builtin_platform_driver(mvebu_cpuidle_driver);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun MODULE_AUTHOR("Gregory CLEMENT <gregory.clement@free-electrons.com>");
138*4882a593Smuzhiyun MODULE_DESCRIPTION("Marvell EBU v7 cpuidle driver");
139*4882a593Smuzhiyun MODULE_LICENSE("GPL");
140