1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * CPU idle Marvell Kirkwood SoCs
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
5*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
6*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * The cpu idle uses wait-for-interrupt and DDR self refresh in order
9*4882a593Smuzhiyun * to implement two idle states -
10*4882a593Smuzhiyun * #1 wait-for-interrupt
11*4882a593Smuzhiyun * #2 wait-for-interrupt and DDR self refresh
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * Maintainer: Jason Cooper <jason@lakedaemon.net>
14*4882a593Smuzhiyun * Maintainer: Andrew Lunn <andrew@lunn.ch>
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <linux/kernel.h>
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/init.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/cpuidle.h>
22*4882a593Smuzhiyun #include <linux/io.h>
23*4882a593Smuzhiyun #include <linux/export.h>
24*4882a593Smuzhiyun #include <asm/cpuidle.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #define KIRKWOOD_MAX_STATES 2
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun static void __iomem *ddr_operation_base;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* Actual code that puts the SoC in different idle states */
kirkwood_enter_idle(struct cpuidle_device * dev,struct cpuidle_driver * drv,int index)31*4882a593Smuzhiyun static int kirkwood_enter_idle(struct cpuidle_device *dev,
32*4882a593Smuzhiyun struct cpuidle_driver *drv,
33*4882a593Smuzhiyun int index)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun writel(0x7, ddr_operation_base);
36*4882a593Smuzhiyun cpu_do_idle();
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return index;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static struct cpuidle_driver kirkwood_idle_driver = {
42*4882a593Smuzhiyun .name = "kirkwood_idle",
43*4882a593Smuzhiyun .owner = THIS_MODULE,
44*4882a593Smuzhiyun .states[0] = ARM_CPUIDLE_WFI_STATE,
45*4882a593Smuzhiyun .states[1] = {
46*4882a593Smuzhiyun .enter = kirkwood_enter_idle,
47*4882a593Smuzhiyun .exit_latency = 10,
48*4882a593Smuzhiyun .target_residency = 100000,
49*4882a593Smuzhiyun .name = "DDR SR",
50*4882a593Smuzhiyun .desc = "WFI and DDR Self Refresh",
51*4882a593Smuzhiyun },
52*4882a593Smuzhiyun .state_count = KIRKWOOD_MAX_STATES,
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* Initialize CPU idle by registering the idle states */
kirkwood_cpuidle_probe(struct platform_device * pdev)56*4882a593Smuzhiyun static int kirkwood_cpuidle_probe(struct platform_device *pdev)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun ddr_operation_base = devm_platform_ioremap_resource(pdev, 0);
59*4882a593Smuzhiyun if (IS_ERR(ddr_operation_base))
60*4882a593Smuzhiyun return PTR_ERR(ddr_operation_base);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return cpuidle_register(&kirkwood_idle_driver, NULL);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
kirkwood_cpuidle_remove(struct platform_device * pdev)65*4882a593Smuzhiyun static int kirkwood_cpuidle_remove(struct platform_device *pdev)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun cpuidle_unregister(&kirkwood_idle_driver);
68*4882a593Smuzhiyun return 0;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun static struct platform_driver kirkwood_cpuidle_driver = {
72*4882a593Smuzhiyun .probe = kirkwood_cpuidle_probe,
73*4882a593Smuzhiyun .remove = kirkwood_cpuidle_remove,
74*4882a593Smuzhiyun .driver = {
75*4882a593Smuzhiyun .name = "kirkwood_cpuidle",
76*4882a593Smuzhiyun },
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun module_platform_driver(kirkwood_cpuidle_driver);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>");
82*4882a593Smuzhiyun MODULE_DESCRIPTION("Kirkwood cpu idle driver");
83*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
84*4882a593Smuzhiyun MODULE_ALIAS("platform:kirkwood-cpuidle");
85