1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Versatile Express SPC CPUFreq Interface driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 - 2019 ARM Ltd.
6*4882a593Smuzhiyun * Sudeep Holla <sudeep.holla@arm.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (C) 2013 Linaro.
9*4882a593Smuzhiyun * Viresh Kumar <viresh.kumar@linaro.org>
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/clk.h>
15*4882a593Smuzhiyun #include <linux/cpu.h>
16*4882a593Smuzhiyun #include <linux/cpufreq.h>
17*4882a593Smuzhiyun #include <linux/cpumask.h>
18*4882a593Smuzhiyun #include <linux/cpu_cooling.h>
19*4882a593Smuzhiyun #include <linux/device.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/mutex.h>
22*4882a593Smuzhiyun #include <linux/of_platform.h>
23*4882a593Smuzhiyun #include <linux/platform_device.h>
24*4882a593Smuzhiyun #include <linux/pm_opp.h>
25*4882a593Smuzhiyun #include <linux/slab.h>
26*4882a593Smuzhiyun #include <linux/topology.h>
27*4882a593Smuzhiyun #include <linux/types.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* Currently we support only two clusters */
30*4882a593Smuzhiyun #define A15_CLUSTER 0
31*4882a593Smuzhiyun #define A7_CLUSTER 1
32*4882a593Smuzhiyun #define MAX_CLUSTERS 2
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #ifdef CONFIG_BL_SWITCHER
35*4882a593Smuzhiyun #include <asm/bL_switcher.h>
36*4882a593Smuzhiyun static bool bL_switching_enabled;
37*4882a593Smuzhiyun #define is_bL_switching_enabled() bL_switching_enabled
38*4882a593Smuzhiyun #define set_switching_enabled(x) (bL_switching_enabled = (x))
39*4882a593Smuzhiyun #else
40*4882a593Smuzhiyun #define is_bL_switching_enabled() false
41*4882a593Smuzhiyun #define set_switching_enabled(x) do { } while (0)
42*4882a593Smuzhiyun #define bL_switch_request(...) do { } while (0)
43*4882a593Smuzhiyun #define bL_switcher_put_enabled() do { } while (0)
44*4882a593Smuzhiyun #define bL_switcher_get_enabled() do { } while (0)
45*4882a593Smuzhiyun #endif
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #define ACTUAL_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq << 1 : freq)
48*4882a593Smuzhiyun #define VIRT_FREQ(cluster, freq) ((cluster == A7_CLUSTER) ? freq >> 1 : freq)
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun static struct thermal_cooling_device *cdev[MAX_CLUSTERS];
51*4882a593Smuzhiyun static struct clk *clk[MAX_CLUSTERS];
52*4882a593Smuzhiyun static struct cpufreq_frequency_table *freq_table[MAX_CLUSTERS + 1];
53*4882a593Smuzhiyun static atomic_t cluster_usage[MAX_CLUSTERS + 1];
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun static unsigned int clk_big_min; /* (Big) clock frequencies */
56*4882a593Smuzhiyun static unsigned int clk_little_max; /* Maximum clock frequency (Little) */
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static DEFINE_PER_CPU(unsigned int, physical_cluster);
59*4882a593Smuzhiyun static DEFINE_PER_CPU(unsigned int, cpu_last_req_freq);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static struct mutex cluster_lock[MAX_CLUSTERS];
62*4882a593Smuzhiyun
raw_cpu_to_cluster(int cpu)63*4882a593Smuzhiyun static inline int raw_cpu_to_cluster(int cpu)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun return topology_physical_package_id(cpu);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
cpu_to_cluster(int cpu)68*4882a593Smuzhiyun static inline int cpu_to_cluster(int cpu)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun return is_bL_switching_enabled() ?
71*4882a593Smuzhiyun MAX_CLUSTERS : raw_cpu_to_cluster(cpu);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
find_cluster_maxfreq(int cluster)74*4882a593Smuzhiyun static unsigned int find_cluster_maxfreq(int cluster)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun int j;
77*4882a593Smuzhiyun u32 max_freq = 0, cpu_freq;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun for_each_online_cpu(j) {
80*4882a593Smuzhiyun cpu_freq = per_cpu(cpu_last_req_freq, j);
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun if (cluster == per_cpu(physical_cluster, j) &&
83*4882a593Smuzhiyun max_freq < cpu_freq)
84*4882a593Smuzhiyun max_freq = cpu_freq;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun return max_freq;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
clk_get_cpu_rate(unsigned int cpu)90*4882a593Smuzhiyun static unsigned int clk_get_cpu_rate(unsigned int cpu)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun u32 cur_cluster = per_cpu(physical_cluster, cpu);
93*4882a593Smuzhiyun u32 rate = clk_get_rate(clk[cur_cluster]) / 1000;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /* For switcher we use virtual A7 clock rates */
96*4882a593Smuzhiyun if (is_bL_switching_enabled())
97*4882a593Smuzhiyun rate = VIRT_FREQ(cur_cluster, rate);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun return rate;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
ve_spc_cpufreq_get_rate(unsigned int cpu)102*4882a593Smuzhiyun static unsigned int ve_spc_cpufreq_get_rate(unsigned int cpu)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun if (is_bL_switching_enabled())
105*4882a593Smuzhiyun return per_cpu(cpu_last_req_freq, cpu);
106*4882a593Smuzhiyun else
107*4882a593Smuzhiyun return clk_get_cpu_rate(cpu);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun static unsigned int
ve_spc_cpufreq_set_rate(u32 cpu,u32 old_cluster,u32 new_cluster,u32 rate)111*4882a593Smuzhiyun ve_spc_cpufreq_set_rate(u32 cpu, u32 old_cluster, u32 new_cluster, u32 rate)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun u32 new_rate, prev_rate;
114*4882a593Smuzhiyun int ret;
115*4882a593Smuzhiyun bool bLs = is_bL_switching_enabled();
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun mutex_lock(&cluster_lock[new_cluster]);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (bLs) {
120*4882a593Smuzhiyun prev_rate = per_cpu(cpu_last_req_freq, cpu);
121*4882a593Smuzhiyun per_cpu(cpu_last_req_freq, cpu) = rate;
122*4882a593Smuzhiyun per_cpu(physical_cluster, cpu) = new_cluster;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun new_rate = find_cluster_maxfreq(new_cluster);
125*4882a593Smuzhiyun new_rate = ACTUAL_FREQ(new_cluster, new_rate);
126*4882a593Smuzhiyun } else {
127*4882a593Smuzhiyun new_rate = rate;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun ret = clk_set_rate(clk[new_cluster], new_rate * 1000);
131*4882a593Smuzhiyun if (!ret) {
132*4882a593Smuzhiyun /*
133*4882a593Smuzhiyun * FIXME: clk_set_rate hasn't returned an error here however it
134*4882a593Smuzhiyun * may be that clk_change_rate failed due to hardware or
135*4882a593Smuzhiyun * firmware issues and wasn't able to report that due to the
136*4882a593Smuzhiyun * current design of the clk core layer. To work around this
137*4882a593Smuzhiyun * problem we will read back the clock rate and check it is
138*4882a593Smuzhiyun * correct. This needs to be removed once clk core is fixed.
139*4882a593Smuzhiyun */
140*4882a593Smuzhiyun if (clk_get_rate(clk[new_cluster]) != new_rate * 1000)
141*4882a593Smuzhiyun ret = -EIO;
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun if (WARN_ON(ret)) {
145*4882a593Smuzhiyun if (bLs) {
146*4882a593Smuzhiyun per_cpu(cpu_last_req_freq, cpu) = prev_rate;
147*4882a593Smuzhiyun per_cpu(physical_cluster, cpu) = old_cluster;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun mutex_unlock(&cluster_lock[new_cluster]);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun return ret;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun mutex_unlock(&cluster_lock[new_cluster]);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* Recalc freq for old cluster when switching clusters */
158*4882a593Smuzhiyun if (old_cluster != new_cluster) {
159*4882a593Smuzhiyun /* Switch cluster */
160*4882a593Smuzhiyun bL_switch_request(cpu, new_cluster);
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun mutex_lock(&cluster_lock[old_cluster]);
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* Set freq of old cluster if there are cpus left on it */
165*4882a593Smuzhiyun new_rate = find_cluster_maxfreq(old_cluster);
166*4882a593Smuzhiyun new_rate = ACTUAL_FREQ(old_cluster, new_rate);
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (new_rate &&
169*4882a593Smuzhiyun clk_set_rate(clk[old_cluster], new_rate * 1000)) {
170*4882a593Smuzhiyun pr_err("%s: clk_set_rate failed: %d, old cluster: %d\n",
171*4882a593Smuzhiyun __func__, ret, old_cluster);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun mutex_unlock(&cluster_lock[old_cluster]);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return 0;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* Set clock frequency */
ve_spc_cpufreq_set_target(struct cpufreq_policy * policy,unsigned int index)180*4882a593Smuzhiyun static int ve_spc_cpufreq_set_target(struct cpufreq_policy *policy,
181*4882a593Smuzhiyun unsigned int index)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun u32 cpu = policy->cpu, cur_cluster, new_cluster, actual_cluster;
184*4882a593Smuzhiyun unsigned int freqs_new;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun cur_cluster = cpu_to_cluster(cpu);
187*4882a593Smuzhiyun new_cluster = actual_cluster = per_cpu(physical_cluster, cpu);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun freqs_new = freq_table[cur_cluster][index].frequency;
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if (is_bL_switching_enabled()) {
192*4882a593Smuzhiyun if (actual_cluster == A15_CLUSTER && freqs_new < clk_big_min)
193*4882a593Smuzhiyun new_cluster = A7_CLUSTER;
194*4882a593Smuzhiyun else if (actual_cluster == A7_CLUSTER &&
195*4882a593Smuzhiyun freqs_new > clk_little_max)
196*4882a593Smuzhiyun new_cluster = A15_CLUSTER;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun return ve_spc_cpufreq_set_rate(cpu, actual_cluster, new_cluster,
200*4882a593Smuzhiyun freqs_new);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
get_table_count(struct cpufreq_frequency_table * table)203*4882a593Smuzhiyun static inline u32 get_table_count(struct cpufreq_frequency_table *table)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun int count;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun for (count = 0; table[count].frequency != CPUFREQ_TABLE_END; count++)
208*4882a593Smuzhiyun ;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun return count;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /* get the minimum frequency in the cpufreq_frequency_table */
get_table_min(struct cpufreq_frequency_table * table)214*4882a593Smuzhiyun static inline u32 get_table_min(struct cpufreq_frequency_table *table)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun struct cpufreq_frequency_table *pos;
217*4882a593Smuzhiyun u32 min_freq = ~0;
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun cpufreq_for_each_entry(pos, table)
220*4882a593Smuzhiyun if (pos->frequency < min_freq)
221*4882a593Smuzhiyun min_freq = pos->frequency;
222*4882a593Smuzhiyun return min_freq;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* get the maximum frequency in the cpufreq_frequency_table */
get_table_max(struct cpufreq_frequency_table * table)226*4882a593Smuzhiyun static inline u32 get_table_max(struct cpufreq_frequency_table *table)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun struct cpufreq_frequency_table *pos;
229*4882a593Smuzhiyun u32 max_freq = 0;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun cpufreq_for_each_entry(pos, table)
232*4882a593Smuzhiyun if (pos->frequency > max_freq)
233*4882a593Smuzhiyun max_freq = pos->frequency;
234*4882a593Smuzhiyun return max_freq;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
search_frequency(struct cpufreq_frequency_table * table,int size,unsigned int freq)237*4882a593Smuzhiyun static bool search_frequency(struct cpufreq_frequency_table *table, int size,
238*4882a593Smuzhiyun unsigned int freq)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun int count;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun for (count = 0; count < size; count++) {
243*4882a593Smuzhiyun if (table[count].frequency == freq)
244*4882a593Smuzhiyun return true;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun return false;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
merge_cluster_tables(void)250*4882a593Smuzhiyun static int merge_cluster_tables(void)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun int i, j, k = 0, count = 1;
253*4882a593Smuzhiyun struct cpufreq_frequency_table *table;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun for (i = 0; i < MAX_CLUSTERS; i++)
256*4882a593Smuzhiyun count += get_table_count(freq_table[i]);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun table = kcalloc(count, sizeof(*table), GFP_KERNEL);
259*4882a593Smuzhiyun if (!table)
260*4882a593Smuzhiyun return -ENOMEM;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun freq_table[MAX_CLUSTERS] = table;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* Add in reverse order to get freqs in increasing order */
265*4882a593Smuzhiyun for (i = MAX_CLUSTERS - 1; i >= 0; i--, count = k) {
266*4882a593Smuzhiyun for (j = 0; freq_table[i][j].frequency != CPUFREQ_TABLE_END;
267*4882a593Smuzhiyun j++) {
268*4882a593Smuzhiyun if (i == A15_CLUSTER &&
269*4882a593Smuzhiyun search_frequency(table, count, freq_table[i][j].frequency))
270*4882a593Smuzhiyun continue; /* skip duplicates */
271*4882a593Smuzhiyun table[k++].frequency =
272*4882a593Smuzhiyun VIRT_FREQ(i, freq_table[i][j].frequency);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun table[k].driver_data = k;
277*4882a593Smuzhiyun table[k].frequency = CPUFREQ_TABLE_END;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun return 0;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
_put_cluster_clk_and_freq_table(struct device * cpu_dev,const struct cpumask * cpumask)282*4882a593Smuzhiyun static void _put_cluster_clk_and_freq_table(struct device *cpu_dev,
283*4882a593Smuzhiyun const struct cpumask *cpumask)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun u32 cluster = raw_cpu_to_cluster(cpu_dev->id);
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun if (!freq_table[cluster])
288*4882a593Smuzhiyun return;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun clk_put(clk[cluster]);
291*4882a593Smuzhiyun dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]);
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
put_cluster_clk_and_freq_table(struct device * cpu_dev,const struct cpumask * cpumask)294*4882a593Smuzhiyun static void put_cluster_clk_and_freq_table(struct device *cpu_dev,
295*4882a593Smuzhiyun const struct cpumask *cpumask)
296*4882a593Smuzhiyun {
297*4882a593Smuzhiyun u32 cluster = cpu_to_cluster(cpu_dev->id);
298*4882a593Smuzhiyun int i;
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (atomic_dec_return(&cluster_usage[cluster]))
301*4882a593Smuzhiyun return;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun if (cluster < MAX_CLUSTERS)
304*4882a593Smuzhiyun return _put_cluster_clk_and_freq_table(cpu_dev, cpumask);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun for_each_present_cpu(i) {
307*4882a593Smuzhiyun struct device *cdev = get_cpu_device(i);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun if (!cdev)
310*4882a593Smuzhiyun return;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun _put_cluster_clk_and_freq_table(cdev, cpumask);
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun /* free virtual table */
316*4882a593Smuzhiyun kfree(freq_table[cluster]);
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
_get_cluster_clk_and_freq_table(struct device * cpu_dev,const struct cpumask * cpumask)319*4882a593Smuzhiyun static int _get_cluster_clk_and_freq_table(struct device *cpu_dev,
320*4882a593Smuzhiyun const struct cpumask *cpumask)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun u32 cluster = raw_cpu_to_cluster(cpu_dev->id);
323*4882a593Smuzhiyun int ret;
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun if (freq_table[cluster])
326*4882a593Smuzhiyun return 0;
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun /*
329*4882a593Smuzhiyun * platform specific SPC code must initialise the opp table
330*4882a593Smuzhiyun * so just check if the OPP count is non-zero
331*4882a593Smuzhiyun */
332*4882a593Smuzhiyun ret = dev_pm_opp_get_opp_count(cpu_dev) <= 0;
333*4882a593Smuzhiyun if (ret)
334*4882a593Smuzhiyun goto out;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table[cluster]);
337*4882a593Smuzhiyun if (ret)
338*4882a593Smuzhiyun goto out;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun clk[cluster] = clk_get(cpu_dev, NULL);
341*4882a593Smuzhiyun if (!IS_ERR(clk[cluster]))
342*4882a593Smuzhiyun return 0;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun dev_err(cpu_dev, "%s: Failed to get clk for cpu: %d, cluster: %d\n",
345*4882a593Smuzhiyun __func__, cpu_dev->id, cluster);
346*4882a593Smuzhiyun ret = PTR_ERR(clk[cluster]);
347*4882a593Smuzhiyun dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table[cluster]);
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun out:
350*4882a593Smuzhiyun dev_err(cpu_dev, "%s: Failed to get data for cluster: %d\n", __func__,
351*4882a593Smuzhiyun cluster);
352*4882a593Smuzhiyun return ret;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
get_cluster_clk_and_freq_table(struct device * cpu_dev,const struct cpumask * cpumask)355*4882a593Smuzhiyun static int get_cluster_clk_and_freq_table(struct device *cpu_dev,
356*4882a593Smuzhiyun const struct cpumask *cpumask)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun u32 cluster = cpu_to_cluster(cpu_dev->id);
359*4882a593Smuzhiyun int i, ret;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun if (atomic_inc_return(&cluster_usage[cluster]) != 1)
362*4882a593Smuzhiyun return 0;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun if (cluster < MAX_CLUSTERS) {
365*4882a593Smuzhiyun ret = _get_cluster_clk_and_freq_table(cpu_dev, cpumask);
366*4882a593Smuzhiyun if (ret)
367*4882a593Smuzhiyun atomic_dec(&cluster_usage[cluster]);
368*4882a593Smuzhiyun return ret;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun /*
372*4882a593Smuzhiyun * Get data for all clusters and fill virtual cluster with a merge of
373*4882a593Smuzhiyun * both
374*4882a593Smuzhiyun */
375*4882a593Smuzhiyun for_each_present_cpu(i) {
376*4882a593Smuzhiyun struct device *cdev = get_cpu_device(i);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun if (!cdev)
379*4882a593Smuzhiyun return -ENODEV;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun ret = _get_cluster_clk_and_freq_table(cdev, cpumask);
382*4882a593Smuzhiyun if (ret)
383*4882a593Smuzhiyun goto put_clusters;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun ret = merge_cluster_tables();
387*4882a593Smuzhiyun if (ret)
388*4882a593Smuzhiyun goto put_clusters;
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun /* Assuming 2 cluster, set clk_big_min and clk_little_max */
391*4882a593Smuzhiyun clk_big_min = get_table_min(freq_table[A15_CLUSTER]);
392*4882a593Smuzhiyun clk_little_max = VIRT_FREQ(A7_CLUSTER,
393*4882a593Smuzhiyun get_table_max(freq_table[A7_CLUSTER]));
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun return 0;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun put_clusters:
398*4882a593Smuzhiyun for_each_present_cpu(i) {
399*4882a593Smuzhiyun struct device *cdev = get_cpu_device(i);
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun if (!cdev)
402*4882a593Smuzhiyun return -ENODEV;
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun _put_cluster_clk_and_freq_table(cdev, cpumask);
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun atomic_dec(&cluster_usage[cluster]);
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun return ret;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /* Per-CPU initialization */
ve_spc_cpufreq_init(struct cpufreq_policy * policy)413*4882a593Smuzhiyun static int ve_spc_cpufreq_init(struct cpufreq_policy *policy)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun u32 cur_cluster = cpu_to_cluster(policy->cpu);
416*4882a593Smuzhiyun struct device *cpu_dev;
417*4882a593Smuzhiyun int ret;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun cpu_dev = get_cpu_device(policy->cpu);
420*4882a593Smuzhiyun if (!cpu_dev) {
421*4882a593Smuzhiyun pr_err("%s: failed to get cpu%d device\n", __func__,
422*4882a593Smuzhiyun policy->cpu);
423*4882a593Smuzhiyun return -ENODEV;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun if (cur_cluster < MAX_CLUSTERS) {
427*4882a593Smuzhiyun int cpu;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun dev_pm_opp_get_sharing_cpus(cpu_dev, policy->cpus);
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun for_each_cpu(cpu, policy->cpus)
432*4882a593Smuzhiyun per_cpu(physical_cluster, cpu) = cur_cluster;
433*4882a593Smuzhiyun } else {
434*4882a593Smuzhiyun /* Assumption: during init, we are always running on A15 */
435*4882a593Smuzhiyun per_cpu(physical_cluster, policy->cpu) = A15_CLUSTER;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun ret = get_cluster_clk_and_freq_table(cpu_dev, policy->cpus);
439*4882a593Smuzhiyun if (ret)
440*4882a593Smuzhiyun return ret;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun policy->freq_table = freq_table[cur_cluster];
443*4882a593Smuzhiyun policy->cpuinfo.transition_latency = 1000000; /* 1 ms */
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun dev_pm_opp_of_register_em(cpu_dev, policy->cpus);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun if (is_bL_switching_enabled())
448*4882a593Smuzhiyun per_cpu(cpu_last_req_freq, policy->cpu) =
449*4882a593Smuzhiyun clk_get_cpu_rate(policy->cpu);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun dev_info(cpu_dev, "%s: CPU %d initialized\n", __func__, policy->cpu);
452*4882a593Smuzhiyun return 0;
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun
ve_spc_cpufreq_exit(struct cpufreq_policy * policy)455*4882a593Smuzhiyun static int ve_spc_cpufreq_exit(struct cpufreq_policy *policy)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun struct device *cpu_dev;
458*4882a593Smuzhiyun int cur_cluster = cpu_to_cluster(policy->cpu);
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun if (cur_cluster < MAX_CLUSTERS) {
461*4882a593Smuzhiyun cpufreq_cooling_unregister(cdev[cur_cluster]);
462*4882a593Smuzhiyun cdev[cur_cluster] = NULL;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun cpu_dev = get_cpu_device(policy->cpu);
466*4882a593Smuzhiyun if (!cpu_dev) {
467*4882a593Smuzhiyun pr_err("%s: failed to get cpu%d device\n", __func__,
468*4882a593Smuzhiyun policy->cpu);
469*4882a593Smuzhiyun return -ENODEV;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun put_cluster_clk_and_freq_table(cpu_dev, policy->related_cpus);
473*4882a593Smuzhiyun return 0;
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun
ve_spc_cpufreq_ready(struct cpufreq_policy * policy)476*4882a593Smuzhiyun static void ve_spc_cpufreq_ready(struct cpufreq_policy *policy)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun int cur_cluster = cpu_to_cluster(policy->cpu);
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun /* Do not register a cpu_cooling device if we are in IKS mode */
481*4882a593Smuzhiyun if (cur_cluster >= MAX_CLUSTERS)
482*4882a593Smuzhiyun return;
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun cdev[cur_cluster] = of_cpufreq_cooling_register(policy);
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun static struct cpufreq_driver ve_spc_cpufreq_driver = {
488*4882a593Smuzhiyun .name = "vexpress-spc",
489*4882a593Smuzhiyun .flags = CPUFREQ_STICKY |
490*4882a593Smuzhiyun CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
491*4882a593Smuzhiyun CPUFREQ_NEED_INITIAL_FREQ_CHECK,
492*4882a593Smuzhiyun .verify = cpufreq_generic_frequency_table_verify,
493*4882a593Smuzhiyun .target_index = ve_spc_cpufreq_set_target,
494*4882a593Smuzhiyun .get = ve_spc_cpufreq_get_rate,
495*4882a593Smuzhiyun .init = ve_spc_cpufreq_init,
496*4882a593Smuzhiyun .exit = ve_spc_cpufreq_exit,
497*4882a593Smuzhiyun .ready = ve_spc_cpufreq_ready,
498*4882a593Smuzhiyun .attr = cpufreq_generic_attr,
499*4882a593Smuzhiyun };
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun #ifdef CONFIG_BL_SWITCHER
bL_cpufreq_switcher_notifier(struct notifier_block * nfb,unsigned long action,void * _arg)502*4882a593Smuzhiyun static int bL_cpufreq_switcher_notifier(struct notifier_block *nfb,
503*4882a593Smuzhiyun unsigned long action, void *_arg)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun pr_debug("%s: action: %ld\n", __func__, action);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun switch (action) {
508*4882a593Smuzhiyun case BL_NOTIFY_PRE_ENABLE:
509*4882a593Smuzhiyun case BL_NOTIFY_PRE_DISABLE:
510*4882a593Smuzhiyun cpufreq_unregister_driver(&ve_spc_cpufreq_driver);
511*4882a593Smuzhiyun break;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun case BL_NOTIFY_POST_ENABLE:
514*4882a593Smuzhiyun set_switching_enabled(true);
515*4882a593Smuzhiyun cpufreq_register_driver(&ve_spc_cpufreq_driver);
516*4882a593Smuzhiyun break;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun case BL_NOTIFY_POST_DISABLE:
519*4882a593Smuzhiyun set_switching_enabled(false);
520*4882a593Smuzhiyun cpufreq_register_driver(&ve_spc_cpufreq_driver);
521*4882a593Smuzhiyun break;
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun default:
524*4882a593Smuzhiyun return NOTIFY_DONE;
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun return NOTIFY_OK;
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun static struct notifier_block bL_switcher_notifier = {
531*4882a593Smuzhiyun .notifier_call = bL_cpufreq_switcher_notifier,
532*4882a593Smuzhiyun };
533*4882a593Smuzhiyun
__bLs_register_notifier(void)534*4882a593Smuzhiyun static int __bLs_register_notifier(void)
535*4882a593Smuzhiyun {
536*4882a593Smuzhiyun return bL_switcher_register_notifier(&bL_switcher_notifier);
537*4882a593Smuzhiyun }
538*4882a593Smuzhiyun
__bLs_unregister_notifier(void)539*4882a593Smuzhiyun static int __bLs_unregister_notifier(void)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun return bL_switcher_unregister_notifier(&bL_switcher_notifier);
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun #else
__bLs_register_notifier(void)544*4882a593Smuzhiyun static int __bLs_register_notifier(void) { return 0; }
__bLs_unregister_notifier(void)545*4882a593Smuzhiyun static int __bLs_unregister_notifier(void) { return 0; }
546*4882a593Smuzhiyun #endif
547*4882a593Smuzhiyun
ve_spc_cpufreq_probe(struct platform_device * pdev)548*4882a593Smuzhiyun static int ve_spc_cpufreq_probe(struct platform_device *pdev)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun int ret, i;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun set_switching_enabled(bL_switcher_get_enabled());
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun for (i = 0; i < MAX_CLUSTERS; i++)
555*4882a593Smuzhiyun mutex_init(&cluster_lock[i]);
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun ret = cpufreq_register_driver(&ve_spc_cpufreq_driver);
558*4882a593Smuzhiyun if (ret) {
559*4882a593Smuzhiyun pr_info("%s: Failed registering platform driver: %s, err: %d\n",
560*4882a593Smuzhiyun __func__, ve_spc_cpufreq_driver.name, ret);
561*4882a593Smuzhiyun } else {
562*4882a593Smuzhiyun ret = __bLs_register_notifier();
563*4882a593Smuzhiyun if (ret)
564*4882a593Smuzhiyun cpufreq_unregister_driver(&ve_spc_cpufreq_driver);
565*4882a593Smuzhiyun else
566*4882a593Smuzhiyun pr_info("%s: Registered platform driver: %s\n",
567*4882a593Smuzhiyun __func__, ve_spc_cpufreq_driver.name);
568*4882a593Smuzhiyun }
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun bL_switcher_put_enabled();
571*4882a593Smuzhiyun return ret;
572*4882a593Smuzhiyun }
573*4882a593Smuzhiyun
ve_spc_cpufreq_remove(struct platform_device * pdev)574*4882a593Smuzhiyun static int ve_spc_cpufreq_remove(struct platform_device *pdev)
575*4882a593Smuzhiyun {
576*4882a593Smuzhiyun bL_switcher_get_enabled();
577*4882a593Smuzhiyun __bLs_unregister_notifier();
578*4882a593Smuzhiyun cpufreq_unregister_driver(&ve_spc_cpufreq_driver);
579*4882a593Smuzhiyun bL_switcher_put_enabled();
580*4882a593Smuzhiyun pr_info("%s: Un-registered platform driver: %s\n", __func__,
581*4882a593Smuzhiyun ve_spc_cpufreq_driver.name);
582*4882a593Smuzhiyun return 0;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun static struct platform_driver ve_spc_cpufreq_platdrv = {
586*4882a593Smuzhiyun .driver = {
587*4882a593Smuzhiyun .name = "vexpress-spc-cpufreq",
588*4882a593Smuzhiyun },
589*4882a593Smuzhiyun .probe = ve_spc_cpufreq_probe,
590*4882a593Smuzhiyun .remove = ve_spc_cpufreq_remove,
591*4882a593Smuzhiyun };
592*4882a593Smuzhiyun module_platform_driver(ve_spc_cpufreq_platdrv);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun MODULE_ALIAS("platform:vexpress-spc-cpufreq");
595*4882a593Smuzhiyun MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
596*4882a593Smuzhiyun MODULE_AUTHOR("Sudeep Holla <sudeep.holla@arm.com>");
597*4882a593Smuzhiyun MODULE_DESCRIPTION("Vexpress SPC ARM big LITTLE cpufreq driver");
598*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
599