xref: /OK3568_Linux_fs/kernel/drivers/cpufreq/powernv-cpufreq.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * POWERNV cpufreq driver for the IBM POWER processors
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (C) Copyright IBM 2014
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #define pr_fmt(fmt)	"powernv-cpufreq: " fmt
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/sysfs.h>
14*4882a593Smuzhiyun #include <linux/cpumask.h>
15*4882a593Smuzhiyun #include <linux/module.h>
16*4882a593Smuzhiyun #include <linux/cpufreq.h>
17*4882a593Smuzhiyun #include <linux/smp.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/reboot.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/cpu.h>
22*4882a593Smuzhiyun #include <linux/hashtable.h>
23*4882a593Smuzhiyun #include <trace/events/power.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <asm/cputhreads.h>
26*4882a593Smuzhiyun #include <asm/firmware.h>
27*4882a593Smuzhiyun #include <asm/reg.h>
28*4882a593Smuzhiyun #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
29*4882a593Smuzhiyun #include <asm/opal.h>
30*4882a593Smuzhiyun #include <linux/timer.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define POWERNV_MAX_PSTATES_ORDER  8
33*4882a593Smuzhiyun #define POWERNV_MAX_PSTATES	(1UL << (POWERNV_MAX_PSTATES_ORDER))
34*4882a593Smuzhiyun #define PMSR_PSAFE_ENABLE	(1UL << 30)
35*4882a593Smuzhiyun #define PMSR_SPR_EM_DISABLE	(1UL << 31)
36*4882a593Smuzhiyun #define MAX_PSTATE_SHIFT	32
37*4882a593Smuzhiyun #define LPSTATE_SHIFT		48
38*4882a593Smuzhiyun #define GPSTATE_SHIFT		56
39*4882a593Smuzhiyun #define MAX_NR_CHIPS		32
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define MAX_RAMP_DOWN_TIME				5120
42*4882a593Smuzhiyun /*
43*4882a593Smuzhiyun  * On an idle system we want the global pstate to ramp-down from max value to
44*4882a593Smuzhiyun  * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
45*4882a593Smuzhiyun  * then ramp-down rapidly later on.
46*4882a593Smuzhiyun  *
47*4882a593Smuzhiyun  * This gives a percentage rampdown for time elapsed in milliseconds.
48*4882a593Smuzhiyun  * ramp_down_percentage = ((ms * ms) >> 18)
49*4882a593Smuzhiyun  *			~= 3.8 * (sec * sec)
50*4882a593Smuzhiyun  *
51*4882a593Smuzhiyun  * At 0 ms	ramp_down_percent = 0
52*4882a593Smuzhiyun  * At 5120 ms	ramp_down_percent = 100
53*4882a593Smuzhiyun  */
54*4882a593Smuzhiyun #define ramp_down_percent(time)		((time * time) >> 18)
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* Interval after which the timer is queued to bring down global pstate */
57*4882a593Smuzhiyun #define GPSTATE_TIMER_INTERVAL				2000
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /**
60*4882a593Smuzhiyun  * struct global_pstate_info -	Per policy data structure to maintain history of
61*4882a593Smuzhiyun  *				global pstates
62*4882a593Smuzhiyun  * @highest_lpstate_idx:	The local pstate index from which we are
63*4882a593Smuzhiyun  *				ramping down
64*4882a593Smuzhiyun  * @elapsed_time:		Time in ms spent in ramping down from
65*4882a593Smuzhiyun  *				highest_lpstate_idx
66*4882a593Smuzhiyun  * @last_sampled_time:		Time from boot in ms when global pstates were
67*4882a593Smuzhiyun  *				last set
68*4882a593Smuzhiyun  * @last_lpstate_idx:		Last set value of local pstate and global
69*4882a593Smuzhiyun  * @last_gpstate_idx:		pstate in terms of cpufreq table index
70*4882a593Smuzhiyun  * @timer:			Is used for ramping down if cpu goes idle for
71*4882a593Smuzhiyun  *				a long time with global pstate held high
72*4882a593Smuzhiyun  * @gpstate_lock:		A spinlock to maintain synchronization between
73*4882a593Smuzhiyun  *				routines called by the timer handler and
74*4882a593Smuzhiyun  *				governer's target_index calls
75*4882a593Smuzhiyun  * @policy:			Associated CPUFreq policy
76*4882a593Smuzhiyun  */
77*4882a593Smuzhiyun struct global_pstate_info {
78*4882a593Smuzhiyun 	int highest_lpstate_idx;
79*4882a593Smuzhiyun 	unsigned int elapsed_time;
80*4882a593Smuzhiyun 	unsigned int last_sampled_time;
81*4882a593Smuzhiyun 	int last_lpstate_idx;
82*4882a593Smuzhiyun 	int last_gpstate_idx;
83*4882a593Smuzhiyun 	spinlock_t gpstate_lock;
84*4882a593Smuzhiyun 	struct timer_list timer;
85*4882a593Smuzhiyun 	struct cpufreq_policy *policy;
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun static DEFINE_HASHTABLE(pstate_revmap, POWERNV_MAX_PSTATES_ORDER);
91*4882a593Smuzhiyun /**
92*4882a593Smuzhiyun  * struct pstate_idx_revmap_data: Entry in the hashmap pstate_revmap
93*4882a593Smuzhiyun  *				  indexed by a function of pstate id.
94*4882a593Smuzhiyun  *
95*4882a593Smuzhiyun  * @pstate_id: pstate id for this entry.
96*4882a593Smuzhiyun  *
97*4882a593Smuzhiyun  * @cpufreq_table_idx: Index into the powernv_freqs
98*4882a593Smuzhiyun  *		       cpufreq_frequency_table for frequency
99*4882a593Smuzhiyun  *		       corresponding to pstate_id.
100*4882a593Smuzhiyun  *
101*4882a593Smuzhiyun  * @hentry: hlist_node that hooks this entry into the pstate_revmap
102*4882a593Smuzhiyun  *	    hashtable
103*4882a593Smuzhiyun  */
104*4882a593Smuzhiyun struct pstate_idx_revmap_data {
105*4882a593Smuzhiyun 	u8 pstate_id;
106*4882a593Smuzhiyun 	unsigned int cpufreq_table_idx;
107*4882a593Smuzhiyun 	struct hlist_node hentry;
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun static bool rebooting, throttled, occ_reset;
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun static const char * const throttle_reason[] = {
113*4882a593Smuzhiyun 	"No throttling",
114*4882a593Smuzhiyun 	"Power Cap",
115*4882a593Smuzhiyun 	"Processor Over Temperature",
116*4882a593Smuzhiyun 	"Power Supply Failure",
117*4882a593Smuzhiyun 	"Over Current",
118*4882a593Smuzhiyun 	"OCC Reset"
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun enum throttle_reason_type {
122*4882a593Smuzhiyun 	NO_THROTTLE = 0,
123*4882a593Smuzhiyun 	POWERCAP,
124*4882a593Smuzhiyun 	CPU_OVERTEMP,
125*4882a593Smuzhiyun 	POWER_SUPPLY_FAILURE,
126*4882a593Smuzhiyun 	OVERCURRENT,
127*4882a593Smuzhiyun 	OCC_RESET_THROTTLE,
128*4882a593Smuzhiyun 	OCC_MAX_REASON
129*4882a593Smuzhiyun };
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun static struct chip {
132*4882a593Smuzhiyun 	unsigned int id;
133*4882a593Smuzhiyun 	bool throttled;
134*4882a593Smuzhiyun 	bool restore;
135*4882a593Smuzhiyun 	u8 throttle_reason;
136*4882a593Smuzhiyun 	cpumask_t mask;
137*4882a593Smuzhiyun 	struct work_struct throttle;
138*4882a593Smuzhiyun 	int throttle_turbo;
139*4882a593Smuzhiyun 	int throttle_sub_turbo;
140*4882a593Smuzhiyun 	int reason[OCC_MAX_REASON];
141*4882a593Smuzhiyun } *chips;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static int nr_chips;
144*4882a593Smuzhiyun static DEFINE_PER_CPU(struct chip *, chip_info);
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /*
147*4882a593Smuzhiyun  * Note:
148*4882a593Smuzhiyun  * The set of pstates consists of contiguous integers.
149*4882a593Smuzhiyun  * powernv_pstate_info stores the index of the frequency table for
150*4882a593Smuzhiyun  * max, min and nominal frequencies. It also stores number of
151*4882a593Smuzhiyun  * available frequencies.
152*4882a593Smuzhiyun  *
153*4882a593Smuzhiyun  * powernv_pstate_info.nominal indicates the index to the highest
154*4882a593Smuzhiyun  * non-turbo frequency.
155*4882a593Smuzhiyun  */
156*4882a593Smuzhiyun static struct powernv_pstate_info {
157*4882a593Smuzhiyun 	unsigned int min;
158*4882a593Smuzhiyun 	unsigned int max;
159*4882a593Smuzhiyun 	unsigned int nominal;
160*4882a593Smuzhiyun 	unsigned int nr_pstates;
161*4882a593Smuzhiyun 	bool wof_enabled;
162*4882a593Smuzhiyun } powernv_pstate_info;
163*4882a593Smuzhiyun 
extract_pstate(u64 pmsr_val,unsigned int shift)164*4882a593Smuzhiyun static inline u8 extract_pstate(u64 pmsr_val, unsigned int shift)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	return ((pmsr_val >> shift) & 0xFF);
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #define extract_local_pstate(x) extract_pstate(x, LPSTATE_SHIFT)
170*4882a593Smuzhiyun #define extract_global_pstate(x) extract_pstate(x, GPSTATE_SHIFT)
171*4882a593Smuzhiyun #define extract_max_pstate(x)  extract_pstate(x, MAX_PSTATE_SHIFT)
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun /* Use following functions for conversions between pstate_id and index */
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun /*
176*4882a593Smuzhiyun  * idx_to_pstate : Returns the pstate id corresponding to the
177*4882a593Smuzhiyun  *		   frequency in the cpufreq frequency table
178*4882a593Smuzhiyun  *		   powernv_freqs indexed by @i.
179*4882a593Smuzhiyun  *
180*4882a593Smuzhiyun  *		   If @i is out of bound, this will return the pstate
181*4882a593Smuzhiyun  *		   corresponding to the nominal frequency.
182*4882a593Smuzhiyun  */
idx_to_pstate(unsigned int i)183*4882a593Smuzhiyun static inline u8 idx_to_pstate(unsigned int i)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun 	if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
186*4882a593Smuzhiyun 		pr_warn_once("idx_to_pstate: index %u is out of bound\n", i);
187*4882a593Smuzhiyun 		return powernv_freqs[powernv_pstate_info.nominal].driver_data;
188*4882a593Smuzhiyun 	}
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	return powernv_freqs[i].driver_data;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun /*
194*4882a593Smuzhiyun  * pstate_to_idx : Returns the index in the cpufreq frequencytable
195*4882a593Smuzhiyun  *		   powernv_freqs for the frequency whose corresponding
196*4882a593Smuzhiyun  *		   pstate id is @pstate.
197*4882a593Smuzhiyun  *
198*4882a593Smuzhiyun  *		   If no frequency corresponding to @pstate is found,
199*4882a593Smuzhiyun  *		   this will return the index of the nominal
200*4882a593Smuzhiyun  *		   frequency.
201*4882a593Smuzhiyun  */
pstate_to_idx(u8 pstate)202*4882a593Smuzhiyun static unsigned int pstate_to_idx(u8 pstate)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	unsigned int key = pstate % POWERNV_MAX_PSTATES;
205*4882a593Smuzhiyun 	struct pstate_idx_revmap_data *revmap_data;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	hash_for_each_possible(pstate_revmap, revmap_data, hentry, key) {
208*4882a593Smuzhiyun 		if (revmap_data->pstate_id == pstate)
209*4882a593Smuzhiyun 			return revmap_data->cpufreq_table_idx;
210*4882a593Smuzhiyun 	}
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	pr_warn_once("pstate_to_idx: pstate 0x%x not found\n", pstate);
213*4882a593Smuzhiyun 	return powernv_pstate_info.nominal;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun 
reset_gpstates(struct cpufreq_policy * policy)216*4882a593Smuzhiyun static inline void reset_gpstates(struct cpufreq_policy *policy)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	struct global_pstate_info *gpstates = policy->driver_data;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	gpstates->highest_lpstate_idx = 0;
221*4882a593Smuzhiyun 	gpstates->elapsed_time = 0;
222*4882a593Smuzhiyun 	gpstates->last_sampled_time = 0;
223*4882a593Smuzhiyun 	gpstates->last_lpstate_idx = 0;
224*4882a593Smuzhiyun 	gpstates->last_gpstate_idx = 0;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun /*
228*4882a593Smuzhiyun  * Initialize the freq table based on data obtained
229*4882a593Smuzhiyun  * from the firmware passed via device-tree
230*4882a593Smuzhiyun  */
init_powernv_pstates(void)231*4882a593Smuzhiyun static int init_powernv_pstates(void)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	struct device_node *power_mgt;
234*4882a593Smuzhiyun 	int i, nr_pstates = 0;
235*4882a593Smuzhiyun 	const __be32 *pstate_ids, *pstate_freqs;
236*4882a593Smuzhiyun 	u32 len_ids, len_freqs;
237*4882a593Smuzhiyun 	u32 pstate_min, pstate_max, pstate_nominal;
238*4882a593Smuzhiyun 	u32 pstate_turbo, pstate_ultra_turbo;
239*4882a593Smuzhiyun 	int rc = -ENODEV;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
242*4882a593Smuzhiyun 	if (!power_mgt) {
243*4882a593Smuzhiyun 		pr_warn("power-mgt node not found\n");
244*4882a593Smuzhiyun 		return -ENODEV;
245*4882a593Smuzhiyun 	}
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
248*4882a593Smuzhiyun 		pr_warn("ibm,pstate-min node not found\n");
249*4882a593Smuzhiyun 		goto out;
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
253*4882a593Smuzhiyun 		pr_warn("ibm,pstate-max node not found\n");
254*4882a593Smuzhiyun 		goto out;
255*4882a593Smuzhiyun 	}
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
258*4882a593Smuzhiyun 				 &pstate_nominal)) {
259*4882a593Smuzhiyun 		pr_warn("ibm,pstate-nominal not found\n");
260*4882a593Smuzhiyun 		goto out;
261*4882a593Smuzhiyun 	}
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
264*4882a593Smuzhiyun 				 &pstate_ultra_turbo)) {
265*4882a593Smuzhiyun 		powernv_pstate_info.wof_enabled = false;
266*4882a593Smuzhiyun 		goto next;
267*4882a593Smuzhiyun 	}
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
270*4882a593Smuzhiyun 				 &pstate_turbo)) {
271*4882a593Smuzhiyun 		powernv_pstate_info.wof_enabled = false;
272*4882a593Smuzhiyun 		goto next;
273*4882a593Smuzhiyun 	}
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	if (pstate_turbo == pstate_ultra_turbo)
276*4882a593Smuzhiyun 		powernv_pstate_info.wof_enabled = false;
277*4882a593Smuzhiyun 	else
278*4882a593Smuzhiyun 		powernv_pstate_info.wof_enabled = true;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun next:
281*4882a593Smuzhiyun 	pr_info("cpufreq pstate min 0x%x nominal 0x%x max 0x%x\n", pstate_min,
282*4882a593Smuzhiyun 		pstate_nominal, pstate_max);
283*4882a593Smuzhiyun 	pr_info("Workload Optimized Frequency is %s in the platform\n",
284*4882a593Smuzhiyun 		(powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
287*4882a593Smuzhiyun 	if (!pstate_ids) {
288*4882a593Smuzhiyun 		pr_warn("ibm,pstate-ids not found\n");
289*4882a593Smuzhiyun 		goto out;
290*4882a593Smuzhiyun 	}
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
293*4882a593Smuzhiyun 				      &len_freqs);
294*4882a593Smuzhiyun 	if (!pstate_freqs) {
295*4882a593Smuzhiyun 		pr_warn("ibm,pstate-frequencies-mhz not found\n");
296*4882a593Smuzhiyun 		goto out;
297*4882a593Smuzhiyun 	}
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	if (len_ids != len_freqs) {
300*4882a593Smuzhiyun 		pr_warn("Entries in ibm,pstate-ids and "
301*4882a593Smuzhiyun 			"ibm,pstate-frequencies-mhz does not match\n");
302*4882a593Smuzhiyun 	}
303*4882a593Smuzhiyun 
304*4882a593Smuzhiyun 	nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
305*4882a593Smuzhiyun 	if (!nr_pstates) {
306*4882a593Smuzhiyun 		pr_warn("No PStates found\n");
307*4882a593Smuzhiyun 		goto out;
308*4882a593Smuzhiyun 	}
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	powernv_pstate_info.nr_pstates = nr_pstates;
311*4882a593Smuzhiyun 	pr_debug("NR PStates %d\n", nr_pstates);
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	for (i = 0; i < nr_pstates; i++) {
314*4882a593Smuzhiyun 		u32 id = be32_to_cpu(pstate_ids[i]);
315*4882a593Smuzhiyun 		u32 freq = be32_to_cpu(pstate_freqs[i]);
316*4882a593Smuzhiyun 		struct pstate_idx_revmap_data *revmap_data;
317*4882a593Smuzhiyun 		unsigned int key;
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 		pr_debug("PState id %d freq %d MHz\n", id, freq);
320*4882a593Smuzhiyun 		powernv_freqs[i].frequency = freq * 1000; /* kHz */
321*4882a593Smuzhiyun 		powernv_freqs[i].driver_data = id & 0xFF;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 		revmap_data = kmalloc(sizeof(*revmap_data), GFP_KERNEL);
324*4882a593Smuzhiyun 		if (!revmap_data) {
325*4882a593Smuzhiyun 			rc = -ENOMEM;
326*4882a593Smuzhiyun 			goto out;
327*4882a593Smuzhiyun 		}
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun 		revmap_data->pstate_id = id & 0xFF;
330*4882a593Smuzhiyun 		revmap_data->cpufreq_table_idx = i;
331*4882a593Smuzhiyun 		key = (revmap_data->pstate_id) % POWERNV_MAX_PSTATES;
332*4882a593Smuzhiyun 		hash_add(pstate_revmap, &revmap_data->hentry, key);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 		if (id == pstate_max)
335*4882a593Smuzhiyun 			powernv_pstate_info.max = i;
336*4882a593Smuzhiyun 		if (id == pstate_nominal)
337*4882a593Smuzhiyun 			powernv_pstate_info.nominal = i;
338*4882a593Smuzhiyun 		if (id == pstate_min)
339*4882a593Smuzhiyun 			powernv_pstate_info.min = i;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 		if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
342*4882a593Smuzhiyun 			int j;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 			for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
345*4882a593Smuzhiyun 				powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
346*4882a593Smuzhiyun 		}
347*4882a593Smuzhiyun 	}
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun 	/* End of list marker entry */
350*4882a593Smuzhiyun 	powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	of_node_put(power_mgt);
353*4882a593Smuzhiyun 	return 0;
354*4882a593Smuzhiyun out:
355*4882a593Smuzhiyun 	of_node_put(power_mgt);
356*4882a593Smuzhiyun 	return rc;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun /* Returns the CPU frequency corresponding to the pstate_id. */
pstate_id_to_freq(u8 pstate_id)360*4882a593Smuzhiyun static unsigned int pstate_id_to_freq(u8 pstate_id)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun 	int i;
363*4882a593Smuzhiyun 
364*4882a593Smuzhiyun 	i = pstate_to_idx(pstate_id);
365*4882a593Smuzhiyun 	if (i >= powernv_pstate_info.nr_pstates || i < 0) {
366*4882a593Smuzhiyun 		pr_warn("PState id 0x%x outside of PState table, reporting nominal id 0x%x instead\n",
367*4882a593Smuzhiyun 			pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
368*4882a593Smuzhiyun 		i = powernv_pstate_info.nominal;
369*4882a593Smuzhiyun 	}
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	return powernv_freqs[i].frequency;
372*4882a593Smuzhiyun }
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun /*
375*4882a593Smuzhiyun  * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
376*4882a593Smuzhiyun  * the firmware
377*4882a593Smuzhiyun  */
cpuinfo_nominal_freq_show(struct cpufreq_policy * policy,char * buf)378*4882a593Smuzhiyun static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
379*4882a593Smuzhiyun 					char *buf)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun 	return sprintf(buf, "%u\n",
382*4882a593Smuzhiyun 		powernv_freqs[powernv_pstate_info.nominal].frequency);
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun static struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
386*4882a593Smuzhiyun 	__ATTR_RO(cpuinfo_nominal_freq);
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun #define SCALING_BOOST_FREQS_ATTR_INDEX		2
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun static struct freq_attr *powernv_cpu_freq_attr[] = {
391*4882a593Smuzhiyun 	&cpufreq_freq_attr_scaling_available_freqs,
392*4882a593Smuzhiyun 	&cpufreq_freq_attr_cpuinfo_nominal_freq,
393*4882a593Smuzhiyun 	&cpufreq_freq_attr_scaling_boost_freqs,
394*4882a593Smuzhiyun 	NULL,
395*4882a593Smuzhiyun };
396*4882a593Smuzhiyun 
397*4882a593Smuzhiyun #define throttle_attr(name, member)					\
398*4882a593Smuzhiyun static ssize_t name##_show(struct cpufreq_policy *policy, char *buf)	\
399*4882a593Smuzhiyun {									\
400*4882a593Smuzhiyun 	struct chip *chip = per_cpu(chip_info, policy->cpu);		\
401*4882a593Smuzhiyun 									\
402*4882a593Smuzhiyun 	return sprintf(buf, "%u\n", chip->member);			\
403*4882a593Smuzhiyun }									\
404*4882a593Smuzhiyun 									\
405*4882a593Smuzhiyun static struct freq_attr throttle_attr_##name = __ATTR_RO(name)		\
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun throttle_attr(unthrottle, reason[NO_THROTTLE]);
408*4882a593Smuzhiyun throttle_attr(powercap, reason[POWERCAP]);
409*4882a593Smuzhiyun throttle_attr(overtemp, reason[CPU_OVERTEMP]);
410*4882a593Smuzhiyun throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
411*4882a593Smuzhiyun throttle_attr(overcurrent, reason[OVERCURRENT]);
412*4882a593Smuzhiyun throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
413*4882a593Smuzhiyun throttle_attr(turbo_stat, throttle_turbo);
414*4882a593Smuzhiyun throttle_attr(sub_turbo_stat, throttle_sub_turbo);
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun static struct attribute *throttle_attrs[] = {
417*4882a593Smuzhiyun 	&throttle_attr_unthrottle.attr,
418*4882a593Smuzhiyun 	&throttle_attr_powercap.attr,
419*4882a593Smuzhiyun 	&throttle_attr_overtemp.attr,
420*4882a593Smuzhiyun 	&throttle_attr_supply_fault.attr,
421*4882a593Smuzhiyun 	&throttle_attr_overcurrent.attr,
422*4882a593Smuzhiyun 	&throttle_attr_occ_reset.attr,
423*4882a593Smuzhiyun 	&throttle_attr_turbo_stat.attr,
424*4882a593Smuzhiyun 	&throttle_attr_sub_turbo_stat.attr,
425*4882a593Smuzhiyun 	NULL,
426*4882a593Smuzhiyun };
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun static const struct attribute_group throttle_attr_grp = {
429*4882a593Smuzhiyun 	.name	= "throttle_stats",
430*4882a593Smuzhiyun 	.attrs	= throttle_attrs,
431*4882a593Smuzhiyun };
432*4882a593Smuzhiyun 
433*4882a593Smuzhiyun /* Helper routines */
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun /* Access helpers to power mgt SPR */
436*4882a593Smuzhiyun 
get_pmspr(unsigned long sprn)437*4882a593Smuzhiyun static inline unsigned long get_pmspr(unsigned long sprn)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun 	switch (sprn) {
440*4882a593Smuzhiyun 	case SPRN_PMCR:
441*4882a593Smuzhiyun 		return mfspr(SPRN_PMCR);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	case SPRN_PMICR:
444*4882a593Smuzhiyun 		return mfspr(SPRN_PMICR);
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	case SPRN_PMSR:
447*4882a593Smuzhiyun 		return mfspr(SPRN_PMSR);
448*4882a593Smuzhiyun 	}
449*4882a593Smuzhiyun 	BUG();
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun 
set_pmspr(unsigned long sprn,unsigned long val)452*4882a593Smuzhiyun static inline void set_pmspr(unsigned long sprn, unsigned long val)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun 	switch (sprn) {
455*4882a593Smuzhiyun 	case SPRN_PMCR:
456*4882a593Smuzhiyun 		mtspr(SPRN_PMCR, val);
457*4882a593Smuzhiyun 		return;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	case SPRN_PMICR:
460*4882a593Smuzhiyun 		mtspr(SPRN_PMICR, val);
461*4882a593Smuzhiyun 		return;
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun 	BUG();
464*4882a593Smuzhiyun }
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun /*
467*4882a593Smuzhiyun  * Use objects of this type to query/update
468*4882a593Smuzhiyun  * pstates on a remote CPU via smp_call_function.
469*4882a593Smuzhiyun  */
470*4882a593Smuzhiyun struct powernv_smp_call_data {
471*4882a593Smuzhiyun 	unsigned int freq;
472*4882a593Smuzhiyun 	u8 pstate_id;
473*4882a593Smuzhiyun 	u8 gpstate_id;
474*4882a593Smuzhiyun };
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun /*
477*4882a593Smuzhiyun  * powernv_read_cpu_freq: Reads the current frequency on this CPU.
478*4882a593Smuzhiyun  *
479*4882a593Smuzhiyun  * Called via smp_call_function.
480*4882a593Smuzhiyun  *
481*4882a593Smuzhiyun  * Note: The caller of the smp_call_function should pass an argument of
482*4882a593Smuzhiyun  * the type 'struct powernv_smp_call_data *' along with this function.
483*4882a593Smuzhiyun  *
484*4882a593Smuzhiyun  * The current frequency on this CPU will be returned via
485*4882a593Smuzhiyun  * ((struct powernv_smp_call_data *)arg)->freq;
486*4882a593Smuzhiyun  */
powernv_read_cpu_freq(void * arg)487*4882a593Smuzhiyun static void powernv_read_cpu_freq(void *arg)
488*4882a593Smuzhiyun {
489*4882a593Smuzhiyun 	unsigned long pmspr_val;
490*4882a593Smuzhiyun 	struct powernv_smp_call_data *freq_data = arg;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	pmspr_val = get_pmspr(SPRN_PMSR);
493*4882a593Smuzhiyun 	freq_data->pstate_id = extract_local_pstate(pmspr_val);
494*4882a593Smuzhiyun 	freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 	pr_debug("cpu %d pmsr %016lX pstate_id 0x%x frequency %d kHz\n",
497*4882a593Smuzhiyun 		 raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
498*4882a593Smuzhiyun 		 freq_data->freq);
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun /*
502*4882a593Smuzhiyun  * powernv_cpufreq_get: Returns the CPU frequency as reported by the
503*4882a593Smuzhiyun  * firmware for CPU 'cpu'. This value is reported through the sysfs
504*4882a593Smuzhiyun  * file cpuinfo_cur_freq.
505*4882a593Smuzhiyun  */
powernv_cpufreq_get(unsigned int cpu)506*4882a593Smuzhiyun static unsigned int powernv_cpufreq_get(unsigned int cpu)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun 	struct powernv_smp_call_data freq_data;
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
511*4882a593Smuzhiyun 			&freq_data, 1);
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	return freq_data.freq;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun /*
517*4882a593Smuzhiyun  * set_pstate: Sets the pstate on this CPU.
518*4882a593Smuzhiyun  *
519*4882a593Smuzhiyun  * This is called via an smp_call_function.
520*4882a593Smuzhiyun  *
521*4882a593Smuzhiyun  * The caller must ensure that freq_data is of the type
522*4882a593Smuzhiyun  * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
523*4882a593Smuzhiyun  * on this CPU should be present in freq_data->pstate_id.
524*4882a593Smuzhiyun  */
set_pstate(void * data)525*4882a593Smuzhiyun static void set_pstate(void *data)
526*4882a593Smuzhiyun {
527*4882a593Smuzhiyun 	unsigned long val;
528*4882a593Smuzhiyun 	struct powernv_smp_call_data *freq_data = data;
529*4882a593Smuzhiyun 	unsigned long pstate_ul = freq_data->pstate_id;
530*4882a593Smuzhiyun 	unsigned long gpstate_ul = freq_data->gpstate_id;
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	val = get_pmspr(SPRN_PMCR);
533*4882a593Smuzhiyun 	val = val & 0x0000FFFFFFFFFFFFULL;
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	pstate_ul = pstate_ul & 0xFF;
536*4882a593Smuzhiyun 	gpstate_ul = gpstate_ul & 0xFF;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	/* Set both global(bits 56..63) and local(bits 48..55) PStates */
539*4882a593Smuzhiyun 	val = val | (gpstate_ul << 56) | (pstate_ul << 48);
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	pr_debug("Setting cpu %d pmcr to %016lX\n",
542*4882a593Smuzhiyun 			raw_smp_processor_id(), val);
543*4882a593Smuzhiyun 	set_pmspr(SPRN_PMCR, val);
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun /*
547*4882a593Smuzhiyun  * get_nominal_index: Returns the index corresponding to the nominal
548*4882a593Smuzhiyun  * pstate in the cpufreq table
549*4882a593Smuzhiyun  */
get_nominal_index(void)550*4882a593Smuzhiyun static inline unsigned int get_nominal_index(void)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	return powernv_pstate_info.nominal;
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun 
powernv_cpufreq_throttle_check(void * data)555*4882a593Smuzhiyun static void powernv_cpufreq_throttle_check(void *data)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun 	struct chip *chip;
558*4882a593Smuzhiyun 	unsigned int cpu = smp_processor_id();
559*4882a593Smuzhiyun 	unsigned long pmsr;
560*4882a593Smuzhiyun 	u8 pmsr_pmax;
561*4882a593Smuzhiyun 	unsigned int pmsr_pmax_idx;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	pmsr = get_pmspr(SPRN_PMSR);
564*4882a593Smuzhiyun 	chip = this_cpu_read(chip_info);
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	/* Check for Pmax Capping */
567*4882a593Smuzhiyun 	pmsr_pmax = extract_max_pstate(pmsr);
568*4882a593Smuzhiyun 	pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
569*4882a593Smuzhiyun 	if (pmsr_pmax_idx != powernv_pstate_info.max) {
570*4882a593Smuzhiyun 		if (chip->throttled)
571*4882a593Smuzhiyun 			goto next;
572*4882a593Smuzhiyun 		chip->throttled = true;
573*4882a593Smuzhiyun 		if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
574*4882a593Smuzhiyun 			pr_warn_once("CPU %d on Chip %u has Pmax(0x%x) reduced below that of nominal frequency(0x%x)\n",
575*4882a593Smuzhiyun 				     cpu, chip->id, pmsr_pmax,
576*4882a593Smuzhiyun 				     idx_to_pstate(powernv_pstate_info.nominal));
577*4882a593Smuzhiyun 			chip->throttle_sub_turbo++;
578*4882a593Smuzhiyun 		} else {
579*4882a593Smuzhiyun 			chip->throttle_turbo++;
580*4882a593Smuzhiyun 		}
581*4882a593Smuzhiyun 		trace_powernv_throttle(chip->id,
582*4882a593Smuzhiyun 				      throttle_reason[chip->throttle_reason],
583*4882a593Smuzhiyun 				      pmsr_pmax);
584*4882a593Smuzhiyun 	} else if (chip->throttled) {
585*4882a593Smuzhiyun 		chip->throttled = false;
586*4882a593Smuzhiyun 		trace_powernv_throttle(chip->id,
587*4882a593Smuzhiyun 				      throttle_reason[chip->throttle_reason],
588*4882a593Smuzhiyun 				      pmsr_pmax);
589*4882a593Smuzhiyun 	}
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	/* Check if Psafe_mode_active is set in PMSR. */
592*4882a593Smuzhiyun next:
593*4882a593Smuzhiyun 	if (pmsr & PMSR_PSAFE_ENABLE) {
594*4882a593Smuzhiyun 		throttled = true;
595*4882a593Smuzhiyun 		pr_info("Pstate set to safe frequency\n");
596*4882a593Smuzhiyun 	}
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	/* Check if SPR_EM_DISABLE is set in PMSR */
599*4882a593Smuzhiyun 	if (pmsr & PMSR_SPR_EM_DISABLE) {
600*4882a593Smuzhiyun 		throttled = true;
601*4882a593Smuzhiyun 		pr_info("Frequency Control disabled from OS\n");
602*4882a593Smuzhiyun 	}
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	if (throttled) {
605*4882a593Smuzhiyun 		pr_info("PMSR = %16lx\n", pmsr);
606*4882a593Smuzhiyun 		pr_warn("CPU Frequency could be throttled\n");
607*4882a593Smuzhiyun 	}
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun /**
611*4882a593Smuzhiyun  * calc_global_pstate - Calculate global pstate
612*4882a593Smuzhiyun  * @elapsed_time:		Elapsed time in milliseconds
613*4882a593Smuzhiyun  * @local_pstate_idx:		New local pstate
614*4882a593Smuzhiyun  * @highest_lpstate_idx:	pstate from which its ramping down
615*4882a593Smuzhiyun  *
616*4882a593Smuzhiyun  * Finds the appropriate global pstate based on the pstate from which its
617*4882a593Smuzhiyun  * ramping down and the time elapsed in ramping down. It follows a quadratic
618*4882a593Smuzhiyun  * equation which ensures that it reaches ramping down to pmin in 5sec.
619*4882a593Smuzhiyun  */
calc_global_pstate(unsigned int elapsed_time,int highest_lpstate_idx,int local_pstate_idx)620*4882a593Smuzhiyun static inline int calc_global_pstate(unsigned int elapsed_time,
621*4882a593Smuzhiyun 				     int highest_lpstate_idx,
622*4882a593Smuzhiyun 				     int local_pstate_idx)
623*4882a593Smuzhiyun {
624*4882a593Smuzhiyun 	int index_diff;
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	/*
627*4882a593Smuzhiyun 	 * Using ramp_down_percent we get the percentage of rampdown
628*4882a593Smuzhiyun 	 * that we are expecting to be dropping. Difference between
629*4882a593Smuzhiyun 	 * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
630*4882a593Smuzhiyun 	 * number of how many pstates we will drop eventually by the end of
631*4882a593Smuzhiyun 	 * 5 seconds, then just scale it get the number pstates to be dropped.
632*4882a593Smuzhiyun 	 */
633*4882a593Smuzhiyun 	index_diff =  ((int)ramp_down_percent(elapsed_time) *
634*4882a593Smuzhiyun 			(powernv_pstate_info.min - highest_lpstate_idx)) / 100;
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	/* Ensure that global pstate is >= to local pstate */
637*4882a593Smuzhiyun 	if (highest_lpstate_idx + index_diff >= local_pstate_idx)
638*4882a593Smuzhiyun 		return local_pstate_idx;
639*4882a593Smuzhiyun 	else
640*4882a593Smuzhiyun 		return highest_lpstate_idx + index_diff;
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun 
queue_gpstate_timer(struct global_pstate_info * gpstates)643*4882a593Smuzhiyun static inline void  queue_gpstate_timer(struct global_pstate_info *gpstates)
644*4882a593Smuzhiyun {
645*4882a593Smuzhiyun 	unsigned int timer_interval;
646*4882a593Smuzhiyun 
647*4882a593Smuzhiyun 	/*
648*4882a593Smuzhiyun 	 * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
649*4882a593Smuzhiyun 	 * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
650*4882a593Smuzhiyun 	 * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
651*4882a593Smuzhiyun 	 * seconds of ramp down time.
652*4882a593Smuzhiyun 	 */
653*4882a593Smuzhiyun 	if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
654*4882a593Smuzhiyun 	     > MAX_RAMP_DOWN_TIME)
655*4882a593Smuzhiyun 		timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
656*4882a593Smuzhiyun 	else
657*4882a593Smuzhiyun 		timer_interval = GPSTATE_TIMER_INTERVAL;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun /**
663*4882a593Smuzhiyun  * gpstate_timer_handler
664*4882a593Smuzhiyun  *
665*4882a593Smuzhiyun  * @t: Timer context used to fetch global pstate info struct
666*4882a593Smuzhiyun  *
667*4882a593Smuzhiyun  * This handler brings down the global pstate closer to the local pstate
668*4882a593Smuzhiyun  * according quadratic equation. Queues a new timer if it is still not equal
669*4882a593Smuzhiyun  * to local pstate
670*4882a593Smuzhiyun  */
gpstate_timer_handler(struct timer_list * t)671*4882a593Smuzhiyun static void gpstate_timer_handler(struct timer_list *t)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun 	struct global_pstate_info *gpstates = from_timer(gpstates, t, timer);
674*4882a593Smuzhiyun 	struct cpufreq_policy *policy = gpstates->policy;
675*4882a593Smuzhiyun 	int gpstate_idx, lpstate_idx;
676*4882a593Smuzhiyun 	unsigned long val;
677*4882a593Smuzhiyun 	unsigned int time_diff = jiffies_to_msecs(jiffies)
678*4882a593Smuzhiyun 					- gpstates->last_sampled_time;
679*4882a593Smuzhiyun 	struct powernv_smp_call_data freq_data;
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 	if (!spin_trylock(&gpstates->gpstate_lock))
682*4882a593Smuzhiyun 		return;
683*4882a593Smuzhiyun 	/*
684*4882a593Smuzhiyun 	 * If the timer has migrated to the different cpu then bring
685*4882a593Smuzhiyun 	 * it back to one of the policy->cpus
686*4882a593Smuzhiyun 	 */
687*4882a593Smuzhiyun 	if (!cpumask_test_cpu(raw_smp_processor_id(), policy->cpus)) {
688*4882a593Smuzhiyun 		gpstates->timer.expires = jiffies + msecs_to_jiffies(1);
689*4882a593Smuzhiyun 		add_timer_on(&gpstates->timer, cpumask_first(policy->cpus));
690*4882a593Smuzhiyun 		spin_unlock(&gpstates->gpstate_lock);
691*4882a593Smuzhiyun 		return;
692*4882a593Smuzhiyun 	}
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 	/*
695*4882a593Smuzhiyun 	 * If PMCR was last updated was using fast_swtich then
696*4882a593Smuzhiyun 	 * We may have wrong in gpstate->last_lpstate_idx
697*4882a593Smuzhiyun 	 * value. Hence, read from PMCR to get correct data.
698*4882a593Smuzhiyun 	 */
699*4882a593Smuzhiyun 	val = get_pmspr(SPRN_PMCR);
700*4882a593Smuzhiyun 	freq_data.gpstate_id = extract_global_pstate(val);
701*4882a593Smuzhiyun 	freq_data.pstate_id = extract_local_pstate(val);
702*4882a593Smuzhiyun 	if (freq_data.gpstate_id  == freq_data.pstate_id) {
703*4882a593Smuzhiyun 		reset_gpstates(policy);
704*4882a593Smuzhiyun 		spin_unlock(&gpstates->gpstate_lock);
705*4882a593Smuzhiyun 		return;
706*4882a593Smuzhiyun 	}
707*4882a593Smuzhiyun 
708*4882a593Smuzhiyun 	gpstates->last_sampled_time += time_diff;
709*4882a593Smuzhiyun 	gpstates->elapsed_time += time_diff;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
712*4882a593Smuzhiyun 		gpstate_idx = pstate_to_idx(freq_data.pstate_id);
713*4882a593Smuzhiyun 		lpstate_idx = gpstate_idx;
714*4882a593Smuzhiyun 		reset_gpstates(policy);
715*4882a593Smuzhiyun 		gpstates->highest_lpstate_idx = gpstate_idx;
716*4882a593Smuzhiyun 	} else {
717*4882a593Smuzhiyun 		lpstate_idx = pstate_to_idx(freq_data.pstate_id);
718*4882a593Smuzhiyun 		gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
719*4882a593Smuzhiyun 						 gpstates->highest_lpstate_idx,
720*4882a593Smuzhiyun 						 lpstate_idx);
721*4882a593Smuzhiyun 	}
722*4882a593Smuzhiyun 	freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
723*4882a593Smuzhiyun 	gpstates->last_gpstate_idx = gpstate_idx;
724*4882a593Smuzhiyun 	gpstates->last_lpstate_idx = lpstate_idx;
725*4882a593Smuzhiyun 	/*
726*4882a593Smuzhiyun 	 * If local pstate is equal to global pstate, rampdown is over
727*4882a593Smuzhiyun 	 * So timer is not required to be queued.
728*4882a593Smuzhiyun 	 */
729*4882a593Smuzhiyun 	if (gpstate_idx != gpstates->last_lpstate_idx)
730*4882a593Smuzhiyun 		queue_gpstate_timer(gpstates);
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 	set_pstate(&freq_data);
733*4882a593Smuzhiyun 	spin_unlock(&gpstates->gpstate_lock);
734*4882a593Smuzhiyun }
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun /*
737*4882a593Smuzhiyun  * powernv_cpufreq_target_index: Sets the frequency corresponding to
738*4882a593Smuzhiyun  * the cpufreq table entry indexed by new_index on the cpus in the
739*4882a593Smuzhiyun  * mask policy->cpus
740*4882a593Smuzhiyun  */
powernv_cpufreq_target_index(struct cpufreq_policy * policy,unsigned int new_index)741*4882a593Smuzhiyun static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
742*4882a593Smuzhiyun 					unsigned int new_index)
743*4882a593Smuzhiyun {
744*4882a593Smuzhiyun 	struct powernv_smp_call_data freq_data;
745*4882a593Smuzhiyun 	unsigned int cur_msec, gpstate_idx;
746*4882a593Smuzhiyun 	struct global_pstate_info *gpstates = policy->driver_data;
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	if (unlikely(rebooting) && new_index != get_nominal_index())
749*4882a593Smuzhiyun 		return 0;
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	if (!throttled) {
752*4882a593Smuzhiyun 		/* we don't want to be preempted while
753*4882a593Smuzhiyun 		 * checking if the CPU frequency has been throttled
754*4882a593Smuzhiyun 		 */
755*4882a593Smuzhiyun 		preempt_disable();
756*4882a593Smuzhiyun 		powernv_cpufreq_throttle_check(NULL);
757*4882a593Smuzhiyun 		preempt_enable();
758*4882a593Smuzhiyun 	}
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun 	cur_msec = jiffies_to_msecs(get_jiffies_64());
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	freq_data.pstate_id = idx_to_pstate(new_index);
763*4882a593Smuzhiyun 	if (!gpstates) {
764*4882a593Smuzhiyun 		freq_data.gpstate_id = freq_data.pstate_id;
765*4882a593Smuzhiyun 		goto no_gpstate;
766*4882a593Smuzhiyun 	}
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	spin_lock(&gpstates->gpstate_lock);
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 	if (!gpstates->last_sampled_time) {
771*4882a593Smuzhiyun 		gpstate_idx = new_index;
772*4882a593Smuzhiyun 		gpstates->highest_lpstate_idx = new_index;
773*4882a593Smuzhiyun 		goto gpstates_done;
774*4882a593Smuzhiyun 	}
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	if (gpstates->last_gpstate_idx < new_index) {
777*4882a593Smuzhiyun 		gpstates->elapsed_time += cur_msec -
778*4882a593Smuzhiyun 						 gpstates->last_sampled_time;
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 		/*
781*4882a593Smuzhiyun 		 * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
782*4882a593Smuzhiyun 		 * we should be resetting all global pstate related data. Set it
783*4882a593Smuzhiyun 		 * equal to local pstate to start fresh.
784*4882a593Smuzhiyun 		 */
785*4882a593Smuzhiyun 		if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
786*4882a593Smuzhiyun 			reset_gpstates(policy);
787*4882a593Smuzhiyun 			gpstates->highest_lpstate_idx = new_index;
788*4882a593Smuzhiyun 			gpstate_idx = new_index;
789*4882a593Smuzhiyun 		} else {
790*4882a593Smuzhiyun 		/* Elaspsed_time is less than 5 seconds, continue to rampdown */
791*4882a593Smuzhiyun 			gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
792*4882a593Smuzhiyun 							 gpstates->highest_lpstate_idx,
793*4882a593Smuzhiyun 							 new_index);
794*4882a593Smuzhiyun 		}
795*4882a593Smuzhiyun 	} else {
796*4882a593Smuzhiyun 		reset_gpstates(policy);
797*4882a593Smuzhiyun 		gpstates->highest_lpstate_idx = new_index;
798*4882a593Smuzhiyun 		gpstate_idx = new_index;
799*4882a593Smuzhiyun 	}
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 	/*
802*4882a593Smuzhiyun 	 * If local pstate is equal to global pstate, rampdown is over
803*4882a593Smuzhiyun 	 * So timer is not required to be queued.
804*4882a593Smuzhiyun 	 */
805*4882a593Smuzhiyun 	if (gpstate_idx != new_index)
806*4882a593Smuzhiyun 		queue_gpstate_timer(gpstates);
807*4882a593Smuzhiyun 	else
808*4882a593Smuzhiyun 		del_timer_sync(&gpstates->timer);
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun gpstates_done:
811*4882a593Smuzhiyun 	freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
812*4882a593Smuzhiyun 	gpstates->last_sampled_time = cur_msec;
813*4882a593Smuzhiyun 	gpstates->last_gpstate_idx = gpstate_idx;
814*4882a593Smuzhiyun 	gpstates->last_lpstate_idx = new_index;
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	spin_unlock(&gpstates->gpstate_lock);
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun no_gpstate:
819*4882a593Smuzhiyun 	/*
820*4882a593Smuzhiyun 	 * Use smp_call_function to send IPI and execute the
821*4882a593Smuzhiyun 	 * mtspr on target CPU.  We could do that without IPI
822*4882a593Smuzhiyun 	 * if current CPU is within policy->cpus (core)
823*4882a593Smuzhiyun 	 */
824*4882a593Smuzhiyun 	smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
825*4882a593Smuzhiyun 	return 0;
826*4882a593Smuzhiyun }
827*4882a593Smuzhiyun 
powernv_cpufreq_cpu_init(struct cpufreq_policy * policy)828*4882a593Smuzhiyun static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
829*4882a593Smuzhiyun {
830*4882a593Smuzhiyun 	int base, i;
831*4882a593Smuzhiyun 	struct kernfs_node *kn;
832*4882a593Smuzhiyun 	struct global_pstate_info *gpstates;
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 	base = cpu_first_thread_sibling(policy->cpu);
835*4882a593Smuzhiyun 
836*4882a593Smuzhiyun 	for (i = 0; i < threads_per_core; i++)
837*4882a593Smuzhiyun 		cpumask_set_cpu(base + i, policy->cpus);
838*4882a593Smuzhiyun 
839*4882a593Smuzhiyun 	kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
840*4882a593Smuzhiyun 	if (!kn) {
841*4882a593Smuzhiyun 		int ret;
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 		ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
844*4882a593Smuzhiyun 		if (ret) {
845*4882a593Smuzhiyun 			pr_info("Failed to create throttle stats directory for cpu %d\n",
846*4882a593Smuzhiyun 				policy->cpu);
847*4882a593Smuzhiyun 			return ret;
848*4882a593Smuzhiyun 		}
849*4882a593Smuzhiyun 	} else {
850*4882a593Smuzhiyun 		kernfs_put(kn);
851*4882a593Smuzhiyun 	}
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun 	policy->freq_table = powernv_freqs;
854*4882a593Smuzhiyun 	policy->fast_switch_possible = true;
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 	if (pvr_version_is(PVR_POWER9))
857*4882a593Smuzhiyun 		return 0;
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun 	/* Initialise Gpstate ramp-down timer only on POWER8 */
860*4882a593Smuzhiyun 	gpstates =  kzalloc(sizeof(*gpstates), GFP_KERNEL);
861*4882a593Smuzhiyun 	if (!gpstates)
862*4882a593Smuzhiyun 		return -ENOMEM;
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	policy->driver_data = gpstates;
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 	/* initialize timer */
867*4882a593Smuzhiyun 	gpstates->policy = policy;
868*4882a593Smuzhiyun 	timer_setup(&gpstates->timer, gpstate_timer_handler,
869*4882a593Smuzhiyun 		    TIMER_PINNED | TIMER_DEFERRABLE);
870*4882a593Smuzhiyun 	gpstates->timer.expires = jiffies +
871*4882a593Smuzhiyun 				msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
872*4882a593Smuzhiyun 	spin_lock_init(&gpstates->gpstate_lock);
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun 	return 0;
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun 
powernv_cpufreq_cpu_exit(struct cpufreq_policy * policy)877*4882a593Smuzhiyun static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun 	/* timer is deleted in cpufreq_cpu_stop() */
880*4882a593Smuzhiyun 	kfree(policy->driver_data);
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	return 0;
883*4882a593Smuzhiyun }
884*4882a593Smuzhiyun 
powernv_cpufreq_reboot_notifier(struct notifier_block * nb,unsigned long action,void * unused)885*4882a593Smuzhiyun static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
886*4882a593Smuzhiyun 				unsigned long action, void *unused)
887*4882a593Smuzhiyun {
888*4882a593Smuzhiyun 	int cpu;
889*4882a593Smuzhiyun 	struct cpufreq_policy *cpu_policy;
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	rebooting = true;
892*4882a593Smuzhiyun 	for_each_online_cpu(cpu) {
893*4882a593Smuzhiyun 		cpu_policy = cpufreq_cpu_get(cpu);
894*4882a593Smuzhiyun 		if (!cpu_policy)
895*4882a593Smuzhiyun 			continue;
896*4882a593Smuzhiyun 		powernv_cpufreq_target_index(cpu_policy, get_nominal_index());
897*4882a593Smuzhiyun 		cpufreq_cpu_put(cpu_policy);
898*4882a593Smuzhiyun 	}
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	return NOTIFY_DONE;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun static struct notifier_block powernv_cpufreq_reboot_nb = {
904*4882a593Smuzhiyun 	.notifier_call = powernv_cpufreq_reboot_notifier,
905*4882a593Smuzhiyun };
906*4882a593Smuzhiyun 
powernv_cpufreq_work_fn(struct work_struct * work)907*4882a593Smuzhiyun static void powernv_cpufreq_work_fn(struct work_struct *work)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun 	struct chip *chip = container_of(work, struct chip, throttle);
910*4882a593Smuzhiyun 	struct cpufreq_policy *policy;
911*4882a593Smuzhiyun 	unsigned int cpu;
912*4882a593Smuzhiyun 	cpumask_t mask;
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	get_online_cpus();
915*4882a593Smuzhiyun 	cpumask_and(&mask, &chip->mask, cpu_online_mask);
916*4882a593Smuzhiyun 	smp_call_function_any(&mask,
917*4882a593Smuzhiyun 			      powernv_cpufreq_throttle_check, NULL, 0);
918*4882a593Smuzhiyun 
919*4882a593Smuzhiyun 	if (!chip->restore)
920*4882a593Smuzhiyun 		goto out;
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	chip->restore = false;
923*4882a593Smuzhiyun 	for_each_cpu(cpu, &mask) {
924*4882a593Smuzhiyun 		int index;
925*4882a593Smuzhiyun 
926*4882a593Smuzhiyun 		policy = cpufreq_cpu_get(cpu);
927*4882a593Smuzhiyun 		if (!policy)
928*4882a593Smuzhiyun 			continue;
929*4882a593Smuzhiyun 		index = cpufreq_table_find_index_c(policy, policy->cur);
930*4882a593Smuzhiyun 		powernv_cpufreq_target_index(policy, index);
931*4882a593Smuzhiyun 		cpumask_andnot(&mask, &mask, policy->cpus);
932*4882a593Smuzhiyun 		cpufreq_cpu_put(policy);
933*4882a593Smuzhiyun 	}
934*4882a593Smuzhiyun out:
935*4882a593Smuzhiyun 	put_online_cpus();
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun 
powernv_cpufreq_occ_msg(struct notifier_block * nb,unsigned long msg_type,void * _msg)938*4882a593Smuzhiyun static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
939*4882a593Smuzhiyun 				   unsigned long msg_type, void *_msg)
940*4882a593Smuzhiyun {
941*4882a593Smuzhiyun 	struct opal_msg *msg = _msg;
942*4882a593Smuzhiyun 	struct opal_occ_msg omsg;
943*4882a593Smuzhiyun 	int i;
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	if (msg_type != OPAL_MSG_OCC)
946*4882a593Smuzhiyun 		return 0;
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun 	omsg.type = be64_to_cpu(msg->params[0]);
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	switch (omsg.type) {
951*4882a593Smuzhiyun 	case OCC_RESET:
952*4882a593Smuzhiyun 		occ_reset = true;
953*4882a593Smuzhiyun 		pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
954*4882a593Smuzhiyun 		/*
955*4882a593Smuzhiyun 		 * powernv_cpufreq_throttle_check() is called in
956*4882a593Smuzhiyun 		 * target() callback which can detect the throttle state
957*4882a593Smuzhiyun 		 * for governors like ondemand.
958*4882a593Smuzhiyun 		 * But static governors will not call target() often thus
959*4882a593Smuzhiyun 		 * report throttling here.
960*4882a593Smuzhiyun 		 */
961*4882a593Smuzhiyun 		if (!throttled) {
962*4882a593Smuzhiyun 			throttled = true;
963*4882a593Smuzhiyun 			pr_warn("CPU frequency is throttled for duration\n");
964*4882a593Smuzhiyun 		}
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 		break;
967*4882a593Smuzhiyun 	case OCC_LOAD:
968*4882a593Smuzhiyun 		pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
969*4882a593Smuzhiyun 		break;
970*4882a593Smuzhiyun 	case OCC_THROTTLE:
971*4882a593Smuzhiyun 		omsg.chip = be64_to_cpu(msg->params[1]);
972*4882a593Smuzhiyun 		omsg.throttle_status = be64_to_cpu(msg->params[2]);
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun 		if (occ_reset) {
975*4882a593Smuzhiyun 			occ_reset = false;
976*4882a593Smuzhiyun 			throttled = false;
977*4882a593Smuzhiyun 			pr_info("OCC Active, CPU frequency is no longer throttled\n");
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun 			for (i = 0; i < nr_chips; i++) {
980*4882a593Smuzhiyun 				chips[i].restore = true;
981*4882a593Smuzhiyun 				schedule_work(&chips[i].throttle);
982*4882a593Smuzhiyun 			}
983*4882a593Smuzhiyun 
984*4882a593Smuzhiyun 			return 0;
985*4882a593Smuzhiyun 		}
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun 		for (i = 0; i < nr_chips; i++)
988*4882a593Smuzhiyun 			if (chips[i].id == omsg.chip)
989*4882a593Smuzhiyun 				break;
990*4882a593Smuzhiyun 
991*4882a593Smuzhiyun 		if (omsg.throttle_status >= 0 &&
992*4882a593Smuzhiyun 		    omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
993*4882a593Smuzhiyun 			chips[i].throttle_reason = omsg.throttle_status;
994*4882a593Smuzhiyun 			chips[i].reason[omsg.throttle_status]++;
995*4882a593Smuzhiyun 		}
996*4882a593Smuzhiyun 
997*4882a593Smuzhiyun 		if (!omsg.throttle_status)
998*4882a593Smuzhiyun 			chips[i].restore = true;
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 		schedule_work(&chips[i].throttle);
1001*4882a593Smuzhiyun 	}
1002*4882a593Smuzhiyun 	return 0;
1003*4882a593Smuzhiyun }
1004*4882a593Smuzhiyun 
1005*4882a593Smuzhiyun static struct notifier_block powernv_cpufreq_opal_nb = {
1006*4882a593Smuzhiyun 	.notifier_call	= powernv_cpufreq_occ_msg,
1007*4882a593Smuzhiyun 	.next		= NULL,
1008*4882a593Smuzhiyun 	.priority	= 0,
1009*4882a593Smuzhiyun };
1010*4882a593Smuzhiyun 
powernv_cpufreq_stop_cpu(struct cpufreq_policy * policy)1011*4882a593Smuzhiyun static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
1012*4882a593Smuzhiyun {
1013*4882a593Smuzhiyun 	struct powernv_smp_call_data freq_data;
1014*4882a593Smuzhiyun 	struct global_pstate_info *gpstates = policy->driver_data;
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun 	freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
1017*4882a593Smuzhiyun 	freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
1018*4882a593Smuzhiyun 	smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
1019*4882a593Smuzhiyun 	if (gpstates)
1020*4882a593Smuzhiyun 		del_timer_sync(&gpstates->timer);
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun 
powernv_fast_switch(struct cpufreq_policy * policy,unsigned int target_freq)1023*4882a593Smuzhiyun static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
1024*4882a593Smuzhiyun 					unsigned int target_freq)
1025*4882a593Smuzhiyun {
1026*4882a593Smuzhiyun 	int index;
1027*4882a593Smuzhiyun 	struct powernv_smp_call_data freq_data;
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun 	index = cpufreq_table_find_index_dl(policy, target_freq);
1030*4882a593Smuzhiyun 	freq_data.pstate_id = powernv_freqs[index].driver_data;
1031*4882a593Smuzhiyun 	freq_data.gpstate_id = powernv_freqs[index].driver_data;
1032*4882a593Smuzhiyun 	set_pstate(&freq_data);
1033*4882a593Smuzhiyun 
1034*4882a593Smuzhiyun 	return powernv_freqs[index].frequency;
1035*4882a593Smuzhiyun }
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun static struct cpufreq_driver powernv_cpufreq_driver = {
1038*4882a593Smuzhiyun 	.name		= "powernv-cpufreq",
1039*4882a593Smuzhiyun 	.flags		= CPUFREQ_CONST_LOOPS,
1040*4882a593Smuzhiyun 	.init		= powernv_cpufreq_cpu_init,
1041*4882a593Smuzhiyun 	.exit		= powernv_cpufreq_cpu_exit,
1042*4882a593Smuzhiyun 	.verify		= cpufreq_generic_frequency_table_verify,
1043*4882a593Smuzhiyun 	.target_index	= powernv_cpufreq_target_index,
1044*4882a593Smuzhiyun 	.fast_switch	= powernv_fast_switch,
1045*4882a593Smuzhiyun 	.get		= powernv_cpufreq_get,
1046*4882a593Smuzhiyun 	.stop_cpu	= powernv_cpufreq_stop_cpu,
1047*4882a593Smuzhiyun 	.attr		= powernv_cpu_freq_attr,
1048*4882a593Smuzhiyun };
1049*4882a593Smuzhiyun 
init_chip_info(void)1050*4882a593Smuzhiyun static int init_chip_info(void)
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun 	unsigned int *chip;
1053*4882a593Smuzhiyun 	unsigned int cpu, i;
1054*4882a593Smuzhiyun 	unsigned int prev_chip_id = UINT_MAX;
1055*4882a593Smuzhiyun 	cpumask_t *chip_cpu_mask;
1056*4882a593Smuzhiyun 	int ret = 0;
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun 	chip = kcalloc(num_possible_cpus(), sizeof(*chip), GFP_KERNEL);
1059*4882a593Smuzhiyun 	if (!chip)
1060*4882a593Smuzhiyun 		return -ENOMEM;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	/* Allocate a chip cpu mask large enough to fit mask for all chips */
1063*4882a593Smuzhiyun 	chip_cpu_mask = kcalloc(MAX_NR_CHIPS, sizeof(cpumask_t), GFP_KERNEL);
1064*4882a593Smuzhiyun 	if (!chip_cpu_mask) {
1065*4882a593Smuzhiyun 		ret = -ENOMEM;
1066*4882a593Smuzhiyun 		goto free_and_return;
1067*4882a593Smuzhiyun 	}
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun 	for_each_possible_cpu(cpu) {
1070*4882a593Smuzhiyun 		unsigned int id = cpu_to_chip_id(cpu);
1071*4882a593Smuzhiyun 
1072*4882a593Smuzhiyun 		if (prev_chip_id != id) {
1073*4882a593Smuzhiyun 			prev_chip_id = id;
1074*4882a593Smuzhiyun 			chip[nr_chips++] = id;
1075*4882a593Smuzhiyun 		}
1076*4882a593Smuzhiyun 		cpumask_set_cpu(cpu, &chip_cpu_mask[nr_chips-1]);
1077*4882a593Smuzhiyun 	}
1078*4882a593Smuzhiyun 
1079*4882a593Smuzhiyun 	chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
1080*4882a593Smuzhiyun 	if (!chips) {
1081*4882a593Smuzhiyun 		ret = -ENOMEM;
1082*4882a593Smuzhiyun 		goto out_free_chip_cpu_mask;
1083*4882a593Smuzhiyun 	}
1084*4882a593Smuzhiyun 
1085*4882a593Smuzhiyun 	for (i = 0; i < nr_chips; i++) {
1086*4882a593Smuzhiyun 		chips[i].id = chip[i];
1087*4882a593Smuzhiyun 		cpumask_copy(&chips[i].mask, &chip_cpu_mask[i]);
1088*4882a593Smuzhiyun 		INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
1089*4882a593Smuzhiyun 		for_each_cpu(cpu, &chips[i].mask)
1090*4882a593Smuzhiyun 			per_cpu(chip_info, cpu) =  &chips[i];
1091*4882a593Smuzhiyun 	}
1092*4882a593Smuzhiyun 
1093*4882a593Smuzhiyun out_free_chip_cpu_mask:
1094*4882a593Smuzhiyun 	kfree(chip_cpu_mask);
1095*4882a593Smuzhiyun free_and_return:
1096*4882a593Smuzhiyun 	kfree(chip);
1097*4882a593Smuzhiyun 	return ret;
1098*4882a593Smuzhiyun }
1099*4882a593Smuzhiyun 
clean_chip_info(void)1100*4882a593Smuzhiyun static inline void clean_chip_info(void)
1101*4882a593Smuzhiyun {
1102*4882a593Smuzhiyun 	int i;
1103*4882a593Smuzhiyun 
1104*4882a593Smuzhiyun 	/* flush any pending work items */
1105*4882a593Smuzhiyun 	if (chips)
1106*4882a593Smuzhiyun 		for (i = 0; i < nr_chips; i++)
1107*4882a593Smuzhiyun 			cancel_work_sync(&chips[i].throttle);
1108*4882a593Smuzhiyun 	kfree(chips);
1109*4882a593Smuzhiyun }
1110*4882a593Smuzhiyun 
unregister_all_notifiers(void)1111*4882a593Smuzhiyun static inline void unregister_all_notifiers(void)
1112*4882a593Smuzhiyun {
1113*4882a593Smuzhiyun 	opal_message_notifier_unregister(OPAL_MSG_OCC,
1114*4882a593Smuzhiyun 					 &powernv_cpufreq_opal_nb);
1115*4882a593Smuzhiyun 	unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
1116*4882a593Smuzhiyun }
1117*4882a593Smuzhiyun 
powernv_cpufreq_init(void)1118*4882a593Smuzhiyun static int __init powernv_cpufreq_init(void)
1119*4882a593Smuzhiyun {
1120*4882a593Smuzhiyun 	int rc = 0;
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun 	/* Don't probe on pseries (guest) platforms */
1123*4882a593Smuzhiyun 	if (!firmware_has_feature(FW_FEATURE_OPAL))
1124*4882a593Smuzhiyun 		return -ENODEV;
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 	/* Discover pstates from device tree and init */
1127*4882a593Smuzhiyun 	rc = init_powernv_pstates();
1128*4882a593Smuzhiyun 	if (rc)
1129*4882a593Smuzhiyun 		goto out;
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	/* Populate chip info */
1132*4882a593Smuzhiyun 	rc = init_chip_info();
1133*4882a593Smuzhiyun 	if (rc)
1134*4882a593Smuzhiyun 		goto out;
1135*4882a593Smuzhiyun 
1136*4882a593Smuzhiyun 	if (powernv_pstate_info.wof_enabled)
1137*4882a593Smuzhiyun 		powernv_cpufreq_driver.boost_enabled = true;
1138*4882a593Smuzhiyun 	else
1139*4882a593Smuzhiyun 		powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL;
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 	rc = cpufreq_register_driver(&powernv_cpufreq_driver);
1142*4882a593Smuzhiyun 	if (rc) {
1143*4882a593Smuzhiyun 		pr_info("Failed to register the cpufreq driver (%d)\n", rc);
1144*4882a593Smuzhiyun 		goto cleanup;
1145*4882a593Smuzhiyun 	}
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	if (powernv_pstate_info.wof_enabled)
1148*4882a593Smuzhiyun 		cpufreq_enable_boost_support();
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun 	register_reboot_notifier(&powernv_cpufreq_reboot_nb);
1151*4882a593Smuzhiyun 	opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
1152*4882a593Smuzhiyun 
1153*4882a593Smuzhiyun 	return 0;
1154*4882a593Smuzhiyun cleanup:
1155*4882a593Smuzhiyun 	clean_chip_info();
1156*4882a593Smuzhiyun out:
1157*4882a593Smuzhiyun 	pr_info("Platform driver disabled. System does not support PState control\n");
1158*4882a593Smuzhiyun 	return rc;
1159*4882a593Smuzhiyun }
1160*4882a593Smuzhiyun module_init(powernv_cpufreq_init);
1161*4882a593Smuzhiyun 
powernv_cpufreq_exit(void)1162*4882a593Smuzhiyun static void __exit powernv_cpufreq_exit(void)
1163*4882a593Smuzhiyun {
1164*4882a593Smuzhiyun 	cpufreq_unregister_driver(&powernv_cpufreq_driver);
1165*4882a593Smuzhiyun 	unregister_all_notifiers();
1166*4882a593Smuzhiyun 	clean_chip_info();
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun module_exit(powernv_cpufreq_exit);
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1171*4882a593Smuzhiyun MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
1172