1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2007 PA Semi, Inc
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Authors: Egor Martovetsky <egor@pasemi.com>
6*4882a593Smuzhiyun * Olof Johansson <olof@lixom.net>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Maintained by: Olof Johansson <olof@lixom.net>
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Based on arch/powerpc/platforms/cell/cbe_cpufreq.c:
11*4882a593Smuzhiyun * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/cpufreq.h>
15*4882a593Smuzhiyun #include <linux/timer.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/of_address.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <asm/hw_irq.h>
20*4882a593Smuzhiyun #include <asm/io.h>
21*4882a593Smuzhiyun #include <asm/prom.h>
22*4882a593Smuzhiyun #include <asm/time.h>
23*4882a593Smuzhiyun #include <asm/smp.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <platforms/pasemi/pasemi.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define SDCASR_REG 0x0100
28*4882a593Smuzhiyun #define SDCASR_REG_STRIDE 0x1000
29*4882a593Smuzhiyun #define SDCPWR_CFGA0_REG 0x0100
30*4882a593Smuzhiyun #define SDCPWR_PWST0_REG 0x0000
31*4882a593Smuzhiyun #define SDCPWR_GIZTIME_REG 0x0440
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* SDCPWR_GIZTIME_REG fields */
34*4882a593Smuzhiyun #define SDCPWR_GIZTIME_GR 0x80000000
35*4882a593Smuzhiyun #define SDCPWR_GIZTIME_LONGLOCK 0x000000ff
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /* Offset of ASR registers from SDC base */
38*4882a593Smuzhiyun #define SDCASR_OFFSET 0x120000
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static void __iomem *sdcpwr_mapbase;
41*4882a593Smuzhiyun static void __iomem *sdcasr_mapbase;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Current astate, is used when waking up from power savings on
44*4882a593Smuzhiyun * one core, in case the other core has switched states during
45*4882a593Smuzhiyun * the idle time.
46*4882a593Smuzhiyun */
47*4882a593Smuzhiyun static int current_astate;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /* We support 5(A0-A4) power states excluding turbo(A5-A6) modes */
50*4882a593Smuzhiyun static struct cpufreq_frequency_table pas_freqs[] = {
51*4882a593Smuzhiyun {0, 0, 0},
52*4882a593Smuzhiyun {0, 1, 0},
53*4882a593Smuzhiyun {0, 2, 0},
54*4882a593Smuzhiyun {0, 3, 0},
55*4882a593Smuzhiyun {0, 4, 0},
56*4882a593Smuzhiyun {0, 0, CPUFREQ_TABLE_END},
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /*
60*4882a593Smuzhiyun * hardware specific functions
61*4882a593Smuzhiyun */
62*4882a593Smuzhiyun
get_astate_freq(int astate)63*4882a593Smuzhiyun static int get_astate_freq(int astate)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun u32 ret;
66*4882a593Smuzhiyun ret = in_le32(sdcpwr_mapbase + SDCPWR_CFGA0_REG + (astate * 0x10));
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun return ret & 0x3f;
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun
get_cur_astate(int cpu)71*4882a593Smuzhiyun static int get_cur_astate(int cpu)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun u32 ret;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun ret = in_le32(sdcpwr_mapbase + SDCPWR_PWST0_REG);
76*4882a593Smuzhiyun ret = (ret >> (cpu * 4)) & 0x7;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return ret;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
get_gizmo_latency(void)81*4882a593Smuzhiyun static int get_gizmo_latency(void)
82*4882a593Smuzhiyun {
83*4882a593Smuzhiyun u32 giztime, ret;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun giztime = in_le32(sdcpwr_mapbase + SDCPWR_GIZTIME_REG);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* just provide the upper bound */
88*4882a593Smuzhiyun if (giztime & SDCPWR_GIZTIME_GR)
89*4882a593Smuzhiyun ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 128000;
90*4882a593Smuzhiyun else
91*4882a593Smuzhiyun ret = (giztime & SDCPWR_GIZTIME_LONGLOCK) * 1000;
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun return ret;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
set_astate(int cpu,unsigned int astate)96*4882a593Smuzhiyun static void set_astate(int cpu, unsigned int astate)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun unsigned long flags;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* Return if called before init has run */
101*4882a593Smuzhiyun if (unlikely(!sdcasr_mapbase))
102*4882a593Smuzhiyun return;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun local_irq_save(flags);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun out_le32(sdcasr_mapbase + SDCASR_REG + SDCASR_REG_STRIDE*cpu, astate);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun local_irq_restore(flags);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
check_astate(void)111*4882a593Smuzhiyun int check_astate(void)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun return get_cur_astate(hard_smp_processor_id());
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
restore_astate(int cpu)116*4882a593Smuzhiyun void restore_astate(int cpu)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun set_astate(cpu, current_astate);
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /*
122*4882a593Smuzhiyun * cpufreq functions
123*4882a593Smuzhiyun */
124*4882a593Smuzhiyun
pas_cpufreq_cpu_init(struct cpufreq_policy * policy)125*4882a593Smuzhiyun static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct cpufreq_frequency_table *pos;
128*4882a593Smuzhiyun const u32 *max_freqp;
129*4882a593Smuzhiyun u32 max_freq;
130*4882a593Smuzhiyun int cur_astate, idx;
131*4882a593Smuzhiyun struct resource res;
132*4882a593Smuzhiyun struct device_node *cpu, *dn;
133*4882a593Smuzhiyun int err = -ENODEV;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun cpu = of_get_cpu_node(policy->cpu, NULL);
136*4882a593Smuzhiyun if (!cpu)
137*4882a593Smuzhiyun goto out;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun max_freqp = of_get_property(cpu, "clock-frequency", NULL);
140*4882a593Smuzhiyun of_node_put(cpu);
141*4882a593Smuzhiyun if (!max_freqp) {
142*4882a593Smuzhiyun err = -EINVAL;
143*4882a593Smuzhiyun goto out;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun /* we need the freq in kHz */
147*4882a593Smuzhiyun max_freq = *max_freqp / 1000;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
150*4882a593Smuzhiyun if (!dn)
151*4882a593Smuzhiyun dn = of_find_compatible_node(NULL, NULL,
152*4882a593Smuzhiyun "pasemi,pwrficient-sdc");
153*4882a593Smuzhiyun if (!dn)
154*4882a593Smuzhiyun goto out;
155*4882a593Smuzhiyun err = of_address_to_resource(dn, 0, &res);
156*4882a593Smuzhiyun of_node_put(dn);
157*4882a593Smuzhiyun if (err)
158*4882a593Smuzhiyun goto out;
159*4882a593Smuzhiyun sdcasr_mapbase = ioremap(res.start + SDCASR_OFFSET, 0x2000);
160*4882a593Smuzhiyun if (!sdcasr_mapbase) {
161*4882a593Smuzhiyun err = -EINVAL;
162*4882a593Smuzhiyun goto out;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
166*4882a593Smuzhiyun if (!dn)
167*4882a593Smuzhiyun dn = of_find_compatible_node(NULL, NULL,
168*4882a593Smuzhiyun "pasemi,pwrficient-gizmo");
169*4882a593Smuzhiyun if (!dn) {
170*4882a593Smuzhiyun err = -ENODEV;
171*4882a593Smuzhiyun goto out_unmap_sdcasr;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun err = of_address_to_resource(dn, 0, &res);
174*4882a593Smuzhiyun of_node_put(dn);
175*4882a593Smuzhiyun if (err)
176*4882a593Smuzhiyun goto out_unmap_sdcasr;
177*4882a593Smuzhiyun sdcpwr_mapbase = ioremap(res.start, 0x1000);
178*4882a593Smuzhiyun if (!sdcpwr_mapbase) {
179*4882a593Smuzhiyun err = -EINVAL;
180*4882a593Smuzhiyun goto out_unmap_sdcasr;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun pr_debug("init cpufreq on CPU %d\n", policy->cpu);
184*4882a593Smuzhiyun pr_debug("max clock-frequency is at %u kHz\n", max_freq);
185*4882a593Smuzhiyun pr_debug("initializing frequency table\n");
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun /* initialize frequency table */
188*4882a593Smuzhiyun cpufreq_for_each_entry_idx(pos, pas_freqs, idx) {
189*4882a593Smuzhiyun pos->frequency = get_astate_freq(pos->driver_data) * 100000;
190*4882a593Smuzhiyun pr_debug("%d: %d\n", idx, pos->frequency);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun cur_astate = get_cur_astate(policy->cpu);
194*4882a593Smuzhiyun pr_debug("current astate is at %d\n",cur_astate);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun policy->cur = pas_freqs[cur_astate].frequency;
197*4882a593Smuzhiyun ppc_proc_freq = policy->cur * 1000ul;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency());
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun out_unmap_sdcasr:
203*4882a593Smuzhiyun iounmap(sdcasr_mapbase);
204*4882a593Smuzhiyun out:
205*4882a593Smuzhiyun return err;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
pas_cpufreq_cpu_exit(struct cpufreq_policy * policy)208*4882a593Smuzhiyun static int pas_cpufreq_cpu_exit(struct cpufreq_policy *policy)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun /*
211*4882a593Smuzhiyun * We don't support CPU hotplug. Don't unmap after the system
212*4882a593Smuzhiyun * has already made it to a running state.
213*4882a593Smuzhiyun */
214*4882a593Smuzhiyun if (system_state >= SYSTEM_RUNNING)
215*4882a593Smuzhiyun return 0;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun if (sdcasr_mapbase)
218*4882a593Smuzhiyun iounmap(sdcasr_mapbase);
219*4882a593Smuzhiyun if (sdcpwr_mapbase)
220*4882a593Smuzhiyun iounmap(sdcpwr_mapbase);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun return 0;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
pas_cpufreq_target(struct cpufreq_policy * policy,unsigned int pas_astate_new)225*4882a593Smuzhiyun static int pas_cpufreq_target(struct cpufreq_policy *policy,
226*4882a593Smuzhiyun unsigned int pas_astate_new)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun int i;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n",
231*4882a593Smuzhiyun policy->cpu,
232*4882a593Smuzhiyun pas_freqs[pas_astate_new].frequency,
233*4882a593Smuzhiyun pas_freqs[pas_astate_new].driver_data);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun current_astate = pas_astate_new;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun for_each_online_cpu(i)
238*4882a593Smuzhiyun set_astate(i, pas_astate_new);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun ppc_proc_freq = pas_freqs[pas_astate_new].frequency * 1000ul;
241*4882a593Smuzhiyun return 0;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun static struct cpufreq_driver pas_cpufreq_driver = {
245*4882a593Smuzhiyun .name = "pas-cpufreq",
246*4882a593Smuzhiyun .flags = CPUFREQ_CONST_LOOPS,
247*4882a593Smuzhiyun .init = pas_cpufreq_cpu_init,
248*4882a593Smuzhiyun .exit = pas_cpufreq_cpu_exit,
249*4882a593Smuzhiyun .verify = cpufreq_generic_frequency_table_verify,
250*4882a593Smuzhiyun .target_index = pas_cpufreq_target,
251*4882a593Smuzhiyun .attr = cpufreq_generic_attr,
252*4882a593Smuzhiyun };
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /*
255*4882a593Smuzhiyun * module init and destoy
256*4882a593Smuzhiyun */
257*4882a593Smuzhiyun
pas_cpufreq_init(void)258*4882a593Smuzhiyun static int __init pas_cpufreq_init(void)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun if (!of_machine_is_compatible("PA6T-1682M") &&
261*4882a593Smuzhiyun !of_machine_is_compatible("pasemi,pwrficient"))
262*4882a593Smuzhiyun return -ENODEV;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun return cpufreq_register_driver(&pas_cpufreq_driver);
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
pas_cpufreq_exit(void)267*4882a593Smuzhiyun static void __exit pas_cpufreq_exit(void)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun cpufreq_unregister_driver(&pas_cpufreq_driver);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun module_init(pas_cpufreq_init);
273*4882a593Smuzhiyun module_exit(pas_cpufreq_exit);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun MODULE_LICENSE("GPL");
276*4882a593Smuzhiyun MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>, Olof Johansson <olof@lixom.net>");
277