1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * CPU frequency scaling for Broadcom BMIPS SoCs
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (c) 2017 Broadcom
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
7*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
8*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11*4882a593Smuzhiyun * kind, whether express or implied; without even the implied warranty
12*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13*4882a593Smuzhiyun * GNU General Public License for more details.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <linux/cpufreq.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/of_address.h>
19*4882a593Smuzhiyun #include <linux/slab.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun /* for mips_hpt_frequency */
22*4882a593Smuzhiyun #include <asm/time.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define BMIPS_CPUFREQ_PREFIX "bmips"
25*4882a593Smuzhiyun #define BMIPS_CPUFREQ_NAME BMIPS_CPUFREQ_PREFIX "-cpufreq"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define TRANSITION_LATENCY (25 * 1000) /* 25 us */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define BMIPS5_CLK_DIV_SET_SHIFT 0x7
30*4882a593Smuzhiyun #define BMIPS5_CLK_DIV_SHIFT 0x4
31*4882a593Smuzhiyun #define BMIPS5_CLK_DIV_MASK 0xf
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun enum bmips_type {
34*4882a593Smuzhiyun BMIPS5000,
35*4882a593Smuzhiyun BMIPS5200,
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct cpufreq_compat {
39*4882a593Smuzhiyun const char *compatible;
40*4882a593Smuzhiyun unsigned int bmips_type;
41*4882a593Smuzhiyun unsigned int clk_mult;
42*4882a593Smuzhiyun unsigned int max_freqs;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define BMIPS(c, t, m, f) { \
46*4882a593Smuzhiyun .compatible = c, \
47*4882a593Smuzhiyun .bmips_type = (t), \
48*4882a593Smuzhiyun .clk_mult = (m), \
49*4882a593Smuzhiyun .max_freqs = (f), \
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static struct cpufreq_compat bmips_cpufreq_compat[] = {
53*4882a593Smuzhiyun BMIPS("brcm,bmips5000", BMIPS5000, 8, 4),
54*4882a593Smuzhiyun BMIPS("brcm,bmips5200", BMIPS5200, 8, 4),
55*4882a593Smuzhiyun { }
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun static struct cpufreq_compat *priv;
59*4882a593Smuzhiyun
htp_freq_to_cpu_freq(unsigned int clk_mult)60*4882a593Smuzhiyun static int htp_freq_to_cpu_freq(unsigned int clk_mult)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun return mips_hpt_frequency * clk_mult / 1000;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static struct cpufreq_frequency_table *
bmips_cpufreq_get_freq_table(const struct cpufreq_policy * policy)66*4882a593Smuzhiyun bmips_cpufreq_get_freq_table(const struct cpufreq_policy *policy)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun struct cpufreq_frequency_table *table;
69*4882a593Smuzhiyun unsigned long cpu_freq;
70*4882a593Smuzhiyun int i;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun cpu_freq = htp_freq_to_cpu_freq(priv->clk_mult);
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun table = kmalloc_array(priv->max_freqs + 1, sizeof(*table), GFP_KERNEL);
75*4882a593Smuzhiyun if (!table)
76*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun for (i = 0; i < priv->max_freqs; i++) {
79*4882a593Smuzhiyun table[i].frequency = cpu_freq / (1 << i);
80*4882a593Smuzhiyun table[i].driver_data = i;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun table[i].frequency = CPUFREQ_TABLE_END;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return table;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
bmips_cpufreq_get(unsigned int cpu)87*4882a593Smuzhiyun static unsigned int bmips_cpufreq_get(unsigned int cpu)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun unsigned int div;
90*4882a593Smuzhiyun uint32_t mode;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun switch (priv->bmips_type) {
93*4882a593Smuzhiyun case BMIPS5200:
94*4882a593Smuzhiyun case BMIPS5000:
95*4882a593Smuzhiyun mode = read_c0_brcm_mode();
96*4882a593Smuzhiyun div = ((mode >> BMIPS5_CLK_DIV_SHIFT) & BMIPS5_CLK_DIV_MASK);
97*4882a593Smuzhiyun break;
98*4882a593Smuzhiyun default:
99*4882a593Smuzhiyun div = 0;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return htp_freq_to_cpu_freq(priv->clk_mult) / (1 << div);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
bmips_cpufreq_target_index(struct cpufreq_policy * policy,unsigned int index)105*4882a593Smuzhiyun static int bmips_cpufreq_target_index(struct cpufreq_policy *policy,
106*4882a593Smuzhiyun unsigned int index)
107*4882a593Smuzhiyun {
108*4882a593Smuzhiyun unsigned int div = policy->freq_table[index].driver_data;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun switch (priv->bmips_type) {
111*4882a593Smuzhiyun case BMIPS5200:
112*4882a593Smuzhiyun case BMIPS5000:
113*4882a593Smuzhiyun change_c0_brcm_mode(BMIPS5_CLK_DIV_MASK << BMIPS5_CLK_DIV_SHIFT,
114*4882a593Smuzhiyun (1 << BMIPS5_CLK_DIV_SET_SHIFT) |
115*4882a593Smuzhiyun (div << BMIPS5_CLK_DIV_SHIFT));
116*4882a593Smuzhiyun break;
117*4882a593Smuzhiyun default:
118*4882a593Smuzhiyun return -ENOTSUPP;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun return 0;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
bmips_cpufreq_exit(struct cpufreq_policy * policy)124*4882a593Smuzhiyun static int bmips_cpufreq_exit(struct cpufreq_policy *policy)
125*4882a593Smuzhiyun {
126*4882a593Smuzhiyun kfree(policy->freq_table);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
bmips_cpufreq_init(struct cpufreq_policy * policy)131*4882a593Smuzhiyun static int bmips_cpufreq_init(struct cpufreq_policy *policy)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun struct cpufreq_frequency_table *freq_table;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun freq_table = bmips_cpufreq_get_freq_table(policy);
136*4882a593Smuzhiyun if (IS_ERR(freq_table)) {
137*4882a593Smuzhiyun pr_err("%s: couldn't determine frequency table (%ld).\n",
138*4882a593Smuzhiyun BMIPS_CPUFREQ_NAME, PTR_ERR(freq_table));
139*4882a593Smuzhiyun return PTR_ERR(freq_table);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun cpufreq_generic_init(policy, freq_table, TRANSITION_LATENCY);
143*4882a593Smuzhiyun pr_info("%s: registered\n", BMIPS_CPUFREQ_NAME);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun return 0;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static struct cpufreq_driver bmips_cpufreq_driver = {
149*4882a593Smuzhiyun .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
150*4882a593Smuzhiyun .verify = cpufreq_generic_frequency_table_verify,
151*4882a593Smuzhiyun .target_index = bmips_cpufreq_target_index,
152*4882a593Smuzhiyun .get = bmips_cpufreq_get,
153*4882a593Smuzhiyun .init = bmips_cpufreq_init,
154*4882a593Smuzhiyun .exit = bmips_cpufreq_exit,
155*4882a593Smuzhiyun .attr = cpufreq_generic_attr,
156*4882a593Smuzhiyun .name = BMIPS_CPUFREQ_PREFIX,
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun
bmips_cpufreq_probe(void)159*4882a593Smuzhiyun static int __init bmips_cpufreq_probe(void)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun struct cpufreq_compat *cc;
162*4882a593Smuzhiyun struct device_node *np;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun for (cc = bmips_cpufreq_compat; cc->compatible; cc++) {
165*4882a593Smuzhiyun np = of_find_compatible_node(NULL, "cpu", cc->compatible);
166*4882a593Smuzhiyun if (np) {
167*4882a593Smuzhiyun of_node_put(np);
168*4882a593Smuzhiyun priv = cc;
169*4882a593Smuzhiyun break;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* We hit the guard element of the array. No compatible CPU found. */
174*4882a593Smuzhiyun if (!cc->compatible)
175*4882a593Smuzhiyun return -ENODEV;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun return cpufreq_register_driver(&bmips_cpufreq_driver);
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun device_initcall(bmips_cpufreq_probe);
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>");
182*4882a593Smuzhiyun MODULE_DESCRIPTION("CPUfreq driver for Broadcom BMIPS SoCs");
183*4882a593Smuzhiyun MODULE_LICENSE("GPL");
184